Abandon using sleepable locks in favor of mutexes for mxge's if_ioctl
locking in preparation for adding a watchdog handler (callouts must not use sleepable locks). This required shuffling memory and interrupt allocation to the attach routine rather than if_ioctl so as to avoid potential sleeps while bringing up the interface.
This commit is contained in:
Andrew Gallatin
parent
ad9096d289
commit
a98d6cd71c
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=166370
@ -648,7 +648,7 @@ mxge_send_cmd(mxge_softc_t *sc, uint32_t cmd, mxge_cmd_t *data)
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buf->response_addr.low = htobe32(dma_low);
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buf->response_addr.high = htobe32(dma_high);
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mtx_lock(&sc->cmd_lock);
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mtx_lock(&sc->cmd_mtx);
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response->result = 0xffffffff;
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mb();
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mxge_pio_copy((volatile void *)cmd_addr, buf, sizeof (*buf));
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@ -661,20 +661,20 @@ mxge_send_cmd(mxge_softc_t *sc, uint32_t cmd, mxge_cmd_t *data)
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if (response->result != 0xffffffff) {
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if (response->result == 0) {
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data->data0 = be32toh(response->data);
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mtx_unlock(&sc->cmd_lock);
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mtx_unlock(&sc->cmd_mtx);
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return 0;
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} else {
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device_printf(sc->dev,
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"mxge: command %d "
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"failed, result = %d\n",
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cmd, be32toh(response->result));
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mtx_unlock(&sc->cmd_lock);
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mtx_unlock(&sc->cmd_mtx);
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return ENXIO;
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}
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}
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DELAY(1000);
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}
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mtx_unlock(&sc->cmd_lock);
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mtx_unlock(&sc->cmd_mtx);
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device_printf(sc->dev, "mxge: command %d timed out"
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"result = %d\n",
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cmd, be32toh(response->result));
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@ -927,7 +927,6 @@ mxge_reset(mxge_softc_t *sc)
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{
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mxge_cmd_t cmd;
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mxge_dma_t dmabench_dma;
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size_t bytes;
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int status;
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@ -975,13 +974,10 @@ mxge_reset(mxge_softc_t *sc)
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/* run a DMA benchmark */
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sc->read_dma = sc->write_dma = sc->read_write_dma = 0;
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status = mxge_dma_alloc(sc, &dmabench_dma, 4096, 4096);
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if (status)
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goto dmabench_fail;
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/* Read DMA */
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cmd.data0 = MXGE_LOWPART_TO_U32(dmabench_dma.bus_addr);
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cmd.data1 = MXGE_HIGHPART_TO_U32(dmabench_dma.bus_addr);
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cmd.data0 = MXGE_LOWPART_TO_U32(sc->dmabench_dma.bus_addr);
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cmd.data1 = MXGE_HIGHPART_TO_U32(sc->dmabench_dma.bus_addr);
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cmd.data2 = sc->tx.boundary * 0x10000;
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status = mxge_send_cmd(sc, MXGEFW_DMA_TEST, &cmd);
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@ -992,8 +988,8 @@ mxge_reset(mxge_softc_t *sc)
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(cmd.data0 & 0xffff);
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/* Write DMA */
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cmd.data0 = MXGE_LOWPART_TO_U32(dmabench_dma.bus_addr);
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cmd.data1 = MXGE_HIGHPART_TO_U32(dmabench_dma.bus_addr);
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cmd.data0 = MXGE_LOWPART_TO_U32(sc->dmabench_dma.bus_addr);
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cmd.data1 = MXGE_HIGHPART_TO_U32(sc->dmabench_dma.bus_addr);
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cmd.data2 = sc->tx.boundary * 0x1;
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status = mxge_send_cmd(sc, MXGEFW_DMA_TEST, &cmd);
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if (status != 0)
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@ -1002,8 +998,8 @@ mxge_reset(mxge_softc_t *sc)
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sc->write_dma = ((cmd.data0>>16) * sc->tx.boundary * 2) /
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(cmd.data0 & 0xffff);
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/* Read/Write DMA */
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cmd.data0 = MXGE_LOWPART_TO_U32(dmabench_dma.bus_addr);
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cmd.data1 = MXGE_HIGHPART_TO_U32(dmabench_dma.bus_addr);
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cmd.data0 = MXGE_LOWPART_TO_U32(sc->dmabench_dma.bus_addr);
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cmd.data1 = MXGE_HIGHPART_TO_U32(sc->dmabench_dma.bus_addr);
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cmd.data2 = sc->tx.boundary * 0x10001;
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status = mxge_send_cmd(sc, MXGEFW_DMA_TEST, &cmd);
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if (status != 0)
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@ -1013,9 +1009,6 @@ mxge_reset(mxge_softc_t *sc)
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((cmd.data0>>16) * sc->tx.boundary * 2 * 2) /
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(cmd.data0 & 0xffff);
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mxge_dma_free(&dmabench_dma);
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dmabench_fail:
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/* reset mcp/driver shared state back to 0 */
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bzero(sc->rx_done.entry, bytes);
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sc->rx_done.idx = 0;
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@ -1028,6 +1021,8 @@ mxge_reset(mxge_softc_t *sc)
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sc->rx_big.cnt = 0;
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sc->rx_small.cnt = 0;
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sc->rdma_tags_available = 15;
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sc->fw_stats->valid = 0;
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sc->fw_stats->send_done_count = 0;
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status = mxge_update_mac_address(sc);
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mxge_change_promisc(sc, 0);
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mxge_change_pause(sc, sc->pause);
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@ -1054,11 +1049,11 @@ mxge_change_intr_coal(SYSCTL_HANDLER_ARGS)
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if (intr_coal_delay == 0 || intr_coal_delay > 1000*1000)
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return EINVAL;
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sx_xlock(&sc->driver_lock);
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mtx_lock(&sc->driver_mtx);
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*sc->intr_coal_delay_ptr = htobe32(intr_coal_delay);
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sc->intr_coal_delay = intr_coal_delay;
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sx_xunlock(&sc->driver_lock);
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mtx_unlock(&sc->driver_mtx);
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return err;
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}
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@ -1078,9 +1073,9 @@ mxge_change_flow_control(SYSCTL_HANDLER_ARGS)
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if (enabled == sc->pause)
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return 0;
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sx_xlock(&sc->driver_lock);
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mtx_lock(&sc->driver_mtx);
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err = mxge_change_pause(sc, enabled);
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sx_xunlock(&sc->driver_lock);
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mtx_unlock(&sc->driver_mtx);
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return err;
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}
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@ -1698,9 +1693,9 @@ mxge_start(struct ifnet *ifp)
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mxge_softc_t *sc = ifp->if_softc;
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mtx_lock(&sc->tx_lock);
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mtx_lock(&sc->tx_mtx);
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mxge_start_locked(sc);
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mtx_unlock(&sc->tx_lock);
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mtx_unlock(&sc->tx_mtx);
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}
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/*
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@ -2032,11 +2027,11 @@ mxge_tx_done(mxge_softc_t *sc, uint32_t mcp_idx)
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if (ifp->if_drv_flags & IFF_DRV_OACTIVE &&
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tx->req - tx->done < (tx->mask + 1)/4) {
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mtx_lock(&sc->tx_lock);
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mtx_lock(&sc->tx_mtx);
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ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
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sc->tx.wake++;
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mxge_start_locked(sc);
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mtx_unlock(&sc->tx_lock);
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mtx_unlock(&sc->tx_mtx);
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}
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}
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@ -2406,25 +2401,15 @@ mxge_open(mxge_softc_t *sc)
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device_printf(sc->dev, "failed to reset\n");
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return EIO;
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}
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bzero(sc->rx_done.entry,
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mxge_max_intr_slots * sizeof(*sc->rx_done.entry));
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if (MCLBYTES >=
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sc->ifp->if_mtu + ETHER_HDR_LEN + MXGEFW_PAD)
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sc->big_bytes = MCLBYTES;
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else
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sc->big_bytes = MJUMPAGESIZE;
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err = mxge_alloc_rings(sc);
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if (err != 0) {
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device_printf(sc->dev, "failed to allocate rings\n");
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return err;
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}
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err = bus_setup_intr(sc->dev, sc->irq_res,
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INTR_TYPE_NET | INTR_MPSAFE,
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mxge_intr, sc, &sc->ih);
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if (err != 0) {
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goto abort_with_rings;
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}
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/* get the lanai pointers to the send and receive rings */
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@ -2442,8 +2427,7 @@ mxge_open(mxge_softc_t *sc)
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if (err != 0) {
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device_printf(sc->dev,
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"failed to get ring sizes or locations\n");
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err = EIO;
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goto abort_with_irq;
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return EIO;
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}
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if (sc->wc) {
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@ -2532,10 +2516,7 @@ mxge_open(mxge_softc_t *sc)
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abort:
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mxge_free_mbufs(sc);
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abort_with_irq:
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bus_teardown_intr(sc->dev, sc->irq_res, sc->ih);
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abort_with_rings:
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mxge_free_rings(sc);
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return err;
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}
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@ -2554,15 +2535,14 @@ mxge_close(mxge_softc_t *sc)
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}
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if (old_down_cnt == sc->down_cnt) {
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/* wait for down irq */
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(void)tsleep(&sc->down_cnt, PWAIT, "down mxge", hz);
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DELAY(2 * sc->intr_coal_delay);
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}
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if (old_down_cnt == sc->down_cnt) {
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device_printf(sc->dev, "never got down irq\n");
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}
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if (sc->ih != NULL)
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bus_teardown_intr(sc->dev, sc->irq_res, sc->ih);
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mxge_free_mbufs(sc);
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mxge_free_rings(sc);
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return 0;
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}
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@ -2585,7 +2565,7 @@ mxge_change_mtu(mxge_softc_t *sc, int mtu)
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if ((real_mtu > MXGE_MAX_ETHER_MTU) ||
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real_mtu < 60)
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return EINVAL;
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sx_xlock(&sc->driver_lock);
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mtx_lock(&sc->driver_mtx);
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old_mtu = ifp->if_mtu;
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ifp->if_mtu = mtu;
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if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
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@ -2597,7 +2577,7 @@ mxge_change_mtu(mxge_softc_t *sc, int mtu)
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(void) mxge_open(sc);
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}
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}
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sx_xunlock(&sc->driver_lock);
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mtx_unlock(&sc->driver_mtx);
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return err;
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}
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@ -2634,7 +2614,7 @@ mxge_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
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break;
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case SIOCSIFFLAGS:
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sx_xlock(&sc->driver_lock);
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mtx_lock(&sc->driver_mtx);
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if (ifp->if_flags & IFF_UP) {
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if (!(ifp->if_drv_flags & IFF_DRV_RUNNING))
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err = mxge_open(sc);
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@ -2649,18 +2629,18 @@ mxge_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
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if (ifp->if_drv_flags & IFF_DRV_RUNNING)
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mxge_close(sc);
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}
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sx_xunlock(&sc->driver_lock);
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mtx_unlock(&sc->driver_mtx);
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break;
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case SIOCADDMULTI:
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case SIOCDELMULTI:
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sx_xlock(&sc->driver_lock);
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mtx_lock(&sc->driver_mtx);
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mxge_set_multicast_list(sc);
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sx_xunlock(&sc->driver_lock);
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mtx_unlock(&sc->driver_mtx);
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break;
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case SIOCSIFCAP:
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sx_xlock(&sc->driver_lock);
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mtx_lock(&sc->driver_mtx);
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mask = ifr->ifr_reqcap ^ ifp->if_capenable;
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if (mask & IFCAP_TXCSUM) {
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if (IFCAP_TXCSUM & ifp->if_capenable) {
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@ -2693,7 +2673,7 @@ mxge_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
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err = EINVAL;
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}
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}
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sx_xunlock(&sc->driver_lock);
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mtx_unlock(&sc->driver_mtx);
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break;
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case SIOCGIFMEDIA:
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@ -2768,11 +2748,16 @@ mxge_attach(device_t dev)
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err = ENOSPC;
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goto abort_with_parent_dmat;
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}
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mtx_init(&sc->cmd_lock, NULL,
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snprintf(sc->cmd_mtx_name, sizeof(sc->cmd_mtx_name), "%s:cmd",
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device_get_nameunit(dev));
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mtx_init(&sc->cmd_mtx, sc->cmd_mtx_name, NULL, MTX_DEF);
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snprintf(sc->tx_mtx_name, sizeof(sc->tx_mtx_name), "%s:tx",
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device_get_nameunit(dev));
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mtx_init(&sc->tx_mtx, sc->tx_mtx_name, NULL, MTX_DEF);
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snprintf(sc->driver_mtx_name, sizeof(sc->driver_mtx_name),
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"%s:drv", device_get_nameunit(dev));
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mtx_init(&sc->driver_mtx, sc->driver_mtx_name,
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MTX_NETWORK_LOCK, MTX_DEF);
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mtx_init(&sc->tx_lock, device_get_nameunit(dev),
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MTX_NETWORK_LOCK, MTX_DEF);
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sx_init(&sc->driver_lock, device_get_nameunit(dev));
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/* find the PCIe link width and set max read request to 4KB*/
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if (pci_find_extcap(dev, PCIY_EXPRESS, ®) == 0) {
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@ -2839,12 +2824,15 @@ mxge_attach(device_t dev)
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goto abort_with_zeropad_dma;
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sc->fw_stats = (mcp_irq_data_t *)sc->fw_stats_dma.addr;
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err = mxge_dma_alloc(sc, &sc->dmabench_dma, 4096, 4096);
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if (err != 0)
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goto abort_with_fw_stats;
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/* allocate interrupt queues */
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bytes = mxge_max_intr_slots * sizeof (*sc->rx_done.entry);
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err = mxge_dma_alloc(sc, &sc->rx_done.dma, bytes, 4096);
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if (err != 0)
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goto abort_with_fw_stats;
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goto abort_with_dmabench;
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sc->rx_done.entry = sc->rx_done.dma.addr;
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bzero(sc->rx_done.entry, bytes);
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@ -2877,6 +2865,18 @@ mxge_attach(device_t dev)
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if (err != 0)
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goto abort_with_irq_res;
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err = mxge_alloc_rings(sc);
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if (err != 0) {
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device_printf(sc->dev, "failed to allocate rings\n");
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goto abort_with_irq_res;
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}
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err = bus_setup_intr(sc->dev, sc->irq_res,
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INTR_TYPE_NET | INTR_MPSAFE,
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mxge_intr, sc, &sc->ih);
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if (err != 0) {
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goto abort_with_rings;
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}
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/* hook into the network stack */
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if_initname(ifp, device_get_name(dev), device_get_unit(dev));
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ifp->if_baudrate = 100000000;
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@ -2902,6 +2902,8 @@ mxge_attach(device_t dev)
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mxge_add_sysctls(sc);
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return 0;
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abort_with_rings:
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mxge_free_rings(sc);
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abort_with_irq_res:
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bus_release_resource(dev, SYS_RES_IRQ,
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sc->msi_enabled ? 1 : 0, sc->irq_res);
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@ -2910,6 +2912,8 @@ mxge_attach(device_t dev)
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abort_with_rx_done:
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sc->rx_done.entry = NULL;
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mxge_dma_free(&sc->rx_done.dma);
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abort_with_dmabench:
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mxge_dma_free(&sc->dmabench_dma);
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abort_with_fw_stats:
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mxge_dma_free(&sc->fw_stats_dma);
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abort_with_zeropad_dma:
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@ -2920,9 +2924,9 @@ mxge_attach(device_t dev)
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bus_release_resource(dev, SYS_RES_MEMORY, PCIR_BARS, sc->mem_res);
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abort_with_lock:
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pci_disable_busmaster(dev);
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mtx_destroy(&sc->cmd_lock);
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mtx_destroy(&sc->tx_lock);
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sx_destroy(&sc->driver_lock);
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mtx_destroy(&sc->cmd_mtx);
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mtx_destroy(&sc->tx_mtx);
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mtx_destroy(&sc->driver_mtx);
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if_free(ifp);
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abort_with_parent_dmat:
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bus_dma_tag_destroy(sc->parent_dmat);
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@ -2936,12 +2940,14 @@ mxge_detach(device_t dev)
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{
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mxge_softc_t *sc = device_get_softc(dev);
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sx_xlock(&sc->driver_lock);
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mtx_lock(&sc->driver_mtx);
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if (sc->ifp->if_drv_flags & IFF_DRV_RUNNING)
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mxge_close(sc);
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sx_xunlock(&sc->driver_lock);
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mtx_unlock(&sc->driver_mtx);
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ether_ifdetach(sc->ifp);
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mxge_dummy_rdma(sc, 0);
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bus_teardown_intr(sc->dev, sc->irq_res, sc->ih);
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mxge_free_rings(sc);
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bus_release_resource(dev, SYS_RES_IRQ,
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sc->msi_enabled ? 1 : 0, sc->irq_res);
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if (sc->msi_enabled)
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@ -2950,13 +2956,14 @@ mxge_detach(device_t dev)
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sc->rx_done.entry = NULL;
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mxge_dma_free(&sc->rx_done.dma);
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mxge_dma_free(&sc->fw_stats_dma);
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mxge_dma_free(&sc->dmabench_dma);
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mxge_dma_free(&sc->zeropad_dma);
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mxge_dma_free(&sc->cmd_dma);
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bus_release_resource(dev, SYS_RES_MEMORY, PCIR_BARS, sc->mem_res);
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pci_disable_busmaster(dev);
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mtx_destroy(&sc->cmd_lock);
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mtx_destroy(&sc->tx_lock);
|
||||
sx_destroy(&sc->driver_lock);
|
||||
mtx_destroy(&sc->cmd_mtx);
|
||||
mtx_destroy(&sc->tx_mtx);
|
||||
mtx_destroy(&sc->driver_mtx);
|
||||
if_free(sc->ifp);
|
||||
bus_dma_tag_destroy(sc->parent_dmat);
|
||||
return 0;
|
||||
|
||||
@ -114,7 +114,7 @@ typedef struct
|
||||
typedef struct {
|
||||
struct ifnet* ifp;
|
||||
int big_bytes;
|
||||
struct mtx tx_lock;
|
||||
struct mtx tx_mtx;
|
||||
int csum_flag; /* rx_csums? */
|
||||
uint8_t mac_addr[6]; /* eeprom mac address */
|
||||
mxge_tx_buf_t tx; /* transmit ring */
|
||||
@ -138,8 +138,8 @@ typedef struct {
|
||||
int intr_coal_delay;
|
||||
volatile uint32_t *intr_coal_delay_ptr;
|
||||
int wc;
|
||||
struct mtx cmd_lock;
|
||||
struct sx driver_lock;
|
||||
struct mtx cmd_mtx;
|
||||
struct mtx driver_mtx;
|
||||
int wake_queue;
|
||||
int stop_queue;
|
||||
int down_cnt;
|
||||
@ -159,10 +159,14 @@ typedef struct {
|
||||
int read_write_dma;
|
||||
int fw_multicast_support;
|
||||
int link_width;
|
||||
mxge_dma_t dmabench_dma;
|
||||
char *mac_addr_string;
|
||||
char product_code_string[64];
|
||||
char serial_number_string[64];
|
||||
char scratch[256];
|
||||
char tx_mtx_name[16];
|
||||
char cmd_mtx_name[16];
|
||||
char driver_mtx_name[16];
|
||||
} mxge_softc_t;
|
||||
|
||||
#define MXGE_PCI_VENDOR_MYRICOM 0x14c1
|
||||
|
||||
Loading…
Reference in New Issue
Block a user