When configuring hwpmc to use the EXT_SNOOP event, only send a default cachestate qualifier on the Atom processor. Other Intel processors do not accept a cachestate qualifier and currently hwpmc will return EINVAL if you try to use the EXT_SNOOP event on those processors
Approved by: jkoshy (mentor) MFC after: 2 weeks
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svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=207482
@ -737,9 +737,16 @@ iap_allocate_pmc(enum pmc_event pe, char *ctrspec,
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case PMC_EV_IAP_EVENT_40H: /* Core */
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case PMC_EV_IAP_EVENT_41H: /* Core */
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case PMC_EV_IAP_EVENT_42H: /* Core, Core2, Atom */
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case PMC_EV_IAP_EVENT_77H: /* Core */
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if (cachestate == 0)
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cachestate = (0xF << 8);
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break;
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case PMC_EV_IAP_EVENT_77H: /* Atom */
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/* IAP_EVENT_77H only accepts a cachestate qualifier on the
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* Atom processor
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*/
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if(cpu_info.pm_cputype == PMC_CPU_INTEL_ATOM && cachestate == 0)
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cachestate = (0xF << 8);
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break;
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default:
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break;
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}
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