MFi386: revisions 1.189 and 1.190.
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svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=105710
@ -874,14 +874,6 @@ set_timer_freq(u_int freq, int intr_freq)
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mtx_unlock_spin(&clock_lock);
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}
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/*
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* i8254_restore is called from apm_default_resume() to reload
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* the countdown register.
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* this should not be necessary but there are broken laptops that
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* do not restore the countdown register on resume.
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* when it happnes, it messes up the hardclock interval and system clock,
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* which leads to the infamous "calcru: negative time" problem.
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*/
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static void
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i8254_restore(void)
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{
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@ -898,15 +890,20 @@ static void
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rtc_restore(void)
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{
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/* Reenable RTC updates and interrupts. */
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/* XXX locking is needed for RTC access? */
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writertc(RTC_STATUSB, RTCSB_HALT | RTCSB_24HR);
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/* Restore all of the RTC's "status" (actually, control) registers. */
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/* XXX locking is needed for RTC access. */
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writertc(RTC_STATUSB, RTCSB_24HR);
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writertc(RTC_STATUSA, rtc_statusa);
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writertc(RTC_STATUSB, rtc_statusb);
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}
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#endif
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/*
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* Restore all the timers atomically.
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* Restore all the timers non-atomically (XXX: should be atomically).
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*
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* This function is called from pmtimer_resume() to restore all the timers.
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* This should not be necessary, but there are broken laptops that do not
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* restore all the timers on resume.
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*/
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void
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timer_restore(void)
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@ -1431,6 +1428,7 @@ cpu_initclocks()
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* on the IO APIC.
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* Workaround: Limited variant of mixed mode.
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*/
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crit = intr_disable();
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mtx_lock_spin(&icu_lock);
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INTRDIS(1 << apic_8254_intr);
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@ -874,14 +874,6 @@ set_timer_freq(u_int freq, int intr_freq)
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mtx_unlock_spin(&clock_lock);
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}
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/*
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* i8254_restore is called from apm_default_resume() to reload
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* the countdown register.
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* this should not be necessary but there are broken laptops that
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* do not restore the countdown register on resume.
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* when it happnes, it messes up the hardclock interval and system clock,
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* which leads to the infamous "calcru: negative time" problem.
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*/
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static void
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i8254_restore(void)
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{
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@ -898,15 +890,20 @@ static void
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rtc_restore(void)
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{
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/* Reenable RTC updates and interrupts. */
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/* XXX locking is needed for RTC access? */
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writertc(RTC_STATUSB, RTCSB_HALT | RTCSB_24HR);
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/* Restore all of the RTC's "status" (actually, control) registers. */
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/* XXX locking is needed for RTC access. */
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writertc(RTC_STATUSB, RTCSB_24HR);
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writertc(RTC_STATUSA, rtc_statusa);
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writertc(RTC_STATUSB, rtc_statusb);
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}
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#endif
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/*
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* Restore all the timers atomically.
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* Restore all the timers non-atomically (XXX: should be atomically).
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*
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* This function is called from pmtimer_resume() to restore all the timers.
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* This should not be necessary, but there are broken laptops that do not
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* restore all the timers on resume.
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*/
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void
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timer_restore(void)
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@ -1431,6 +1428,7 @@ cpu_initclocks()
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* on the IO APIC.
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* Workaround: Limited variant of mixed mode.
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*/
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crit = intr_disable();
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mtx_lock_spin(&icu_lock);
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INTRDIS(1 << apic_8254_intr);
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@ -874,14 +874,6 @@ set_timer_freq(u_int freq, int intr_freq)
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mtx_unlock_spin(&clock_lock);
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}
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/*
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* i8254_restore is called from apm_default_resume() to reload
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* the countdown register.
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* this should not be necessary but there are broken laptops that
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* do not restore the countdown register on resume.
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* when it happnes, it messes up the hardclock interval and system clock,
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* which leads to the infamous "calcru: negative time" problem.
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*/
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static void
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i8254_restore(void)
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{
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@ -898,15 +890,20 @@ static void
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rtc_restore(void)
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{
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/* Reenable RTC updates and interrupts. */
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/* XXX locking is needed for RTC access? */
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writertc(RTC_STATUSB, RTCSB_HALT | RTCSB_24HR);
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/* Restore all of the RTC's "status" (actually, control) registers. */
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/* XXX locking is needed for RTC access. */
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writertc(RTC_STATUSB, RTCSB_24HR);
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writertc(RTC_STATUSA, rtc_statusa);
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writertc(RTC_STATUSB, rtc_statusb);
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}
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#endif
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/*
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* Restore all the timers atomically.
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* Restore all the timers non-atomically (XXX: should be atomically).
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*
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* This function is called from pmtimer_resume() to restore all the timers.
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* This should not be necessary, but there are broken laptops that do not
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* restore all the timers on resume.
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*/
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void
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timer_restore(void)
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@ -1431,6 +1428,7 @@ cpu_initclocks()
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* on the IO APIC.
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* Workaround: Limited variant of mixed mode.
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*/
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crit = intr_disable();
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mtx_lock_spin(&icu_lock);
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INTRDIS(1 << apic_8254_intr);
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