Fix and improve exception tracing:
1. Name the kernel option XTRACE instead of EXCEPTION_TRACING 2. Put support functions in ia64/ia64/xtrace.c 3. Make it work with SMP by giving each CPU its own buffer 4. Save 16 key registers in the buffer for every exception 5. In ia64_handle_intr() and trap() transfer the trace record to the KTR trace buffer using CTRx() and with some basic information for now 6. Use a tunable to anble tracing and stop tracing as soon as we enter the debugger Room for improvements: 1. Transferring exception-relevant information to KTR 2. Add a sysctl to enable/disable tracing
This commit is contained in:
parent
4feac03f2c
commit
ac5c8b7c5b
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=263323
@ -110,6 +110,7 @@ ia64/ia64/uma_machdep.c standard
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ia64/ia64/unaligned.c standard
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ia64/ia64/unwind.c standard
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ia64/ia64/vm_machdep.c standard
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ia64/ia64/xtrace.c optional xtrace
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ia64/isa/isa.c optional isa
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ia64/isa/isa_dma.c optional isa
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ia64/pci/pci_cfgreg.c optional pci
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@ -13,7 +13,7 @@ COMPAT_FREEBSD32 opt_compat.h
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PV_STATS opt_pmap.h
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EXCEPTION_TRACING opt_xtrace.h
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XTRACE
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VGA_ALT_SEQACCESS opt_vga.h
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VGA_DEBUG opt_vga.h
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@ -26,11 +26,11 @@
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* SUCH DAMAGE.
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*/
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#include "opt_xtrace.h"
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_xtrace.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/cons.h>
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@ -585,6 +585,10 @@ db_show_mdpcpu(struct pcpu *pc)
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db_printf("MD: clock_load = %#lx\n", md->clock_load);
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db_printf("MD: stats = %p\n", &md->stats);
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db_printf("MD: pmap = %p\n", md->current_pmap);
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#ifdef XTRACE
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db_printf("MD: xtrace_buffer = %p\n", md->xtrace_buffer);
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db_printf("MD: xtrace_tail = %#lx\n", md->xtrace_tail);
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#endif
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}
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void
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@ -604,29 +608,3 @@ db_trace_thread(struct thread *td, int count)
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ctx = kdb_thr_ctx(td);
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return (db_backtrace(td, ctx, count));
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}
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#ifdef EXCEPTION_TRACING
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extern long xtrace[];
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extern long *xhead;
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DB_COMMAND(xtrace, db_xtrace)
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{
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long *p;
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p = (*xhead == 0) ? xtrace : xhead;
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db_printf("ITC\t\t IVT\t\t IIP\t\t IFA\t\t ISR\n");
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if (*p == 0)
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return;
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do {
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db_printf("%016lx %016lx %016lx %016lx %016lx\n", p[0], p[1],
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p[2], p[3], p[4]);
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p += 5;
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if (p == (void *)&xhead)
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p = xtrace;
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} while (p != xhead);
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}
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#endif
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@ -50,63 +50,185 @@ __FBSDID("$FreeBSD$");
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.section .ivt.data, "aw"
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.align 8
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.global ia64_kptdir
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.size ia64_kptdir, 8
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ia64_kptdir: data8 0
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#ifdef EXCEPTION_TRACING
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#ifdef XTRACE
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.global xtrace, xhead
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xtrace: .space 1024*5*8
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xhead: data8 xtrace
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.align 8
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.global ia64_xtrace_mask
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.size ia64_xtrace_mask, 8
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ia64_xtrace_mask: data8 0
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#define XTRACE(offset) \
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{ .mmi ; \
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mov r24=ar.itc ; \
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mov r25=cr.iip ; \
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mov r27=offset ; \
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.align 4
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.global ia64_xtrace_enabled
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.size ia64_xtrace_enabled, 4
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ia64_xtrace_enabled: data4 0
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#define XTRACE_HOOK(offset) \
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{ .mii ; \
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nop 0 ; \
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mov r31 = b7 ; \
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mov r28 = pr ; \
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} ; \
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{ .mlx ; \
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mov r28=cr.ifa ; \
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movl r29=xhead ;; \
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} ; \
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{ .mmi ; \
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ld8 r29=[r29] ;; \
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st8 [r29]=r24,8 ; \
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nop 0 ;; \
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} ; \
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{ .mmi ; \
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st8 [r29]=r27,8 ;; \
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mov r24=cr.isr ; \
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add r27=8,r29 ;; \
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} ; \
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{ .mmi ; \
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st8 [r29]=r25,16 ;; \
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st8 [r27]=r28,16 ; \
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mov r25=pr ;; \
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} ; \
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{ .mlx ; \
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st8 [r29]=r24 ; \
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movl r28=xhead ;; \
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{ .mib ; \
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nop 0 ; \
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mov r25 = ip ; \
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br.sptk ia64_xtrace_write ;; \
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} ; \
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{ .mii ; \
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cmp.eq p15,p0=r27,r28 ; \
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addl r29=1024*5*8,r0 ;; \
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(p15) sub r27=r28,r29 ;; \
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} ; \
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{ .mmi ; \
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st8 [r28]=r27 ; \
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nop 0 ; \
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mov pr=r25,0x1ffff ;; \
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nop 0 ; \
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mov b7 = r31 ; \
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mov pr = r28, 0x1ffff ;; \
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}
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#else
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.section .ivt.text, "ax"
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#define XTRACE(offset)
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// We can only use r25, r26 & r27
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ENTRY_NOPROFILE(ia64_xtrace_write, 0)
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{ .mlx
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add r25 = 16, r25
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movl r26 = ia64_xtrace_enabled
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;;
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}
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{ .mmi
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mov r27 = ar.k3
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ld4 r26 = [r26]
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mov b7 = r25
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;;
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}
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{ .mib
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add r25 = -32, r25
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cmp.eq p15,p0 = r0, r26
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(p15) br.dptk.few b7
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;;
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}
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{ .mib
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nop 0
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cmp.eq p15,p0 = r0, r27
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(p15) br.dptk.few b7
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;;
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}
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{ .mmi
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st8 [r27] = r25, 8 // 0x00 IVT
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mov r26 = ar.itc
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nop 0
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;;
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}
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{ .mmi
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st8 [r27] = r26, 8 // 0x08 ITC
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mov r25 = cr.iip
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nop 0
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;;
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}
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{ .mmi
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st8 [r27] = r25, 8 // 0x10 IIP
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mov r26 = cr.ifa
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nop 0
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;;
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}
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{ .mmi
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st8 [r27] = r26, 8 // 0x18 IFA
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mov r25 = cr.isr
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nop 0
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;;
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}
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{ .mmi
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st8 [r27] = r25, 8 // 0x20 ISR
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mov r26 = cr.ipsr
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nop 0
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;;
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}
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{ .mmi
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st8 [r27] = r26, 8 // 0x28 IPSR
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mov r25 = cr.itir
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nop 0
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;;
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}
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{ .mmi
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st8 [r27] = r25, 8 // 0x30 ITIR
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mov r26 = cr.iipa
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nop 0
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;;
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}
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{ .mmi
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st8 [r27] = r26, 8 // 0x38 IIPA
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mov r25 = cr.ifs
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nop 0
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;;
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}
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{ .mmi
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st8 [r27] = r25, 8 // 0x40 IFS
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mov r26 = cr.iim
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nop 0
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;;
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}
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{ .mmi
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st8 [r27] = r26, 8 // 0x48 IIM
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mov r25 = cr.iha
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nop 0
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;;
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}
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{ .mmi
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st8 [r27] = r25, 8 // 0x50 IHA
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mov r26 = ar.unat
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nop 0
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;;
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}
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{ .mmi
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st8 [r27] = r26, 8 // 0x58 UNAT
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mov r25 = ar.rsc
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nop 0
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;;
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}
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{ .mmi
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st8 [r27] = r25, 8 // 0x60 RSC
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mov r26 = ar.bsp
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nop 0
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;;
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}
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{ .mmi
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st8 [r27] = r26, 8 // 0x68 BSP
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mov r25 = r13
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nop 0
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;;
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}
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{ .mmi
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st8 [r27] = r25, 8 // 0x70 PCPU/TLS
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mov r26 = r12
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nop 0
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;;
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}
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{ .mlx
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st8 [r27] = r26, 8 // 0x78 SP
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movl r25 = ia64_xtrace_mask
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;;
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}
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{ .mmi
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ld8 r26 = [r25]
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;;
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and r25 = r27, r26
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nop 0
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;;
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}
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{ .mib
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mov ar.k3 = r25
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nop 0
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br.sptk b7
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;;
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}
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END(ia64_xtrace_write)
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#endif
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#else /* XTRACE */
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#define XTRACE_HOOK(offset)
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.section .ivt.text, "ax"
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#endif /* XTRACE */
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/*
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* exception_save: save interrupted state
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*
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@ -632,6 +754,7 @@ ENTRY_NOPROFILE(exception_restore, 0)
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ssm psr.dt
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;;
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srlz.d
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mov r16 = r25
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exception_restore_restart:
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{ .mmi
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@ -649,20 +772,21 @@ exception_restore_restart:
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;;
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}
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{ .mmi
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mov cr.ifs=r16
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mov ar.k6=r31
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mov ar.rnat=r21
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mov pr=r18,0x1ffff
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;;
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}
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{ .mmi
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mov cr.iip=r19
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mov ar.unat=r17
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nop 0
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;;
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}
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{ .mmi
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mov ar.unat=r17
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mov cr.iip=r19
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nop 0
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}
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{ .mmi
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mov cr.ipsr=r24
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mov cr.ifs=r25
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mov pr=r18,0x1ffff
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mov ar.rnat=r21
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nop 0
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;;
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}
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{ .mmb
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@ -713,7 +837,7 @@ END(exception_restore)
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.save rp, r0; \
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.body; \
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ivt_##name: \
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XTRACE(offset)
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XTRACE_HOOK(offset)
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#define IVT_END(name) \
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.endp ivt_##name
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@ -25,6 +25,7 @@
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*/
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#include "opt_ddb.h"
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#include "opt_xtrace.h"
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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@ -305,6 +306,11 @@ ia64_handle_intr(struct trapframe *tf)
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td = curthread;
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ia64_set_fpsr(IA64_FPSR_DEFAULT);
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#ifdef XTRACE
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ia64_xtrace_save();
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#endif
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PCPU_INC(cnt.v_intr);
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xiv = ia64_get_ivr();
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|
@ -32,6 +32,7 @@ __FBSDID("$FreeBSD$");
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#include "opt_ddb.h"
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#include "opt_kstack_pages.h"
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#include "opt_sched.h"
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#include "opt_xtrace.h"
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#include <sys/param.h>
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#include <sys/proc.h>
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@ -177,9 +178,6 @@ void (*cpu_idle_hook)(sbintime_t) = NULL;
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struct kva_md_info kmi;
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#define Mhz 1000000L
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#define Ghz (1000L*Mhz)
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static void
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identifycpu(void)
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{
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@ -566,6 +564,9 @@ void
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kdb_cpu_trap(int vector, int code __unused)
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{
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#ifdef XTRACE
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ia64_xtrace_stop();
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#endif
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__asm __volatile("flushrs;;");
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/* Restart after the break instruction. */
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@ -892,6 +893,10 @@ ia64_init(void)
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*/
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pmap_bootstrap();
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#ifdef XTRACE
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ia64_xtrace_init_bsp();
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#endif
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/*
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* Initialize debuggers, and break into them if appropriate.
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*/
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|
@ -29,6 +29,7 @@
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__FBSDID("$FreeBSD$");
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#include "opt_kstack_pages.h"
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#include "opt_xtrace.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -236,6 +237,10 @@ ia64_ap_startup(void)
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ia64_set_fpsr(IA64_FPSR_DEFAULT);
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#ifdef XTRACE
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ia64_xtrace_init_ap(ia64_ap_state.as_xtrace_buffer);
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#endif
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|
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/* Wait until it's time for us to be unleashed */
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while (ia64_ap_state.as_spin)
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cpu_spinwait();
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@ -398,6 +403,10 @@ cpu_mp_start()
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ia64_ap_state.as_kstack = stp;
|
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ia64_ap_state.as_kstack_top = stp + KSTACK_PAGES * PAGE_SIZE;
|
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|
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#ifdef XTRACE
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ia64_ap_state.as_xtrace_buffer = ia64_xtrace_alloc();
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#endif
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|
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ia64_ap_state.as_trace = 0;
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ia64_ap_state.as_delay = 2000;
|
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ia64_ap_state.as_awake = 0;
|
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|
@ -354,6 +354,12 @@ trap(int vector, struct trapframe *tf)
|
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ksiginfo_t ksi;
|
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|
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user = TRAPF_USERMODE(tf) ? 1 : 0;
|
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if (user)
|
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ia64_set_fpsr(IA64_FPSR_DEFAULT);
|
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|
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#ifdef XTRACE
|
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ia64_xtrace_save();
|
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#endif
|
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|
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PCPU_INC(cnt.v_trap);
|
||||
|
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@ -362,7 +368,6 @@ trap(int vector, struct trapframe *tf)
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ucode = 0;
|
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|
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if (user) {
|
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ia64_set_fpsr(IA64_FPSR_DEFAULT);
|
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td->td_pticks = 0;
|
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td->td_frame = tf;
|
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if (td->td_ucred != p->p_ucred)
|
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|
220
sys/ia64/ia64/xtrace.c
Normal file
220
sys/ia64/ia64/xtrace.c
Normal file
@ -0,0 +1,220 @@
|
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/*-
|
||||
* Copyright (c) 2014 Marcel Moolenaar
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include "opt_ddb.h"
|
||||
#include "opt_xtrace.h"
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__FBSDID("$FreeBSD$");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/kernel.h>
|
||||
#include <sys/ktr.h>
|
||||
#include <sys/malloc.h>
|
||||
#include <sys/pcpu.h>
|
||||
#include <machine/md_var.h>
|
||||
#include <machine/pte.h>
|
||||
#include <vm/vm.h>
|
||||
#include <vm/vm_extern.h>
|
||||
#include <vm/vm_kern.h>
|
||||
|
||||
#define XTRACE_LOG2SZ 14 /* 16KB trace buffers */
|
||||
|
||||
struct ia64_xtrace_record {
|
||||
uint64_t ivt;
|
||||
uint64_t itc;
|
||||
uint64_t iip;
|
||||
uint64_t ifa;
|
||||
uint64_t isr;
|
||||
uint64_t ipsr;
|
||||
uint64_t itir;
|
||||
uint64_t iipa;
|
||||
|
||||
uint64_t ifs;
|
||||
uint64_t iim;
|
||||
uint64_t iha;
|
||||
uint64_t unat;
|
||||
uint64_t rsc;
|
||||
uint64_t bsp;
|
||||
uint64_t tp;
|
||||
uint64_t sp;
|
||||
};
|
||||
|
||||
extern uint32_t ia64_xtrace_enabled;
|
||||
extern uint64_t ia64_xtrace_mask;
|
||||
|
||||
static uint64_t ia64_xtrace_base;
|
||||
|
||||
static void
|
||||
ia64_xtrace_init_common(vm_paddr_t pa)
|
||||
{
|
||||
uint64_t psr;
|
||||
pt_entry_t pte;
|
||||
|
||||
pte = PTE_PRESENT | PTE_MA_WB | PTE_ACCESSED | PTE_DIRTY |
|
||||
PTE_PL_KERN | PTE_AR_RW;
|
||||
pte |= pa & PTE_PPN_MASK;
|
||||
|
||||
__asm __volatile("ptr.d %0,%1" :: "r"(ia64_xtrace_base),
|
||||
"r"(XTRACE_LOG2SZ << 2));
|
||||
|
||||
__asm __volatile("mov %0=psr" : "=r"(psr));
|
||||
__asm __volatile("rsm psr.ic|psr.i");
|
||||
ia64_srlz_i();
|
||||
|
||||
ia64_set_ifa(ia64_xtrace_base);
|
||||
ia64_set_itir(XTRACE_LOG2SZ << 2);
|
||||
ia64_srlz_d();
|
||||
__asm __volatile("itr.d dtr[%0]=%1" :: "r"(6), "r"(pte));
|
||||
|
||||
__asm __volatile("mov psr.l=%0" :: "r" (psr));
|
||||
ia64_srlz_i();
|
||||
|
||||
PCPU_SET(md.xtrace_tail, ia64_xtrace_base);
|
||||
ia64_set_k3(ia64_xtrace_base);
|
||||
}
|
||||
|
||||
void *
|
||||
ia64_xtrace_alloc(void)
|
||||
{
|
||||
uintptr_t buf;
|
||||
size_t sz;
|
||||
|
||||
sz = 1UL << XTRACE_LOG2SZ;
|
||||
buf = kmem_alloc_contig(kernel_arena, sz, M_WAITOK | M_ZERO,
|
||||
0UL, ~0UL, sz, 0, VM_MEMATTR_DEFAULT);
|
||||
return ((void *)buf);
|
||||
}
|
||||
|
||||
void
|
||||
ia64_xtrace_init_ap(void *buf)
|
||||
{
|
||||
vm_paddr_t pa;
|
||||
|
||||
if (buf == NULL) {
|
||||
ia64_set_k3(0);
|
||||
return;
|
||||
}
|
||||
PCPU_SET(md.xtrace_buffer, buf);
|
||||
pa = ia64_tpa((uintptr_t)buf);
|
||||
ia64_xtrace_init_common(pa);
|
||||
}
|
||||
|
||||
void
|
||||
ia64_xtrace_init_bsp(void)
|
||||
{
|
||||
void *buf;
|
||||
vm_paddr_t pa;
|
||||
size_t sz;
|
||||
|
||||
sz = 1UL << XTRACE_LOG2SZ;
|
||||
ia64_xtrace_base = VM_MIN_KERNEL_ADDRESS + (sz << 1);
|
||||
ia64_xtrace_mask = ~sz;
|
||||
|
||||
buf = ia64_physmem_alloc(sz, sz);
|
||||
if (buf == NULL) {
|
||||
ia64_set_k3(0);
|
||||
return;
|
||||
}
|
||||
PCPU_SET(md.xtrace_buffer, buf);
|
||||
pa = IA64_RR_MASK((uintptr_t)buf);
|
||||
ia64_xtrace_init_common(pa);
|
||||
}
|
||||
|
||||
static void
|
||||
ia64_xtrace_init(void *dummy __unused)
|
||||
{
|
||||
|
||||
TUNABLE_INT_FETCH("machdep.xtrace.enabled", &ia64_xtrace_enabled);
|
||||
}
|
||||
SYSINIT(xtrace, SI_SUB_CPU, SI_ORDER_ANY, ia64_xtrace_init, NULL);
|
||||
|
||||
void
|
||||
ia64_xtrace_save(void)
|
||||
{
|
||||
struct ia64_xtrace_record *rec;
|
||||
uint64_t head, tail;
|
||||
|
||||
critical_enter();
|
||||
head = ia64_get_k3();
|
||||
tail = PCPU_GET(md.xtrace_tail);
|
||||
if (head == 0 || tail == 0) {
|
||||
critical_exit();
|
||||
return;
|
||||
}
|
||||
while (head != tail) {
|
||||
rec = (void *)(uintptr_t)tail;
|
||||
CTR6(KTR_TRAP, "XTRACE: itc=%lu, ticks=%d: "
|
||||
"IVT=%#lx, IIP=%#lx, IFA=%#lx, ISR=%#lx",
|
||||
rec->itc, ticks,
|
||||
rec->ivt, rec->iip, rec->ifa, rec->isr);
|
||||
tail += sizeof(*rec);
|
||||
tail &= ia64_xtrace_mask;
|
||||
}
|
||||
PCPU_SET(md.xtrace_tail, tail);
|
||||
critical_exit();
|
||||
}
|
||||
|
||||
void
|
||||
ia64_xtrace_stop(void)
|
||||
{
|
||||
ia64_xtrace_enabled = 0;
|
||||
}
|
||||
|
||||
#if 0
|
||||
#ifdef DDB
|
||||
|
||||
#include <ddb/ddb.h>
|
||||
|
||||
DB_SHOW_COMMAND(xtrace, db_xtrace)
|
||||
{
|
||||
struct ia64_xtrace_record *p, *r;
|
||||
|
||||
p = (ia64_xtptr == 0) ? ia64_xtptr1 : ia64_xtptr;
|
||||
if (p == 0) {
|
||||
db_printf("Exception trace buffer not allocated\n");
|
||||
return;
|
||||
}
|
||||
|
||||
r = (p->ivt == 0) ? ia64_xtbase : p;
|
||||
if (r->ivt == 0) {
|
||||
db_printf("No exception trace records written\n");
|
||||
return;
|
||||
}
|
||||
|
||||
db_printf("IVT\t\t ITC\t\t IIP\t\t IFA\n");
|
||||
do {
|
||||
db_printf("%016lx %016lx %016lx %016lx\n",
|
||||
r->ivt, r->itc, r->iip, r->ifa);
|
||||
r++;
|
||||
if (r == ia64_xtlim)
|
||||
r = ia64_xtbase;
|
||||
} while (r != p);
|
||||
}
|
||||
|
||||
#endif /* DDB */
|
||||
#endif
|
@ -102,6 +102,11 @@ int ia64_physmem_init(void);
|
||||
int ia64_physmem_track(vm_paddr_t, vm_size_t);
|
||||
void ia64_probe_sapics(void);
|
||||
void ia64_sync_icache(vm_offset_t, vm_size_t);
|
||||
void *ia64_xtrace_alloc(void);
|
||||
void ia64_xtrace_init_ap(void *);
|
||||
void ia64_xtrace_init_bsp(void);
|
||||
void ia64_xtrace_save(void);
|
||||
void ia64_xtrace_stop(void);
|
||||
void interrupt(struct trapframe *);
|
||||
void map_gateway_page(void);
|
||||
void map_pal_code(void);
|
||||
|
@ -56,6 +56,8 @@ struct pcpu_md {
|
||||
uint32_t clock_mode; /* Clock ET mode */
|
||||
uint32_t awake:1; /* CPU is awake? */
|
||||
struct pcpu_stats stats; /* Interrupt stats. */
|
||||
void *xtrace_buffer;
|
||||
uint64_t xtrace_tail;
|
||||
#ifdef _KERNEL
|
||||
struct sysctl_ctx_list sysctl_ctx;
|
||||
struct sysctl_oid *sysctl_tree;
|
||||
@ -65,7 +67,7 @@ struct pcpu_md {
|
||||
#define PCPU_MD_FIELDS \
|
||||
uint32_t pc_acpi_id; /* ACPI CPU id. */ \
|
||||
struct pcpu_md pc_md; /* MD fields. */ \
|
||||
char __pad[1265]
|
||||
char __pad[10*128]
|
||||
|
||||
#ifdef _KERNEL
|
||||
|
||||
|
@ -32,6 +32,7 @@ struct ia64_ap_state {
|
||||
void *as_kstack;
|
||||
void *as_kstack_top;
|
||||
struct pcpu *as_pcpu;
|
||||
void *as_xtrace_buffer;
|
||||
volatile int as_delay;
|
||||
volatile u_int as_awake;
|
||||
volatile u_int as_spin;
|
||||
|
Loading…
Reference in New Issue
Block a user