Clock divisors 0-3 correspond to dividing by 1-4, so add 1 before dividing.
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svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=256774
@ -278,8 +278,8 @@ imx51_get_clock(enum imx51_clock clk)
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case IMX51CLK_MAIN_BUS_CLK:
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freq = imx51_get_clock(IMX51CLK_MAIN_BUS_CLK_SRC);
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cdcr = bus_read_4(ccm_softc->res[0], CCMC_CDCR);
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return freq / (cdcr & CDCR_PERIPH_CLK_DVFS_PODF_MASK) >>
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CDCR_PERIPH_CLK_DVFS_PODF_SHIFT;
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return freq / (1 + ((cdcr & CDCR_PERIPH_CLK_DVFS_PODF_MASK) >>
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CDCR_PERIPH_CLK_DVFS_PODF_SHIFT));
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case IMX51CLK_AHB_CLK_ROOT:
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freq = imx51_get_clock(IMX51CLK_MAIN_BUS_CLK);
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cbcdr = bus_read_4(ccm_softc->res[0], CCMC_CBCDR);
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