sfxge(4): add Medford2 support to NIC module
Submitted by: Andy Moreton <amoreton at solarflare.com> Sponsored by: Solarflare Communications, Inc. Differential Revision: https://reviews.freebsd.org/D18142
This commit is contained in:
parent
553455ea93
commit
ae64ac9336
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=341020
@ -444,6 +444,7 @@ dev/sfxge/common/efx_vpd.c optional sfxge pci
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dev/sfxge/common/hunt_nic.c optional sfxge pci
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dev/sfxge/common/mcdi_mon.c optional sfxge pci
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dev/sfxge/common/medford_nic.c optional sfxge pci
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dev/sfxge/common/medford2_nic.c optional sfxge pci
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dev/sfxge/common/siena_mac.c optional sfxge pci
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dev/sfxge/common/siena_mcdi.c optional sfxge pci
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dev/sfxge/common/siena_nic.c optional sfxge pci
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@ -37,7 +37,7 @@ __FBSDID("$FreeBSD$");
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#include "mcdi_mon.h"
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#endif
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#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD
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#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
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#include "ef10_tlv_layout.h"
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@ -52,7 +52,8 @@ efx_mcdi_get_port_assignment(
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efx_rc_t rc;
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EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
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enp->en_family == EFX_FAMILY_MEDFORD);
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enp->en_family == EFX_FAMILY_MEDFORD ||
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enp->en_family == EFX_FAMILY_MEDFORD2);
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(void) memset(payload, 0, sizeof (payload));
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req.emr_cmd = MC_CMD_GET_PORT_ASSIGNMENT;
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@ -97,7 +98,8 @@ efx_mcdi_get_port_modes(
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efx_rc_t rc;
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EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
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enp->en_family == EFX_FAMILY_MEDFORD);
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enp->en_family == EFX_FAMILY_MEDFORD ||
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enp->en_family == EFX_FAMILY_MEDFORD2);
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(void) memset(payload, 0, sizeof (payload));
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req.emr_cmd = MC_CMD_GET_PORT_MODES;
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@ -277,7 +279,8 @@ efx_mcdi_get_mac_address_pf(
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efx_rc_t rc;
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EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
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enp->en_family == EFX_FAMILY_MEDFORD);
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enp->en_family == EFX_FAMILY_MEDFORD ||
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enp->en_family == EFX_FAMILY_MEDFORD2);
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(void) memset(payload, 0, sizeof (payload));
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req.emr_cmd = MC_CMD_GET_MAC_ADDRESSES;
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@ -335,7 +338,8 @@ efx_mcdi_get_mac_address_vf(
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efx_rc_t rc;
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EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
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enp->en_family == EFX_FAMILY_MEDFORD);
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enp->en_family == EFX_FAMILY_MEDFORD ||
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enp->en_family == EFX_FAMILY_MEDFORD2);
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(void) memset(payload, 0, sizeof (payload));
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req.emr_cmd = MC_CMD_VPORT_GET_MAC_ADDRESSES;
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@ -399,7 +403,8 @@ efx_mcdi_get_clock(
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efx_rc_t rc;
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EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
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enp->en_family == EFX_FAMILY_MEDFORD);
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enp->en_family == EFX_FAMILY_MEDFORD ||
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enp->en_family == EFX_FAMILY_MEDFORD2);
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(void) memset(payload, 0, sizeof (payload));
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req.emr_cmd = MC_CMD_GET_CLOCK;
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@ -810,7 +815,8 @@ ef10_nic_pio_alloc(
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efx_rc_t rc;
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EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
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enp->en_family == EFX_FAMILY_MEDFORD);
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enp->en_family == EFX_FAMILY_MEDFORD ||
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enp->en_family == EFX_FAMILY_MEDFORD2);
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EFSYS_ASSERT(bufnump);
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EFSYS_ASSERT(handlep);
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EFSYS_ASSERT(blknump);
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@ -1310,7 +1316,8 @@ ef10_nic_probe(
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efx_rc_t rc;
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EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
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enp->en_family == EFX_FAMILY_MEDFORD);
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enp->en_family == EFX_FAMILY_MEDFORD ||
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enp->en_family == EFX_FAMILY_MEDFORD2);
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/* Read and clear any assertion state */
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if ((rc = efx_mcdi_read_assertion(enp)) != 0)
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@ -1524,7 +1531,8 @@ ef10_nic_init(
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efx_rc_t rc;
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EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
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enp->en_family == EFX_FAMILY_MEDFORD);
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enp->en_family == EFX_FAMILY_MEDFORD ||
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enp->en_family == EFX_FAMILY_MEDFORD2);
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/* Enable reporting of some events (e.g. link change) */
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if ((rc = efx_mcdi_log_ctrl(enp)) != 0)
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@ -1680,7 +1688,8 @@ ef10_nic_get_vi_pool(
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__out uint32_t *vi_countp)
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{
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EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
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enp->en_family == EFX_FAMILY_MEDFORD);
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enp->en_family == EFX_FAMILY_MEDFORD ||
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enp->en_family == EFX_FAMILY_MEDFORD2);
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/*
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* Report VIs that the client driver can use.
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@ -1701,7 +1710,8 @@ ef10_nic_get_bar_region(
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efx_rc_t rc;
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EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
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enp->en_family == EFX_FAMILY_MEDFORD);
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enp->en_family == EFX_FAMILY_MEDFORD ||
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enp->en_family == EFX_FAMILY_MEDFORD2);
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/*
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* TODO: Specify host memory mapping alignment and granularity
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@ -1798,4 +1808,4 @@ ef10_nic_register_test(
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#endif /* EFSYS_OPT_DIAG */
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#endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD */
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#endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
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@ -204,7 +204,7 @@ efx_nic_check_pcie_link_speed(
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#if EFSYS_OPT_MCDI
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#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD
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#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
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/* Huntington and Medford require MCDIv2 commands */
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#define WITH_MCDI_V2 1
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#endif
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@ -1172,11 +1172,11 @@ typedef struct efx_nic_cfg_s {
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#if EFSYS_OPT_BIST
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uint32_t enc_bist_mask;
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#endif /* EFSYS_OPT_BIST */
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#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD
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#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
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uint32_t enc_pf;
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uint32_t enc_vf;
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uint32_t enc_privilege_mask;
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#endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD */
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#endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
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boolean_t enc_bug26807_workaround;
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boolean_t enc_bug35388_workaround;
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boolean_t enc_bug41750_workaround;
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@ -57,9 +57,13 @@
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#include "medford_impl.h"
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#endif /* EFSYS_OPT_MEDFORD */
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#if (EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD)
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#if EFSYS_OPT_MEDFORD2
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#include "medford2_impl.h"
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#endif /* EFSYS_OPT_MEDFORD2 */
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#if (EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2)
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#include "ef10_impl.h"
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#endif /* (EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD) */
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#endif /* (EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2) */
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#ifdef __cplusplus
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extern "C" {
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@ -426,9 +430,9 @@ typedef struct efx_filter_s {
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#if EFSYS_OPT_SIENA
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siena_filter_t *ef_siena_filter;
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#endif /* EFSYS_OPT_SIENA */
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#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD
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#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
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ef10_filter_table_t *ef_ef10_filter_table;
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#endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD */
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#endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
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} efx_filter_t;
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#if EFSYS_OPT_SIENA
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@ -711,7 +715,7 @@ struct efx_nic_s {
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#endif /* EFSYS_OPT_SIENA */
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int enu_unused;
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} en_u;
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#if (EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD)
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#if (EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2)
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union en_arch {
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struct {
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int ena_vi_base;
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@ -732,7 +736,7 @@ struct efx_nic_s {
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size_t ena_wc_mem_map_size;
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} ef10;
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} en_arch;
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#endif /* (EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD) */
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#endif /* (EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2) */
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};
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@ -853,6 +857,10 @@ struct efx_txq_s {
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rev = 'E'; \
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break; \
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\
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case EFX_FAMILY_MEDFORD2: \
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rev = 'F'; \
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break; \
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\
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default: \
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rev = '?'; \
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break; \
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@ -97,6 +97,24 @@ efx_family(
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return (0);
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#endif /* EFSYS_OPT_MEDFORD */
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#if EFSYS_OPT_MEDFORD2
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case EFX_PCI_DEVID_MEDFORD2_PF_UNINIT:
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/*
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* Hardware default for PF0 of uninitialised Medford2.
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* manftest must be able to cope with this device id.
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*/
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*efp = EFX_FAMILY_MEDFORD2;
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return (0);
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case EFX_PCI_DEVID_MEDFORD2:
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*efp = EFX_FAMILY_MEDFORD2;
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return (0);
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case EFX_PCI_DEVID_MEDFORD2_VF:
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*efp = EFX_FAMILY_MEDFORD2;
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return (0);
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#endif /* EFSYS_OPT_MEDFORD2 */
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case EFX_PCI_DEVID_FALCON: /* Obsolete, not supported */
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default:
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break;
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@ -164,6 +182,25 @@ static const efx_nic_ops_t __efx_nic_medford_ops = {
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#endif /* EFSYS_OPT_MEDFORD */
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#if EFSYS_OPT_MEDFORD2
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static const efx_nic_ops_t __efx_nic_medford2_ops = {
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ef10_nic_probe, /* eno_probe */
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medford2_board_cfg, /* eno_board_cfg */
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ef10_nic_set_drv_limits, /* eno_set_drv_limits */
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ef10_nic_reset, /* eno_reset */
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ef10_nic_init, /* eno_init */
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ef10_nic_get_vi_pool, /* eno_get_vi_pool */
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ef10_nic_get_bar_region, /* eno_get_bar_region */
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#if EFSYS_OPT_DIAG
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ef10_nic_register_test, /* eno_register_test */
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#endif /* EFSYS_OPT_DIAG */
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ef10_nic_fini, /* eno_fini */
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ef10_nic_unprobe, /* eno_unprobe */
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};
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#endif /* EFSYS_OPT_MEDFORD2 */
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__checkReturn efx_rc_t
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efx_nic_create(
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@ -242,6 +279,22 @@ efx_nic_create(
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break;
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#endif /* EFSYS_OPT_MEDFORD */
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#if EFSYS_OPT_MEDFORD2
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case EFX_FAMILY_MEDFORD2:
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enp->en_enop = &__efx_nic_medford2_ops;
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enp->en_features =
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EFX_FEATURE_IPV6 |
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EFX_FEATURE_LINK_EVENTS |
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EFX_FEATURE_PERIODIC_MAC_STATS |
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EFX_FEATURE_MCDI |
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EFX_FEATURE_MAC_HEADER_FILTERS |
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EFX_FEATURE_MCDI_DMA |
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EFX_FEATURE_PIO_BUFFERS |
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EFX_FEATURE_FW_ASSISTED_TSO_V2 |
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EFX_FEATURE_PACKED_STREAM;
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break;
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#endif /* EFSYS_OPT_MEDFORD2 */
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default:
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rc = ENOTSUP;
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goto fail2;
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63
sys/dev/sfxge/common/medford2_impl.h
Normal file
63
sys/dev/sfxge/common/medford2_impl.h
Normal file
@ -0,0 +1,63 @@
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/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2015-2018 Solarflare Communications Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* The views and conclusions contained in the software and documentation are
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* those of the authors and should not be interpreted as representing official
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* policies, either expressed or implied, of the FreeBSD Project.
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*
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* $FreeBSD$
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*/
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#ifndef _SYS_MEDFORD2_IMPL_H
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#define _SYS_MEDFORD2_IMPL_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifndef ER_EZ_TX_PIOBUF_SIZE
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#define ER_EZ_TX_PIOBUF_SIZE 4096
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#endif
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#define MEDFORD2_PIOBUF_NBUFS (16)
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#define MEDFORD2_PIOBUF_SIZE (ER_EZ_TX_PIOBUF_SIZE)
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#define MEDFORD2_MIN_PIO_ALLOC_SIZE (MEDFORD2_PIOBUF_SIZE / 32)
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extern __checkReturn efx_rc_t
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medford2_board_cfg(
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__in efx_nic_t *enp);
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#ifdef __cplusplus
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}
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#endif
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#endif /* _SYS_MEDFORD2_IMPL_H */
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417
sys/dev/sfxge/common/medford2_nic.c
Normal file
417
sys/dev/sfxge/common/medford2_nic.c
Normal file
@ -0,0 +1,417 @@
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/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2015-2018 Solarflare Communications Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
|
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* this list of conditions and the following disclaimer.
|
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* 2. Redistributions in binary form must reproduce the above copyright notice,
|
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* The views and conclusions contained in the software and documentation are
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* those of the authors and should not be interpreted as representing official
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* policies, either expressed or implied, of the FreeBSD Project.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "efx.h"
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#include "efx_impl.h"
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#if EFSYS_OPT_MEDFORD2
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static __checkReturn efx_rc_t
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efx_mcdi_get_rxdp_config(
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__in efx_nic_t *enp,
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__out uint32_t *end_paddingp)
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{
|
||||
efx_mcdi_req_t req;
|
||||
uint8_t payload[MAX(MC_CMD_GET_RXDP_CONFIG_IN_LEN,
|
||||
MC_CMD_GET_RXDP_CONFIG_OUT_LEN)];
|
||||
uint32_t end_padding;
|
||||
efx_rc_t rc;
|
||||
|
||||
memset(payload, 0, sizeof (payload));
|
||||
req.emr_cmd = MC_CMD_GET_RXDP_CONFIG;
|
||||
req.emr_in_buf = payload;
|
||||
req.emr_in_length = MC_CMD_GET_RXDP_CONFIG_IN_LEN;
|
||||
req.emr_out_buf = payload;
|
||||
req.emr_out_length = MC_CMD_GET_RXDP_CONFIG_OUT_LEN;
|
||||
|
||||
efx_mcdi_execute(enp, &req);
|
||||
if (req.emr_rc != 0) {
|
||||
rc = req.emr_rc;
|
||||
goto fail1;
|
||||
}
|
||||
|
||||
if (MCDI_OUT_DWORD_FIELD(req, GET_RXDP_CONFIG_OUT_DATA,
|
||||
GET_RXDP_CONFIG_OUT_PAD_HOST_DMA) == 0) {
|
||||
/* RX DMA end padding is disabled */
|
||||
end_padding = 0;
|
||||
} else {
|
||||
switch (MCDI_OUT_DWORD_FIELD(req, GET_RXDP_CONFIG_OUT_DATA,
|
||||
GET_RXDP_CONFIG_OUT_PAD_HOST_LEN)) {
|
||||
case MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_64:
|
||||
end_padding = 64;
|
||||
break;
|
||||
case MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_128:
|
||||
end_padding = 128;
|
||||
break;
|
||||
case MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_256:
|
||||
end_padding = 256;
|
||||
break;
|
||||
default:
|
||||
rc = ENOTSUP;
|
||||
goto fail2;
|
||||
}
|
||||
}
|
||||
|
||||
*end_paddingp = end_padding;
|
||||
|
||||
return (0);
|
||||
|
||||
fail2:
|
||||
EFSYS_PROBE(fail2);
|
||||
fail1:
|
||||
EFSYS_PROBE1(fail1, efx_rc_t, rc);
|
||||
|
||||
return (rc);
|
||||
}
|
||||
|
||||
static __checkReturn efx_rc_t
|
||||
medford2_nic_get_required_pcie_bandwidth(
|
||||
__in efx_nic_t *enp,
|
||||
__out uint32_t *bandwidth_mbpsp)
|
||||
{
|
||||
uint32_t port_modes;
|
||||
uint32_t current_mode;
|
||||
uint32_t bandwidth;
|
||||
efx_rc_t rc;
|
||||
|
||||
/* FIXME: support new Medford2 dynamic port modes */
|
||||
|
||||
if ((rc = efx_mcdi_get_port_modes(enp, &port_modes,
|
||||
¤t_mode)) != 0) {
|
||||
/* No port mode info available. */
|
||||
bandwidth = 0;
|
||||
goto out;
|
||||
}
|
||||
|
||||
if ((rc = ef10_nic_get_port_mode_bandwidth(current_mode,
|
||||
&bandwidth)) != 0)
|
||||
goto fail1;
|
||||
|
||||
out:
|
||||
*bandwidth_mbpsp = bandwidth;
|
||||
|
||||
return (0);
|
||||
|
||||
fail1:
|
||||
EFSYS_PROBE1(fail1, efx_rc_t, rc);
|
||||
|
||||
return (rc);
|
||||
}
|
||||
|
||||
__checkReturn efx_rc_t
|
||||
medford2_board_cfg(
|
||||
__in efx_nic_t *enp)
|
||||
{
|
||||
efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
|
||||
efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
|
||||
uint8_t mac_addr[6] = { 0 };
|
||||
uint32_t board_type = 0;
|
||||
ef10_link_state_t els;
|
||||
efx_port_t *epp = &(enp->en_port);
|
||||
uint32_t port;
|
||||
uint32_t pf;
|
||||
uint32_t vf;
|
||||
uint32_t mask;
|
||||
uint32_t sysclk, dpcpu_clk;
|
||||
uint32_t base, nvec;
|
||||
uint32_t end_padding;
|
||||
uint32_t bandwidth;
|
||||
efx_rc_t rc;
|
||||
|
||||
/*
|
||||
* FIXME: Likely to be incomplete and incorrect.
|
||||
* Parts of this should be shared with Huntington.
|
||||
*/
|
||||
|
||||
if ((rc = efx_mcdi_get_port_assignment(enp, &port)) != 0)
|
||||
goto fail1;
|
||||
|
||||
/*
|
||||
* NOTE: The MCDI protocol numbers ports from zero.
|
||||
* The common code MCDI interface numbers ports from one.
|
||||
*/
|
||||
emip->emi_port = port + 1;
|
||||
|
||||
if ((rc = ef10_external_port_mapping(enp, port,
|
||||
&encp->enc_external_port)) != 0)
|
||||
goto fail2;
|
||||
|
||||
/*
|
||||
* Get PCIe function number from firmware (used for
|
||||
* per-function privilege and dynamic config info).
|
||||
* - PCIe PF: pf = PF number, vf = 0xffff.
|
||||
* - PCIe VF: pf = parent PF, vf = VF number.
|
||||
*/
|
||||
if ((rc = efx_mcdi_get_function_info(enp, &pf, &vf)) != 0)
|
||||
goto fail3;
|
||||
|
||||
encp->enc_pf = pf;
|
||||
encp->enc_vf = vf;
|
||||
|
||||
/* MAC address for this function */
|
||||
if (EFX_PCI_FUNCTION_IS_PF(encp)) {
|
||||
rc = efx_mcdi_get_mac_address_pf(enp, mac_addr);
|
||||
#if EFSYS_OPT_ALLOW_UNCONFIGURED_NIC
|
||||
/*
|
||||
* Disable static config checking for Medford NICs, ONLY
|
||||
* for manufacturing test and setup at the factory, to
|
||||
* allow the static config to be installed.
|
||||
*/
|
||||
#else /* EFSYS_OPT_ALLOW_UNCONFIGURED_NIC */
|
||||
if ((rc == 0) && (mac_addr[0] & 0x02)) {
|
||||
/*
|
||||
* If the static config does not include a global MAC
|
||||
* address pool then the board may return a locally
|
||||
* administered MAC address (this should only happen on
|
||||
* incorrectly programmed boards).
|
||||
*/
|
||||
rc = EINVAL;
|
||||
}
|
||||
#endif /* EFSYS_OPT_ALLOW_UNCONFIGURED_NIC */
|
||||
} else {
|
||||
rc = efx_mcdi_get_mac_address_vf(enp, mac_addr);
|
||||
}
|
||||
if (rc != 0)
|
||||
goto fail4;
|
||||
|
||||
EFX_MAC_ADDR_COPY(encp->enc_mac_addr, mac_addr);
|
||||
|
||||
/* Board configuration */
|
||||
rc = efx_mcdi_get_board_cfg(enp, &board_type, NULL, NULL);
|
||||
if (rc != 0) {
|
||||
/* Unprivileged functions may not be able to read board cfg */
|
||||
if (rc == EACCES)
|
||||
board_type = 0;
|
||||
else
|
||||
goto fail5;
|
||||
}
|
||||
|
||||
encp->enc_board_type = board_type;
|
||||
encp->enc_clk_mult = 1; /* not used for Medford2 */
|
||||
|
||||
/* Fill out fields in enp->en_port and enp->en_nic_cfg from MCDI */
|
||||
if ((rc = efx_mcdi_get_phy_cfg(enp)) != 0)
|
||||
goto fail6;
|
||||
|
||||
/* Obtain the default PHY advertised capabilities */
|
||||
if ((rc = ef10_phy_get_link(enp, &els)) != 0)
|
||||
goto fail7;
|
||||
epp->ep_default_adv_cap_mask = els.els_adv_cap_mask;
|
||||
epp->ep_adv_cap_mask = els.els_adv_cap_mask;
|
||||
|
||||
/*
|
||||
* Enable firmware workarounds for hardware errata.
|
||||
* Expected responses are:
|
||||
* - 0 (zero):
|
||||
* Success: workaround enabled or disabled as requested.
|
||||
* - MC_CMD_ERR_ENOSYS (reported as ENOTSUP):
|
||||
* Firmware does not support the MC_CMD_WORKAROUND request.
|
||||
* (assume that the workaround is not supported).
|
||||
* - MC_CMD_ERR_ENOENT (reported as ENOENT):
|
||||
* Firmware does not support the requested workaround.
|
||||
* - MC_CMD_ERR_EPERM (reported as EACCES):
|
||||
* Unprivileged function cannot enable/disable workarounds.
|
||||
*
|
||||
* See efx_mcdi_request_errcode() for MCDI error translations.
|
||||
*/
|
||||
|
||||
|
||||
if (EFX_PCI_FUNCTION_IS_VF(encp)) {
|
||||
/*
|
||||
* Interrupt testing does not work for VFs. See bug50084.
|
||||
* FIXME: Does this still apply to Medford2?
|
||||
*/
|
||||
encp->enc_bug41750_workaround = B_TRUE;
|
||||
}
|
||||
|
||||
/* Chained multicast is always enabled on Medford2 */
|
||||
encp->enc_bug26807_workaround = B_TRUE;
|
||||
|
||||
/*
|
||||
* If the bug61265 workaround is enabled, then interrupt holdoff timers
|
||||
* cannot be controlled by timer table writes, so MCDI must be used
|
||||
* (timer table writes can still be used for wakeup timers).
|
||||
*/
|
||||
rc = efx_mcdi_set_workaround(enp, MC_CMD_WORKAROUND_BUG61265, B_TRUE,
|
||||
NULL);
|
||||
if ((rc == 0) || (rc == EACCES))
|
||||
encp->enc_bug61265_workaround = B_TRUE;
|
||||
else if ((rc == ENOTSUP) || (rc == ENOENT))
|
||||
encp->enc_bug61265_workaround = B_FALSE;
|
||||
else
|
||||
goto fail8;
|
||||
|
||||
/* Get clock frequencies (in MHz). */
|
||||
if ((rc = efx_mcdi_get_clock(enp, &sysclk, &dpcpu_clk)) != 0)
|
||||
goto fail9;
|
||||
|
||||
/*
|
||||
* The Medford2 timer quantum is 1536 dpcpu_clk cycles, documented for
|
||||
* the EV_TMR_VAL field of EV_TIMER_TBL. Scale for MHz and ns units.
|
||||
*/
|
||||
encp->enc_evq_timer_quantum_ns = 1536000UL / dpcpu_clk; /* 1536 cycles */
|
||||
encp->enc_evq_timer_max_us = (encp->enc_evq_timer_quantum_ns <<
|
||||
FRF_CZ_TC_TIMER_VAL_WIDTH) / 1000;
|
||||
|
||||
/* Check capabilities of running datapath firmware */
|
||||
if ((rc = ef10_get_datapath_caps(enp)) != 0)
|
||||
goto fail10;
|
||||
|
||||
/* Alignment for receive packet DMA buffers */
|
||||
encp->enc_rx_buf_align_start = 1;
|
||||
|
||||
/* Get the RX DMA end padding alignment configuration */
|
||||
if ((rc = efx_mcdi_get_rxdp_config(enp, &end_padding)) != 0) {
|
||||
if (rc != EACCES)
|
||||
goto fail11;
|
||||
|
||||
/* Assume largest tail padding size supported by hardware */
|
||||
end_padding = 256;
|
||||
}
|
||||
encp->enc_rx_buf_align_end = end_padding;
|
||||
|
||||
/* Alignment for WPTR updates */
|
||||
encp->enc_rx_push_align = EF10_RX_WPTR_ALIGN;
|
||||
|
||||
/*
|
||||
* Maximum number of exclusive RSS contexts which can be allocated. The
|
||||
* hardware supports 64, but 6 are reserved for shared contexts. They
|
||||
* are a global resource so not all may be available.
|
||||
*/
|
||||
encp->enc_rx_scale_max_exclusive_contexts = 58;
|
||||
|
||||
encp->enc_tx_dma_desc_size_max = EFX_MASK32(ESF_DZ_RX_KER_BYTE_CNT);
|
||||
/* No boundary crossing limits */
|
||||
encp->enc_tx_dma_desc_boundary = 0;
|
||||
|
||||
/*
|
||||
* Set resource limits for MC_CMD_ALLOC_VIS. Note that we cannot use
|
||||
* MC_CMD_GET_RESOURCE_LIMITS here as that reports the available
|
||||
* resources (allocated to this PCIe function), which is zero until
|
||||
* after we have allocated VIs.
|
||||
*/
|
||||
encp->enc_evq_limit = 1024;
|
||||
encp->enc_rxq_limit = EFX_RXQ_LIMIT_TARGET;
|
||||
encp->enc_txq_limit = EFX_TXQ_LIMIT_TARGET;
|
||||
|
||||
/*
|
||||
* The maximum supported transmit queue size is 2048. TXQs with 4096
|
||||
* descriptors are not supported as the top bit is used for vfifo
|
||||
* stuffing.
|
||||
*/
|
||||
encp->enc_txq_max_ndescs = 2048;
|
||||
|
||||
encp->enc_buftbl_limit = 0xFFFFFFFF;
|
||||
|
||||
encp->enc_piobuf_limit = MEDFORD2_PIOBUF_NBUFS;
|
||||
encp->enc_piobuf_size = MEDFORD2_PIOBUF_SIZE;
|
||||
encp->enc_piobuf_min_alloc_size = MEDFORD2_MIN_PIO_ALLOC_SIZE;
|
||||
|
||||
/*
|
||||
* Get the current privilege mask. Note that this may be modified
|
||||
* dynamically, so this value is informational only. DO NOT use
|
||||
* the privilege mask to check for sufficient privileges, as that
|
||||
* can result in time-of-check/time-of-use bugs.
|
||||
*/
|
||||
if ((rc = ef10_get_privilege_mask(enp, &mask)) != 0)
|
||||
goto fail12;
|
||||
encp->enc_privilege_mask = mask;
|
||||
|
||||
/* Get interrupt vector limits */
|
||||
if ((rc = efx_mcdi_get_vector_cfg(enp, &base, &nvec, NULL)) != 0) {
|
||||
if (EFX_PCI_FUNCTION_IS_PF(encp))
|
||||
goto fail13;
|
||||
|
||||
/* Ignore error (cannot query vector limits from a VF). */
|
||||
base = 0;
|
||||
nvec = 1024;
|
||||
}
|
||||
encp->enc_intr_vec_base = base;
|
||||
encp->enc_intr_limit = nvec;
|
||||
|
||||
/*
|
||||
* Maximum number of bytes into the frame the TCP header can start for
|
||||
* firmware assisted TSO to work.
|
||||
*/
|
||||
encp->enc_tx_tso_tcp_header_offset_limit = EF10_TCP_HEADER_OFFSET_LIMIT;
|
||||
|
||||
/*
|
||||
* Medford2 stores a single global copy of VPD, not per-PF as on
|
||||
* Huntington.
|
||||
*/
|
||||
encp->enc_vpd_is_global = B_TRUE;
|
||||
|
||||
rc = medford2_nic_get_required_pcie_bandwidth(enp, &bandwidth);
|
||||
if (rc != 0)
|
||||
goto fail14;
|
||||
encp->enc_required_pcie_bandwidth_mbps = bandwidth;
|
||||
encp->enc_max_pcie_link_gen = EFX_PCIE_LINK_SPEED_GEN3;
|
||||
|
||||
return (0);
|
||||
|
||||
fail14:
|
||||
EFSYS_PROBE(fail14);
|
||||
fail13:
|
||||
EFSYS_PROBE(fail13);
|
||||
fail12:
|
||||
EFSYS_PROBE(fail12);
|
||||
fail11:
|
||||
EFSYS_PROBE(fail11);
|
||||
fail10:
|
||||
EFSYS_PROBE(fail10);
|
||||
fail9:
|
||||
EFSYS_PROBE(fail9);
|
||||
fail8:
|
||||
EFSYS_PROBE(fail8);
|
||||
fail7:
|
||||
EFSYS_PROBE(fail7);
|
||||
fail6:
|
||||
EFSYS_PROBE(fail6);
|
||||
fail5:
|
||||
EFSYS_PROBE(fail5);
|
||||
fail4:
|
||||
EFSYS_PROBE(fail4);
|
||||
fail3:
|
||||
EFSYS_PROBE(fail3);
|
||||
fail2:
|
||||
EFSYS_PROBE(fail2);
|
||||
fail1:
|
||||
EFSYS_PROBE1(fail1, efx_rc_t, rc);
|
||||
|
||||
return (rc);
|
||||
}
|
||||
|
||||
#endif /* EFSYS_OPT_MEDFORD2 */
|
@ -40,6 +40,9 @@ SRCS+= hunt_impl.h
|
||||
SRCS+= medford_nic.c
|
||||
SRCS+= medford_impl.h
|
||||
|
||||
SRCS+= medford2_nic.c
|
||||
SRCS+= medford2_impl.h
|
||||
|
||||
# Extra debug checks
|
||||
#CFLAGS += -DDEBUG=1
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user