Make the handshake lines do the right thing. This is untested by the author
but others say it's working. (DTR etc) Closes PR#884 Submitted-by: John Hay <jhay@mikom.csir.co.za>
This commit is contained in:
Peter Wemm
parent
0dbf6d736f
commit
af6646cdc5
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=14349
@ -28,7 +28,7 @@
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id: if_ar.c,v 1.4 1995/12/15 00:54:03 bde Exp $
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* $Id: if_ar.c,v 1.5 1996/02/06 18:50:32 wollman Exp $
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*/
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/*
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@ -710,10 +710,10 @@ static void ar_up(struct ar_softc *sc)
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* And what about CTS/DCD etc... ?
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*/
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if(sc->hc->handshake & AR_SHSK_RTS)
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msci->ctl |= SCA_CTL_RTS;
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msci->ctl &= ~SCA_CTL_RTS;
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if(sc->hc->handshake & AR_SHSK_DTR) {
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sc->hc->txc_dtr[sc->scano] |= sc->scachan ?
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AR_TXC_DTR_DTR1 : AR_TXC_DTR_DTR0;
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sc->hc->txc_dtr[sc->scano] &= sc->scachan ?
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~AR_TXC_DTR_DTR1 : ~AR_TXC_DTR_DTR0;
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outb(sc->hc->iobase + sc->hc->txc_dtr_off[sc->scano],
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sc->hc->txc_dtr[sc->scano]);
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}
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@ -751,7 +751,7 @@ static void ar_down(struct ar_softc *sc)
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msci->cmd = SCA_CMD_TXDISABLE;
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if(sc->hc->handshake & AR_SHSK_RTS)
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msci->ctl &= ~SCA_CTL_RTS;
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msci->ctl |= SCA_CTL_RTS;
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if(sc->hc->handshake & AR_SHSK_DTR) {
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sc->hc->txc_dtr[sc->scano] |= sc->scachan ?
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AR_TXC_DTR_DTR1 : AR_TXC_DTR_DTR0;
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@ -789,17 +789,18 @@ void arc_init(struct isa_device *id)
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M_DEVBUF, M_WAITOK);
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bzero(sc, hc->numports * sizeof(struct ar_softc));
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hc->txc_dtr[0] = AR_TXC_DTR_NOTRESET |
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AR_TXC_DTR_DTR0 | AR_TXC_DTR_DTR1;
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hc->txc_dtr[1] = AR_TXC_DTR_DTR0 | AR_TXC_DTR_DTR1;
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hc->txc_dtr_off[0] = AR_TXC_DTR0;
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hc->txc_dtr_off[1] = AR_TXC_DTR2;
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/*
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* reset the card and wait at least 1uS.
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*/
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outb(hc->iobase + AR_TXC_DTR0, AR_TXC_DTR_RESET);
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outb(hc->iobase + AR_TXC_DTR0, ~AR_TXC_DTR_NOTRESET & hc->txc_dtr[0]);
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DELAY(2);
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outb(hc->iobase + AR_TXC_DTR0, AR_TXC_DTR_NOTRESET);
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hc->txc_dtr[0] = AR_TXC_DTR_NOTRESET;
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hc->txc_dtr[1] = 0;
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hc->txc_dtr_off[0] = AR_TXC_DTR0;
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hc->txc_dtr_off[1] = AR_TXC_DTR2;
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outb(hc->iobase + AR_TXC_DTR0, hc->txc_dtr[0]);
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/*
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* Configure the card.
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@ -929,7 +930,7 @@ void ar_init_msci(struct ar_softc *sc)
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* mode registers.
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*/
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msci->cmd = SCA_CMD_RXRESET;
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msci->ctl = SCA_CTL_IDLPAT | SCA_CTL_UDRNC;
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msci->ctl = SCA_CTL_IDLPAT | SCA_CTL_UDRNC | SCA_CTL_RTS;
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/*
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* For now all interfaces are programmed to use the RX clock for
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@ -28,7 +28,7 @@
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id: if_ar.c,v 1.4 1995/12/15 00:54:03 bde Exp $
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* $Id: if_ar.c,v 1.5 1996/02/06 18:50:32 wollman Exp $
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*/
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/*
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@ -710,10 +710,10 @@ static void ar_up(struct ar_softc *sc)
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* And what about CTS/DCD etc... ?
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*/
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if(sc->hc->handshake & AR_SHSK_RTS)
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msci->ctl |= SCA_CTL_RTS;
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msci->ctl &= ~SCA_CTL_RTS;
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if(sc->hc->handshake & AR_SHSK_DTR) {
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sc->hc->txc_dtr[sc->scano] |= sc->scachan ?
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AR_TXC_DTR_DTR1 : AR_TXC_DTR_DTR0;
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sc->hc->txc_dtr[sc->scano] &= sc->scachan ?
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~AR_TXC_DTR_DTR1 : ~AR_TXC_DTR_DTR0;
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outb(sc->hc->iobase + sc->hc->txc_dtr_off[sc->scano],
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sc->hc->txc_dtr[sc->scano]);
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}
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@ -751,7 +751,7 @@ static void ar_down(struct ar_softc *sc)
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msci->cmd = SCA_CMD_TXDISABLE;
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if(sc->hc->handshake & AR_SHSK_RTS)
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msci->ctl &= ~SCA_CTL_RTS;
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msci->ctl |= SCA_CTL_RTS;
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if(sc->hc->handshake & AR_SHSK_DTR) {
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sc->hc->txc_dtr[sc->scano] |= sc->scachan ?
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AR_TXC_DTR_DTR1 : AR_TXC_DTR_DTR0;
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@ -789,17 +789,18 @@ void arc_init(struct isa_device *id)
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M_DEVBUF, M_WAITOK);
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bzero(sc, hc->numports * sizeof(struct ar_softc));
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hc->txc_dtr[0] = AR_TXC_DTR_NOTRESET |
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AR_TXC_DTR_DTR0 | AR_TXC_DTR_DTR1;
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hc->txc_dtr[1] = AR_TXC_DTR_DTR0 | AR_TXC_DTR_DTR1;
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hc->txc_dtr_off[0] = AR_TXC_DTR0;
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hc->txc_dtr_off[1] = AR_TXC_DTR2;
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/*
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* reset the card and wait at least 1uS.
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*/
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outb(hc->iobase + AR_TXC_DTR0, AR_TXC_DTR_RESET);
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outb(hc->iobase + AR_TXC_DTR0, ~AR_TXC_DTR_NOTRESET & hc->txc_dtr[0]);
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DELAY(2);
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outb(hc->iobase + AR_TXC_DTR0, AR_TXC_DTR_NOTRESET);
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hc->txc_dtr[0] = AR_TXC_DTR_NOTRESET;
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hc->txc_dtr[1] = 0;
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hc->txc_dtr_off[0] = AR_TXC_DTR0;
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hc->txc_dtr_off[1] = AR_TXC_DTR2;
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outb(hc->iobase + AR_TXC_DTR0, hc->txc_dtr[0]);
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/*
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* Configure the card.
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@ -929,7 +930,7 @@ void ar_init_msci(struct ar_softc *sc)
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* mode registers.
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*/
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msci->cmd = SCA_CMD_RXRESET;
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msci->ctl = SCA_CTL_IDLPAT | SCA_CTL_UDRNC;
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msci->ctl = SCA_CTL_IDLPAT | SCA_CTL_UDRNC | SCA_CTL_RTS;
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/*
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* For now all interfaces are programmed to use the RX clock for
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@ -28,7 +28,7 @@
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id: if_ar.c,v 1.4 1995/12/15 00:54:03 bde Exp $
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* $Id: if_ar.c,v 1.5 1996/02/06 18:50:32 wollman Exp $
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*/
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/*
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@ -710,10 +710,10 @@ static void ar_up(struct ar_softc *sc)
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* And what about CTS/DCD etc... ?
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*/
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if(sc->hc->handshake & AR_SHSK_RTS)
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msci->ctl |= SCA_CTL_RTS;
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msci->ctl &= ~SCA_CTL_RTS;
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if(sc->hc->handshake & AR_SHSK_DTR) {
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sc->hc->txc_dtr[sc->scano] |= sc->scachan ?
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AR_TXC_DTR_DTR1 : AR_TXC_DTR_DTR0;
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sc->hc->txc_dtr[sc->scano] &= sc->scachan ?
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~AR_TXC_DTR_DTR1 : ~AR_TXC_DTR_DTR0;
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outb(sc->hc->iobase + sc->hc->txc_dtr_off[sc->scano],
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sc->hc->txc_dtr[sc->scano]);
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}
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@ -751,7 +751,7 @@ static void ar_down(struct ar_softc *sc)
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msci->cmd = SCA_CMD_TXDISABLE;
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if(sc->hc->handshake & AR_SHSK_RTS)
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msci->ctl &= ~SCA_CTL_RTS;
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msci->ctl |= SCA_CTL_RTS;
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if(sc->hc->handshake & AR_SHSK_DTR) {
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sc->hc->txc_dtr[sc->scano] |= sc->scachan ?
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AR_TXC_DTR_DTR1 : AR_TXC_DTR_DTR0;
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@ -789,17 +789,18 @@ void arc_init(struct isa_device *id)
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M_DEVBUF, M_WAITOK);
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bzero(sc, hc->numports * sizeof(struct ar_softc));
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hc->txc_dtr[0] = AR_TXC_DTR_NOTRESET |
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AR_TXC_DTR_DTR0 | AR_TXC_DTR_DTR1;
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hc->txc_dtr[1] = AR_TXC_DTR_DTR0 | AR_TXC_DTR_DTR1;
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hc->txc_dtr_off[0] = AR_TXC_DTR0;
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hc->txc_dtr_off[1] = AR_TXC_DTR2;
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/*
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* reset the card and wait at least 1uS.
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*/
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outb(hc->iobase + AR_TXC_DTR0, AR_TXC_DTR_RESET);
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outb(hc->iobase + AR_TXC_DTR0, ~AR_TXC_DTR_NOTRESET & hc->txc_dtr[0]);
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DELAY(2);
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outb(hc->iobase + AR_TXC_DTR0, AR_TXC_DTR_NOTRESET);
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hc->txc_dtr[0] = AR_TXC_DTR_NOTRESET;
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hc->txc_dtr[1] = 0;
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hc->txc_dtr_off[0] = AR_TXC_DTR0;
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hc->txc_dtr_off[1] = AR_TXC_DTR2;
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outb(hc->iobase + AR_TXC_DTR0, hc->txc_dtr[0]);
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/*
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* Configure the card.
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@ -929,7 +930,7 @@ void ar_init_msci(struct ar_softc *sc)
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* mode registers.
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*/
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msci->cmd = SCA_CMD_RXRESET;
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msci->ctl = SCA_CTL_IDLPAT | SCA_CTL_UDRNC;
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msci->ctl = SCA_CTL_IDLPAT | SCA_CTL_UDRNC | SCA_CTL_RTS;
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/*
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* For now all interfaces are programmed to use the RX clock for
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