Ensure the received IP header gets 32-bits aligned.

The FreeBSD's TCP/IP stack assumes that the IP-header is 32-bits aligned
when decoding it. Else unaligned 32-bit memory access can happen, which
not all processor architectures support.

Sponsored by:	Mellanox Technologies
MFC after:	1 week
This commit is contained in:
Hans Petter Selasky 2016-04-14 14:10:40 +00:00
parent 617e1ff301
commit b03aadaffc
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=297967
2 changed files with 12 additions and 4 deletions

View File

@ -55,7 +55,7 @@ static void mlx4_en_init_rx_desc(struct mlx4_en_priv *priv,
int i;
/* Set size and memtype fields */
rx_desc->data[0].byte_count = cpu_to_be32(priv->rx_mb_size);
rx_desc->data[0].byte_count = cpu_to_be32(priv->rx_mb_size - MLX4_NET_IP_ALIGN);
rx_desc->data[0].lkey = cpu_to_be32(priv->mdev->mr.key);
/*
@ -87,7 +87,10 @@ mlx4_en_alloc_buf(struct mlx4_en_rx_ring *ring,
if (unlikely(mb == NULL))
return (-ENOMEM);
/* setup correct length */
mb->m_len = ring->rx_mb_size;
mb->m_pkthdr.len = mb->m_len = ring->rx_mb_size;
/* make sure IP header gets aligned */
m_adj(mb, MLX4_NET_IP_ALIGN);
/* load spare mbuf into BUSDMA */
err = -bus_dmamap_load_mbuf_sg(ring->dma_tag, ring->spare.dma_map,
@ -117,7 +120,10 @@ mlx4_en_alloc_buf(struct mlx4_en_rx_ring *ring,
goto use_spare;
/* setup correct length */
mb->m_len = ring->rx_mb_size;
mb->m_pkthdr.len = mb->m_len = ring->rx_mb_size;
/* make sure IP header gets aligned */
m_adj(mb, MLX4_NET_IP_ALIGN);
err = -bus_dmamap_load_mbuf_sg(ring->dma_tag, mb_list->dma_map,
mb, segs, &nsegs, BUS_DMA_NOWAIT);
@ -249,7 +255,8 @@ static void mlx4_en_free_rx_buf(struct mlx4_en_priv *priv,
void mlx4_en_calc_rx_buf(struct net_device *dev)
{
struct mlx4_en_priv *priv = netdev_priv(dev);
int eff_mtu = dev->if_mtu + ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN;
int eff_mtu = dev->if_mtu + ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN +
MLX4_NET_IP_ALIGN;
if (eff_mtu > MJUM16BYTES) {
en_err(priv, "MTU(%d) is too big\n", dev->if_mtu);

View File

@ -69,6 +69,7 @@
#define MLX4_EN_PAGE_SHIFT 12
#define MLX4_EN_PAGE_SIZE (1 << MLX4_EN_PAGE_SHIFT)
#define MLX4_NET_IP_ALIGN 2 /* bytes */
#define DEF_RX_RINGS 16
#define MAX_RX_RINGS 128
#define MIN_RX_RINGS 4