Import r243925 from the upstream clang release_37 branch:
Reverting r239883 and r240720: ------------------------------------------------------------------------ r239883 | echristo | 2015-06-17 00:09:32 -0700 (Wed, 17 Jun 2015) | 16 lines Update the intel intrinsic headers to use the target attribute support. This involved removing the conditional inclusion and replacing them with target attributes matching the original conditional inclusion and checks. The testcase update removes the macro checks for each file and replaces them with usage of the __target__ attribute, e.g.: int __attribute__((__target__(("sse3")))) foo(int a) { _mm_mwait(0, 0); return 4; } This usage does require the enclosing function have the requisite __target__ attribute for inlining and code generation - also for any macro intrinsic uses in the enclosing function. There's no change for existing uses of the intrinsic headers. ------------------------------------------------------------------------ ------------------------------------------------------------------------ r240720 | silvas | 2015-06-25 16:22:11 -0700 (Thu, 25 Jun 2015) | 6 lines Remove `requires` for x86 CPU features. Ever since the target attributes change, we don't need to guard these headers with `requires`. Actually it's a bit worse, because if we do then they are included textually under the covers, causing declarations to appear in submodules they aren't supposed to be in. ------------------------------------------------------------------------ This reverts the changes to the intrinsics headers in trunk, which could result in some ports' configure scripts misdetecting SSE (and higher) support.
This commit is contained in:
parent
45587483d8
commit
b10d76f080
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/projects/clang-trunk/; revision=286896
@ -25,8 +25,12 @@
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#include <emmintrin.h>
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#if !defined (__AES__)
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# error "AES instructions not enabled"
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#else
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/* Define the default attributes for the functions in this file. */
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#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("aes")))
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#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
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static __inline__ __m128i __DEFAULT_FN_ATTRS
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_mm_aesenc_si128(__m128i __V, __m128i __R)
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@ -63,4 +67,6 @@ _mm_aesimc_si128(__m128i __V)
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#undef __DEFAULT_FN_ATTRS
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#endif
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#endif /* _WMMINTRIN_AES_H */
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@ -23,8 +23,12 @@
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#ifndef _WMMINTRIN_PCLMUL_H
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#define _WMMINTRIN_PCLMUL_H
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#if !defined (__PCLMUL__)
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# error "PCLMUL instruction is not enabled"
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#else
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#define _mm_clmulepi64_si128(__X, __Y, __I) \
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((__m128i)__builtin_ia32_pclmulqdq128((__v2di)(__m128i)(__X), \
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(__v2di)(__m128i)(__Y), (char)(__I)))
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#endif
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#endif /* _WMMINTRIN_PCLMUL_H */
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@ -32,7 +32,8 @@
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#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
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/* Intrinsics that are available only if __ADX__ defined */
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static __inline unsigned char __attribute__((__always_inline__, __nodebug__, __target__("adx")))
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#ifdef __ADX__
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static __inline unsigned char __DEFAULT_FN_ATTRS
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_addcarryx_u32(unsigned char __cf, unsigned int __x, unsigned int __y,
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unsigned int *__p)
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{
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@ -40,13 +41,14 @@ _addcarryx_u32(unsigned char __cf, unsigned int __x, unsigned int __y,
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}
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#ifdef __x86_64__
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static __inline unsigned char __attribute__((__always_inline__, __nodebug__, __target__("adx")))
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static __inline unsigned char __DEFAULT_FN_ATTRS
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_addcarryx_u64(unsigned char __cf, unsigned long long __x,
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unsigned long long __y, unsigned long long *__p)
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{
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return __builtin_ia32_addcarryx_u64(__cf, __x, __y, __p);
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}
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#endif
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#endif
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/* Intrinsics that are also available if __ADX__ undefined */
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static __inline unsigned char __DEFAULT_FN_ATTRS
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@ -24,10 +24,14 @@
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#ifndef __AMMINTRIN_H
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#define __AMMINTRIN_H
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#ifndef __SSE4A__
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#error "SSE4A instruction set not enabled"
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#else
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#include <pmmintrin.h>
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/* Define the default attributes for the functions in this file. */
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#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("sse4a")))
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#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
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/// \brief Extracts the specified bits from the lower 64 bits of the 128-bit
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/// integer vector operand at the index idx and of the length len.
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@ -206,4 +210,6 @@ _mm_stream_ss(float *__p, __m128 __a)
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#undef __DEFAULT_FN_ATTRS
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#endif /* __SSE4A__ */
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#endif /* __AMMINTRIN_H */
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@ -29,7 +29,7 @@
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#define __AVX2INTRIN_H
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/* Define the default attributes for the functions in this file. */
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#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("avx2")))
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#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
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/* SSE4 Multiple Packed Sums of Absolute Difference. */
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#define _mm256_mpsadbw_epu8(X, Y, M) __builtin_ia32_mpsadbw256((X), (Y), (M))
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@ -34,7 +34,7 @@ typedef char __v64qi __attribute__ ((__vector_size__ (64)));
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typedef short __v32hi __attribute__ ((__vector_size__ (64)));
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/* Define the default attributes for the functions in this file. */
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#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("avx512bw")))
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#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
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static __inline __v64qi __DEFAULT_FN_ATTRS
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_mm512_setzero_qi (void) {
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@ -29,7 +29,7 @@
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#define __AVX512DQINTRIN_H
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/* Define the default attributes for the functions in this file. */
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#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("avx512dq")))
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#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
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static __inline__ __m512i __DEFAULT_FN_ATTRS
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_mm512_mullo_epi64 (__m512i __A, __m512i __B) {
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@ -47,7 +47,7 @@ typedef unsigned short __mmask16;
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#define _MM_FROUND_CUR_DIRECTION 0x04
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/* Define the default attributes for the functions in this file. */
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#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("avx512f")))
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#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
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/* Create vectors with repeated elements */
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@ -29,7 +29,7 @@
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#define __AVX512VLBWINTRIN_H
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/* Define the default attributes for the functions in this file. */
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#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("avx512vl,avx512bw")))
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#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
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/* Integer compare */
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@ -29,7 +29,7 @@
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#define __AVX512VLDQINTRIN_H
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/* Define the default attributes for the functions in this file. */
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#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("avx512vl,avx512dq")))
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#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
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static __inline__ __m256i __DEFAULT_FN_ATTRS
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_mm256_mullo_epi64 (__m256i __A, __m256i __B) {
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@ -29,7 +29,7 @@
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#define __AVX512VLINTRIN_H
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/* Define the default attributes for the functions in this file. */
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#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("avx512vl")))
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#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
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/* Integer compare */
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@ -40,7 +40,7 @@ typedef double __m256d __attribute__((__vector_size__(32)));
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typedef long long __m256i __attribute__((__vector_size__(32)));
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/* Define the default attributes for the functions in this file. */
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#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("avx")))
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#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
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/* Arithmetic */
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static __inline __m256d __DEFAULT_FN_ATTRS
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@ -25,11 +25,15 @@
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#error "Never use <bmi2intrin.h> directly; include <x86intrin.h> instead."
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#endif
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#ifndef __BMI2__
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# error "BMI2 instruction set not enabled"
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#endif /* __BMI2__ */
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#ifndef __BMI2INTRIN_H
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#define __BMI2INTRIN_H
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/* Define the default attributes for the functions in this file. */
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#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("bmi2")))
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#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
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static __inline__ unsigned int __DEFAULT_FN_ATTRS
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_bzhi_u32(unsigned int __X, unsigned int __Y)
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@ -25,6 +25,10 @@
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#error "Never use <bmiintrin.h> directly; include <x86intrin.h> instead."
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#endif
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#ifndef __BMI__
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# error "BMI instruction set not enabled"
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#endif /* __BMI__ */
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#ifndef __BMIINTRIN_H
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#define __BMIINTRIN_H
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@ -37,7 +41,7 @@
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#define _tzcnt_u32(a) (__tzcnt_u32((a)))
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/* Define the default attributes for the functions in this file. */
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#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("bmi")))
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#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
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static __inline__ unsigned short __DEFAULT_FN_ATTRS
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__tzcnt_u16(unsigned short __X)
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@ -24,6 +24,10 @@
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#ifndef __EMMINTRIN_H
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#define __EMMINTRIN_H
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#ifndef __SSE2__
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#error "SSE2 instruction set not enabled"
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#else
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#include <xmmintrin.h>
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typedef double __m128d __attribute__((__vector_size__(16)));
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@ -36,7 +40,7 @@ typedef short __v8hi __attribute__((__vector_size__(16)));
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typedef char __v16qi __attribute__((__vector_size__(16)));
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/* Define the default attributes for the functions in this file. */
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#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("sse2")))
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#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
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static __inline__ __m128d __DEFAULT_FN_ATTRS
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_mm_add_sd(__m128d __a, __m128d __b)
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@ -1471,4 +1475,6 @@ _mm_pause(void)
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#define _MM_SHUFFLE2(x, y) (((x) << 1) | (y))
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#endif /* __SSE2__ */
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#endif /* __EMMINTRIN_H */
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@ -25,6 +25,10 @@
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#error "Never use <f16cintrin.h> directly; include <x86intrin.h> instead."
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#endif
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#ifndef __F16C__
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# error "F16C instruction is not enabled"
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#endif /* __F16C__ */
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#ifndef __F16CINTRIN_H
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#define __F16CINTRIN_H
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@ -32,7 +36,7 @@ typedef float __v8sf __attribute__ ((__vector_size__ (32)));
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typedef float __m256 __attribute__ ((__vector_size__ (32)));
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/* Define the default attributes for the functions in this file. */
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#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("f16c")))
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#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
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#define _mm_cvtps_ph(a, imm) __extension__ ({ \
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__m128 __a = (a); \
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@ -28,10 +28,14 @@
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#ifndef __FMA4INTRIN_H
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#define __FMA4INTRIN_H
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#ifndef __FMA4__
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# error "FMA4 instruction set is not enabled"
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#else
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#include <pmmintrin.h>
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/* Define the default attributes for the functions in this file. */
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#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("fma4")))
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#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
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static __inline__ __m128 __DEFAULT_FN_ATTRS
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_mm_macc_ps(__m128 __A, __m128 __B, __m128 __C)
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@ -227,4 +231,6 @@ _mm256_msubadd_pd(__m256d __A, __m256d __B, __m256d __C)
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#undef __DEFAULT_FN_ATTRS
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#endif /* __FMA4__ */
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#endif /* __FMA4INTRIN_H */
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@ -28,8 +28,12 @@
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#ifndef __FMAINTRIN_H
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#define __FMAINTRIN_H
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#ifndef __FMA__
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# error "FMA instruction set is not enabled"
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#else
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/* Define the default attributes for the functions in this file. */
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#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("fma")))
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#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
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static __inline__ __m128 __DEFAULT_FN_ATTRS
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_mm_fmadd_ps(__m128 __A, __m128 __B, __m128 __C)
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@ -225,4 +229,6 @@ _mm256_fmsubadd_pd(__m256d __A, __m256d __B, __m256d __C)
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#undef __DEFAULT_FN_ATTRS
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#endif /* __FMA__ */
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#endif /* __FMAINTRIN_H */
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@ -24,123 +24,175 @@
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#ifndef __IMMINTRIN_H
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#define __IMMINTRIN_H
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#ifdef __MMX__
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#include <mmintrin.h>
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#endif
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#ifdef __SSE__
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#include <xmmintrin.h>
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#endif
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#ifdef __SSE2__
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#include <emmintrin.h>
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#endif
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#ifdef __SSE3__
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#include <pmmintrin.h>
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#endif
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#ifdef __SSSE3__
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#include <tmmintrin.h>
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#endif
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#if defined (__SSE4_2__) || defined (__SSE4_1__)
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#include <smmintrin.h>
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#endif
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#if defined (__AES__) || defined (__PCLMUL__)
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#include <wmmintrin.h>
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#endif
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#ifdef __AVX__
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#include <avxintrin.h>
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#endif
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#ifdef __AVX2__
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#include <avx2intrin.h>
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#endif
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#ifdef __BMI__
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#include <bmiintrin.h>
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#endif
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#ifdef __BMI2__
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#include <bmi2intrin.h>
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#endif
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#ifdef __LZCNT__
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#include <lzcntintrin.h>
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#endif
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#ifdef __FMA__
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#include <fmaintrin.h>
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#endif
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#ifdef __AVX512F__
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#include <avx512fintrin.h>
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#endif
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#ifdef __AVX512VL__
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#include <avx512vlintrin.h>
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#endif
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#ifdef __AVX512BW__
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#include <avx512bwintrin.h>
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#endif
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#ifdef __AVX512CD__
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#include <avx512cdintrin.h>
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#endif
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#ifdef __AVX512DQ__
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#include <avx512dqintrin.h>
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#endif
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#if defined (__AVX512VL__) && defined (__AVX512BW__)
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#include <avx512vlbwintrin.h>
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#endif
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#if defined (__AVX512VL__) && defined (__AVX512DQ__)
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#include <avx512vldqintrin.h>
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#endif
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#ifdef __AVX512ER__
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#include <avx512erintrin.h>
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#endif
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static __inline__ int __attribute__((__always_inline__, __nodebug__, __target__("rdrnd")))
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#ifdef __RDRND__
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static __inline__ int __attribute__((__always_inline__, __nodebug__))
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_rdrand16_step(unsigned short *__p)
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{
|
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return __builtin_ia32_rdrand16_step(__p);
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||||
}
|
||||
|
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static __inline__ int __attribute__((__always_inline__, __nodebug__, __target__("rdrnd")))
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static __inline__ int __attribute__((__always_inline__, __nodebug__))
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_rdrand32_step(unsigned int *__p)
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||||
{
|
||||
return __builtin_ia32_rdrand32_step(__p);
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||||
}
|
||||
|
||||
#ifdef __x86_64__
|
||||
static __inline__ int __attribute__((__always_inline__, __nodebug__, __target__("rdrnd")))
|
||||
static __inline__ int __attribute__((__always_inline__, __nodebug__))
|
||||
_rdrand64_step(unsigned long long *__p)
|
||||
{
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||||
return __builtin_ia32_rdrand64_step(__p);
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||||
}
|
||||
#endif
|
||||
#endif /* __RDRND__ */
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||||
|
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#ifdef __FSGSBASE__
|
||||
#ifdef __x86_64__
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||||
static __inline__ unsigned int __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
|
||||
static __inline__ unsigned int __attribute__((__always_inline__, __nodebug__))
|
||||
_readfsbase_u32(void)
|
||||
{
|
||||
return __builtin_ia32_rdfsbase32();
|
||||
}
|
||||
|
||||
static __inline__ unsigned long long __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
|
||||
static __inline__ unsigned long long __attribute__((__always_inline__, __nodebug__))
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||||
_readfsbase_u64(void)
|
||||
{
|
||||
return __builtin_ia32_rdfsbase64();
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||||
}
|
||||
|
||||
static __inline__ unsigned int __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
|
||||
static __inline__ unsigned int __attribute__((__always_inline__, __nodebug__))
|
||||
_readgsbase_u32(void)
|
||||
{
|
||||
return __builtin_ia32_rdgsbase32();
|
||||
}
|
||||
|
||||
static __inline__ unsigned long long __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
|
||||
static __inline__ unsigned long long __attribute__((__always_inline__, __nodebug__))
|
||||
_readgsbase_u64(void)
|
||||
{
|
||||
return __builtin_ia32_rdgsbase64();
|
||||
}
|
||||
|
||||
static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
|
||||
static __inline__ void __attribute__((__always_inline__, __nodebug__))
|
||||
_writefsbase_u32(unsigned int __V)
|
||||
{
|
||||
return __builtin_ia32_wrfsbase32(__V);
|
||||
}
|
||||
|
||||
static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
|
||||
static __inline__ void __attribute__((__always_inline__, __nodebug__))
|
||||
_writefsbase_u64(unsigned long long __V)
|
||||
{
|
||||
return __builtin_ia32_wrfsbase64(__V);
|
||||
}
|
||||
|
||||
static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
|
||||
static __inline__ void __attribute__((__always_inline__, __nodebug__))
|
||||
_writegsbase_u32(unsigned int __V)
|
||||
{
|
||||
return __builtin_ia32_wrgsbase32(__V);
|
||||
}
|
||||
|
||||
static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
|
||||
static __inline__ void __attribute__((__always_inline__, __nodebug__))
|
||||
_writegsbase_u64(unsigned long long __V)
|
||||
{
|
||||
return __builtin_ia32_wrgsbase64(__V);
|
||||
}
|
||||
#endif
|
||||
#endif /* __FSGSBASE__ */
|
||||
|
||||
#ifdef __RTM__
|
||||
#include <rtmintrin.h>
|
||||
#endif
|
||||
|
||||
#ifdef __RTM__
|
||||
#include <xtestintrin.h>
|
||||
#endif
|
||||
|
||||
#ifdef __SHA__
|
||||
#include <shaintrin.h>
|
||||
#endif
|
||||
|
||||
#include <fxsrintrin.h>
|
||||
|
||||
|
@ -25,11 +25,15 @@
|
||||
#error "Never use <lzcntintrin.h> directly; include <x86intrin.h> instead."
|
||||
#endif
|
||||
|
||||
#ifndef __LZCNT__
|
||||
# error "LZCNT instruction is not enabled"
|
||||
#endif /* __LZCNT__ */
|
||||
|
||||
#ifndef __LZCNTINTRIN_H
|
||||
#define __LZCNTINTRIN_H
|
||||
|
||||
/* Define the default attributes for the functions in this file. */
|
||||
#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("lzcnt")))
|
||||
#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
|
||||
|
||||
static __inline__ unsigned short __DEFAULT_FN_ATTRS
|
||||
__lzcnt16(unsigned short __X)
|
||||
|
@ -30,7 +30,7 @@
|
||||
typedef float __v2sf __attribute__((__vector_size__(8)));
|
||||
|
||||
/* Define the default attributes for the functions in this file. */
|
||||
#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("3dnow")))
|
||||
#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
|
||||
|
||||
static __inline__ void __DEFAULT_FN_ATTRS
|
||||
_m_femms() {
|
||||
|
@ -24,6 +24,10 @@
|
||||
#ifndef __MMINTRIN_H
|
||||
#define __MMINTRIN_H
|
||||
|
||||
#ifndef __MMX__
|
||||
#error "MMX instruction set not enabled"
|
||||
#else
|
||||
|
||||
typedef long long __m64 __attribute__((__vector_size__(8)));
|
||||
|
||||
typedef int __v2si __attribute__((__vector_size__(8)));
|
||||
@ -31,7 +35,7 @@ typedef short __v4hi __attribute__((__vector_size__(8)));
|
||||
typedef char __v8qi __attribute__((__vector_size__(8)));
|
||||
|
||||
/* Define the default attributes for the functions in this file. */
|
||||
#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("mmx")))
|
||||
#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
|
||||
|
||||
static __inline__ void __DEFAULT_FN_ATTRS
|
||||
_mm_empty(void)
|
||||
@ -497,5 +501,7 @@ _mm_setr_pi8(char __b0, char __b1, char __b2, char __b3, char __b4, char __b5,
|
||||
#define _m_pcmpgtw _mm_cmpgt_pi16
|
||||
#define _m_pcmpgtd _mm_cmpgt_pi32
|
||||
|
||||
#endif /* __MMX__ */
|
||||
|
||||
#endif /* __MMINTRIN_H */
|
||||
|
||||
|
@ -32,117 +32,142 @@ module _Builtin_intrinsics [system] [extern_c] {
|
||||
}
|
||||
|
||||
explicit module cpuid {
|
||||
requires x86
|
||||
header "cpuid.h"
|
||||
}
|
||||
|
||||
explicit module mmx {
|
||||
requires mmx
|
||||
header "mmintrin.h"
|
||||
}
|
||||
|
||||
explicit module f16c {
|
||||
requires f16c
|
||||
header "f16cintrin.h"
|
||||
}
|
||||
|
||||
explicit module sse {
|
||||
requires sse
|
||||
export mmx
|
||||
export sse2 // note: for hackish <emmintrin.h> dependency
|
||||
header "xmmintrin.h"
|
||||
}
|
||||
|
||||
explicit module sse2 {
|
||||
requires sse2
|
||||
export sse
|
||||
header "emmintrin.h"
|
||||
}
|
||||
|
||||
explicit module sse3 {
|
||||
requires sse3
|
||||
export sse2
|
||||
header "pmmintrin.h"
|
||||
}
|
||||
|
||||
explicit module ssse3 {
|
||||
requires ssse3
|
||||
export sse3
|
||||
header "tmmintrin.h"
|
||||
}
|
||||
|
||||
explicit module sse4_1 {
|
||||
requires sse41
|
||||
export ssse3
|
||||
header "smmintrin.h"
|
||||
}
|
||||
|
||||
explicit module sse4_2 {
|
||||
requires sse42
|
||||
export sse4_1
|
||||
header "nmmintrin.h"
|
||||
}
|
||||
|
||||
explicit module sse4a {
|
||||
requires sse4a
|
||||
export sse3
|
||||
header "ammintrin.h"
|
||||
}
|
||||
|
||||
explicit module avx {
|
||||
requires avx
|
||||
export sse4_2
|
||||
header "avxintrin.h"
|
||||
}
|
||||
|
||||
explicit module avx2 {
|
||||
requires avx2
|
||||
export avx
|
||||
header "avx2intrin.h"
|
||||
}
|
||||
|
||||
explicit module avx512f {
|
||||
requires avx512f
|
||||
export avx2
|
||||
header "avx512fintrin.h"
|
||||
}
|
||||
|
||||
explicit module avx512er {
|
||||
requires avx512er
|
||||
header "avx512erintrin.h"
|
||||
}
|
||||
|
||||
explicit module bmi {
|
||||
requires bmi
|
||||
header "bmiintrin.h"
|
||||
}
|
||||
|
||||
explicit module bmi2 {
|
||||
requires bmi2
|
||||
header "bmi2intrin.h"
|
||||
}
|
||||
|
||||
explicit module fma {
|
||||
requires fma
|
||||
header "fmaintrin.h"
|
||||
}
|
||||
|
||||
explicit module fma4 {
|
||||
requires fma4
|
||||
export sse3
|
||||
header "fma4intrin.h"
|
||||
}
|
||||
|
||||
explicit module lzcnt {
|
||||
requires lzcnt
|
||||
header "lzcntintrin.h"
|
||||
}
|
||||
|
||||
explicit module popcnt {
|
||||
requires popcnt
|
||||
header "popcntintrin.h"
|
||||
}
|
||||
|
||||
explicit module mm3dnow {
|
||||
requires mm3dnow
|
||||
header "mm3dnow.h"
|
||||
}
|
||||
|
||||
explicit module xop {
|
||||
requires xop
|
||||
export fma4
|
||||
header "xopintrin.h"
|
||||
}
|
||||
|
||||
explicit module aes_pclmul {
|
||||
requires aes, pclmul
|
||||
header "wmmintrin.h"
|
||||
export aes
|
||||
export pclmul
|
||||
}
|
||||
|
||||
explicit module aes {
|
||||
requires aes
|
||||
header "__wmmintrin_aes.h"
|
||||
}
|
||||
|
||||
explicit module pclmul {
|
||||
requires pclmul
|
||||
header "__wmmintrin_pclmul.h"
|
||||
}
|
||||
}
|
||||
|
@ -24,7 +24,12 @@
|
||||
#ifndef _NMMINTRIN_H
|
||||
#define _NMMINTRIN_H
|
||||
|
||||
#ifndef __SSE4_2__
|
||||
#error "SSE4.2 instruction set not enabled"
|
||||
#else
|
||||
|
||||
/* To match expectations of gcc we put the sse4.2 definitions into smmintrin.h,
|
||||
just include it now then. */
|
||||
#include <smmintrin.h>
|
||||
#endif /* __SSE4_2__ */
|
||||
#endif /* _NMMINTRIN_H */
|
||||
|
@ -24,10 +24,14 @@
|
||||
#ifndef __PMMINTRIN_H
|
||||
#define __PMMINTRIN_H
|
||||
|
||||
#ifndef __SSE3__
|
||||
#error "SSE3 instruction set not enabled"
|
||||
#else
|
||||
|
||||
#include <emmintrin.h>
|
||||
|
||||
/* Define the default attributes for the functions in this file. */
|
||||
#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("sse3")))
|
||||
#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
|
||||
|
||||
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
||||
_mm_lddqu_si128(__m128i const *__p)
|
||||
@ -113,4 +117,6 @@ _mm_mwait(unsigned __extensions, unsigned __hints)
|
||||
|
||||
#undef __DEFAULT_FN_ATTRS
|
||||
|
||||
#endif /* __SSE3__ */
|
||||
|
||||
#endif /* __PMMINTRIN_H */
|
||||
|
@ -21,11 +21,15 @@
|
||||
*===-----------------------------------------------------------------------===
|
||||
*/
|
||||
|
||||
#ifndef __POPCNT__
|
||||
#error "POPCNT instruction set not enabled"
|
||||
#endif
|
||||
|
||||
#ifndef _POPCNTINTRIN_H
|
||||
#define _POPCNTINTRIN_H
|
||||
|
||||
/* Define the default attributes for the functions in this file. */
|
||||
#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("popcnt")))
|
||||
#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
|
||||
|
||||
static __inline__ int __DEFAULT_FN_ATTRS
|
||||
_mm_popcnt_u32(unsigned int __A)
|
||||
|
@ -28,8 +28,10 @@
|
||||
#ifndef __RDSEEDINTRIN_H
|
||||
#define __RDSEEDINTRIN_H
|
||||
|
||||
#ifdef __RDSEED__
|
||||
|
||||
/* Define the default attributes for the functions in this file. */
|
||||
#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("rdseed")))
|
||||
#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
|
||||
|
||||
static __inline__ int __DEFAULT_FN_ATTRS
|
||||
_rdseed16_step(unsigned short *__p)
|
||||
@ -53,4 +55,5 @@ _rdseed64_step(unsigned long long *__p)
|
||||
|
||||
#undef __DEFAULT_FN_ATTRS
|
||||
|
||||
#endif /* __RDSEED__ */
|
||||
#endif /* __RDSEEDINTRIN_H */
|
||||
|
@ -38,7 +38,7 @@
|
||||
#define _XABORT_CODE(x) (((x) >> 24) & 0xFF)
|
||||
|
||||
/* Define the default attributes for the functions in this file. */
|
||||
#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("rtm")))
|
||||
#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
|
||||
|
||||
static __inline__ unsigned int __DEFAULT_FN_ATTRS
|
||||
_xbegin(void)
|
||||
|
@ -28,8 +28,12 @@
|
||||
#ifndef __SHAINTRIN_H
|
||||
#define __SHAINTRIN_H
|
||||
|
||||
#if !defined (__SHA__)
|
||||
# error "SHA instructions not enabled"
|
||||
#endif
|
||||
|
||||
/* Define the default attributes for the functions in this file. */
|
||||
#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("sha")))
|
||||
#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
|
||||
|
||||
#define _mm_sha1rnds4_epu32(V1, V2, M) __extension__ ({ \
|
||||
__builtin_ia32_sha1rnds4((V1), (V2), (M)); })
|
||||
|
@ -24,10 +24,14 @@
|
||||
#ifndef _SMMINTRIN_H
|
||||
#define _SMMINTRIN_H
|
||||
|
||||
#ifndef __SSE4_1__
|
||||
#error "SSE4.1 instruction set not enabled"
|
||||
#else
|
||||
|
||||
#include <tmmintrin.h>
|
||||
|
||||
/* Define the default attributes for the functions in this file. */
|
||||
#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("sse4.1")))
|
||||
#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
|
||||
|
||||
/* SSE4 Rounding macros. */
|
||||
#define _MM_FROUND_TO_NEAREST_INT 0x00
|
||||
@ -375,13 +379,9 @@ _mm_minpos_epu16(__m128i __V)
|
||||
return (__m128i) __builtin_ia32_phminposuw128((__v8hi)__V);
|
||||
}
|
||||
|
||||
/* Handle the sse4.2 definitions here. */
|
||||
|
||||
/* These definitions are normally in nmmintrin.h, but gcc puts them in here
|
||||
so we'll do the same. */
|
||||
|
||||
#undef __DEFAULT_FN_ATTRS
|
||||
#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("sse4.2")))
|
||||
#ifdef __SSE4_2__
|
||||
|
||||
/* These specify the type of data that we're comparing. */
|
||||
#define _SIDD_UBYTE_OPS 0x00
|
||||
@ -481,4 +481,7 @@ _mm_crc32_u64(unsigned long long __C, unsigned long long __D)
|
||||
#include <popcntintrin.h>
|
||||
#endif
|
||||
|
||||
#endif /* __SSE4_2__ */
|
||||
#endif /* __SSE4_1__ */
|
||||
|
||||
#endif /* _SMMINTRIN_H */
|
||||
|
@ -21,6 +21,10 @@
|
||||
*===-----------------------------------------------------------------------===
|
||||
*/
|
||||
|
||||
#ifndef __TBM__
|
||||
#error "TBM instruction set is not enabled"
|
||||
#endif
|
||||
|
||||
#ifndef __X86INTRIN_H
|
||||
#error "Never use <tbmintrin.h> directly; include <x86intrin.h> instead."
|
||||
#endif
|
||||
@ -29,7 +33,7 @@
|
||||
#define __TBMINTRIN_H
|
||||
|
||||
/* Define the default attributes for the functions in this file. */
|
||||
#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("tbm")))
|
||||
#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
|
||||
|
||||
#define __bextri_u32(a, b) (__builtin_ia32_bextri_u32((a), (b)))
|
||||
|
||||
|
@ -24,10 +24,14 @@
|
||||
#ifndef __TMMINTRIN_H
|
||||
#define __TMMINTRIN_H
|
||||
|
||||
#ifndef __SSSE3__
|
||||
#error "SSSE3 instruction set not enabled"
|
||||
#else
|
||||
|
||||
#include <pmmintrin.h>
|
||||
|
||||
/* Define the default attributes for the functions in this file. */
|
||||
#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("ssse3")))
|
||||
#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
|
||||
|
||||
static __inline__ __m64 __DEFAULT_FN_ATTRS
|
||||
_mm_abs_pi8(__m64 __a)
|
||||
@ -221,4 +225,6 @@ _mm_sign_pi32(__m64 __a, __m64 __b)
|
||||
|
||||
#undef __DEFAULT_FN_ATTRS
|
||||
|
||||
#endif /* __SSSE3__ */
|
||||
|
||||
#endif /* __TMMINTRIN_H */
|
||||
|
@ -26,8 +26,17 @@
|
||||
|
||||
#include <emmintrin.h>
|
||||
|
||||
#if !defined (__AES__) && !defined (__PCLMUL__)
|
||||
# error "AES/PCLMUL instructions not enabled"
|
||||
#else
|
||||
|
||||
#ifdef __AES__
|
||||
#include <__wmmintrin_aes.h>
|
||||
#endif /* __AES__ */
|
||||
|
||||
#ifdef __PCLMUL__
|
||||
#include <__wmmintrin_pclmul.h>
|
||||
#endif /* __PCLMUL__ */
|
||||
|
||||
#endif /* __AES__ || __PCLMUL__ */
|
||||
#endif /* _WMMINTRIN_H */
|
||||
|
@ -28,29 +28,53 @@
|
||||
|
||||
#include <immintrin.h>
|
||||
|
||||
#ifdef __3dNOW__
|
||||
#include <mm3dnow.h>
|
||||
#endif
|
||||
|
||||
#ifdef __BMI__
|
||||
#include <bmiintrin.h>
|
||||
#endif
|
||||
|
||||
#ifdef __BMI2__
|
||||
#include <bmi2intrin.h>
|
||||
#endif
|
||||
|
||||
#ifdef __LZCNT__
|
||||
#include <lzcntintrin.h>
|
||||
#endif
|
||||
|
||||
#ifdef __POPCNT__
|
||||
#include <popcntintrin.h>
|
||||
#endif
|
||||
|
||||
#ifdef __RDSEED__
|
||||
#include <rdseedintrin.h>
|
||||
#endif
|
||||
|
||||
#ifdef __PRFCHW__
|
||||
#include <prfchwintrin.h>
|
||||
#endif
|
||||
|
||||
#ifdef __SSE4A__
|
||||
#include <ammintrin.h>
|
||||
#endif
|
||||
|
||||
#ifdef __FMA4__
|
||||
#include <fma4intrin.h>
|
||||
#endif
|
||||
|
||||
#ifdef __XOP__
|
||||
#include <xopintrin.h>
|
||||
#endif
|
||||
|
||||
#ifdef __TBM__
|
||||
#include <tbmintrin.h>
|
||||
#endif
|
||||
|
||||
#ifdef __F16C__
|
||||
#include <f16cintrin.h>
|
||||
#endif
|
||||
|
||||
/* FIXME: LWP */
|
||||
|
||||
|
@ -24,6 +24,10 @@
|
||||
#ifndef __XMMINTRIN_H
|
||||
#define __XMMINTRIN_H
|
||||
|
||||
#ifndef __SSE__
|
||||
#error "SSE instruction set not enabled"
|
||||
#else
|
||||
|
||||
#include <mmintrin.h>
|
||||
|
||||
typedef int __v4si __attribute__((__vector_size__(16)));
|
||||
@ -37,7 +41,7 @@ typedef float __m128 __attribute__((__vector_size__(16)));
|
||||
#endif
|
||||
|
||||
/* Define the default attributes for the functions in this file. */
|
||||
#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("sse")))
|
||||
#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
|
||||
|
||||
static __inline__ __m128 __DEFAULT_FN_ATTRS
|
||||
_mm_add_ss(__m128 __a, __m128 __b)
|
||||
@ -999,4 +1003,6 @@ do { \
|
||||
#include <emmintrin.h>
|
||||
#endif
|
||||
|
||||
#endif /* __SSE__ */
|
||||
|
||||
#endif /* __XMMINTRIN_H */
|
||||
|
@ -28,10 +28,14 @@
|
||||
#ifndef __XOPINTRIN_H
|
||||
#define __XOPINTRIN_H
|
||||
|
||||
#ifndef __XOP__
|
||||
# error "XOP instruction set is not enabled"
|
||||
#else
|
||||
|
||||
#include <fma4intrin.h>
|
||||
|
||||
/* Define the default attributes for the functions in this file. */
|
||||
#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("xop")))
|
||||
#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
|
||||
|
||||
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
||||
_mm_maccs_epi16(__m128i __A, __m128i __B, __m128i __C)
|
||||
@ -800,4 +804,6 @@ _mm256_frcz_pd(__m256d __A)
|
||||
|
||||
#undef __DEFAULT_FN_ATTRS
|
||||
|
||||
#endif /* __XOP__ */
|
||||
|
||||
#endif /* __XOPINTRIN_H */
|
||||
|
Loading…
Reference in New Issue
Block a user