Partially revert r365069.
This whitespace was intentionally added to help differentiate the different register groups within this file. While here add missing whitespace from earlier in the file, Sponsored by: Innovate UK
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ba774e9296
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b148010b6a
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=365234
@ -82,6 +82,7 @@ sysctl_hw_machine(SYSCTL_HANDLER_ARGS)
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static const char machine32[] = "arm";
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#endif
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int error;
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#ifdef SCTL_MASK32
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if ((req->flags & SCTL_MASK32) != 0 && adaptive_machine_arch)
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error = SYSCTL_OUT(req, machine32, sizeof(machine32));
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@ -188,6 +189,7 @@ static const struct cpu_parts cpu_parts_arm[] = {
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{ CPU_PART_NEOVERSE_N1, "Neoverse-N1" },
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CPU_PART_NONE,
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};
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/* Cavium */
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static const struct cpu_parts cpu_parts_cavium[] = {
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{ CPU_PART_THUNDERX, "ThunderX" },
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@ -263,6 +265,7 @@ struct mrs_field_value {
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MRS_FIELD_VALUE(13ul<< _reg ## _ ## _field ## _SHIFT, "14 "_desc "s"), \
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MRS_FIELD_VALUE(14ul<< _reg ## _ ## _field ## _SHIFT, "15 "_desc "s"), \
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MRS_FIELD_VALUE(15ul<< _reg ## _ ## _field ## _SHIFT, "16 "_desc "s")
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#define MRS_FIELD_VALUE_END { .desc = NULL }
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struct mrs_field {
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@ -283,6 +286,7 @@ struct mrs_field {
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.mask = _register ## _ ## _name ## _MASK, \
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.values = (_values), \
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}
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#define MRS_FIELD_END { .type = MRS_INVALID, }
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/* ID_AA64AFR0_EL1 */
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@ -290,11 +294,13 @@ static struct mrs_field id_aa64afr0_fields[] = {
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MRS_FIELD_END,
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};
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/* ID_AA64AFR1_EL1 */
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static struct mrs_field id_aa64afr1_fields[] = {
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MRS_FIELD_END,
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};
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/* ID_AA64DFR0_EL1 */
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static struct mrs_field_value id_aa64dfr0_pmsver[] = {
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MRS_FIELD_VALUE(ID_AA64DFR0_PMSVer_NONE, ""),
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@ -352,11 +358,13 @@ static struct mrs_field id_aa64dfr0_fields[] = {
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MRS_FIELD_END,
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};
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/* ID_AA64DFR1 */
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static struct mrs_field id_aa64dfr1_fields[] = {
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MRS_FIELD_END,
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};
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/* ID_AA64ISAR0_EL1 */
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static struct mrs_field_value id_aa64isar0_rndr[] = {
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MRS_FIELD_VALUE(ID_AA64ISAR0_RNDR_NONE, ""),
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@ -453,6 +461,7 @@ static struct mrs_field id_aa64isar0_fields[] = {
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MRS_FIELD_END,
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};
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/* ID_AA64ISAR1_EL1 */
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static struct mrs_field_value id_aa64isar1_i8mm[] = {
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MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR1, I8MM, NONE, IMPL),
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@ -549,6 +558,7 @@ static struct mrs_field id_aa64isar1_fields[] = {
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MRS_FIELD_END,
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};
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/* ID_AA64MMFR0_EL1 */
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static struct mrs_field_value id_aa64mmfr0_tgran4[] = {
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MRS_FIELD_VALUE_NONE_IMPL(ID_AA64MMFR0, TGran4, NONE, IMPL),
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@ -614,6 +624,7 @@ static struct mrs_field id_aa64mmfr0_fields[] = {
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MRS_FIELD_END,
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};
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/* ID_AA64MMFR1_EL1 */
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static struct mrs_field_value id_aa64mmfr1_xnx[] = {
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MRS_FIELD_VALUE_NONE_IMPL(ID_AA64MMFR1, XNX, NONE, IMPL),
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@ -675,6 +686,7 @@ static struct mrs_field id_aa64mmfr1_fields[] = {
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MRS_FIELD_END,
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};
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/* ID_AA64MMFR2_EL1 */
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static struct mrs_field_value id_aa64mmfr2_nv[] = {
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MRS_FIELD_VALUE_NONE_IMPL(ID_AA64MMFR2, NV, NONE, IMPL),
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@ -725,6 +737,7 @@ static struct mrs_field id_aa64mmfr2_fields[] = {
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MRS_FIELD_END,
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};
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/* ID_AA64PFR0_EL1 */
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static struct mrs_field_value id_aa64pfr0_csv3[] = {
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MRS_FIELD_VALUE(ID_AA64PFR0_CSV3_NONE, ""),
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@ -832,6 +845,7 @@ static struct mrs_field id_aa64pfr0_fields[] = {
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MRS_FIELD_END,
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};
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/* ID_AA64PFR1_EL1 */
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static struct mrs_field_value id_aa64pfr1_bt[] = {
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MRS_FIELD_VALUE(ID_AA64PFR1_BT_NONE, ""),
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