Fix disassembly of the invala, itc, itr and hint instructions

by fixing the opcode ordering.

MFC after: 1 week
This commit is contained in:
Marcel Moolenaar 2007-10-16 02:49:40 +00:00
parent 1391b079da
commit b17249b1ec
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=172689

View File

@ -253,8 +253,8 @@ enum asm_op {
ASM_OP_FPRSQRTA, ASM_OP_FRCPA, ASM_OP_FRSQRTA, ASM_OP_FSELECT,
ASM_OP_FSETC, ASM_OP_FSWAP, ASM_OP_FSXT, ASM_OP_FWB, ASM_OP_FXOR,
ASM_OP_GETF,
ASM_OP_INVALA, ASM_OP_ITC, ASM_OP_ITR,
ASM_OP_HINT,
ASM_OP_INVALA, ASM_OP_ITC, ASM_OP_ITR,
ASM_OP_LD1, ASM_OP_LD16, ASM_OP_LD2, ASM_OP_LD4, ASM_OP_LD8,
ASM_OP_LDF, ASM_OP_LDF8, ASM_OP_LDFD, ASM_OP_LDFE, ASM_OP_LDFP8,
ASM_OP_LDFPD, ASM_OP_LDFPS, ASM_OP_LDFS, ASM_OP_LFETCH, ASM_OP_LOADRS,