Add a riscv define.

Submitted by:	Yukishige Shibata <y-shibat@mtd.biglobe.ne.jp>
This commit is contained in:
Ruslan Bukin 2016-06-01 14:03:13 +00:00
parent 5c4c3d9285
commit b217eb9314
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=301123

View File

@ -138,6 +138,8 @@ typedef u_int32_t u32;
#define MEMORY_BARRIER() dmb()
#elif defined __aarch64__
#define MEMORY_BARRIER() dmb(sy)
#elif defined __riscv__
#define MEMORY_BARRIER() fence()
#else
#error "Not supported platform"
#endif