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bge: clean up empty lines in .c and .h files

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This commit is contained in:
Mateusz Guzik 2020-09-01 21:42:49 +00:00
parent 3a1ecfe33d
commit b410de8ad2
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=365122
2 changed files with 0 additions and 19 deletions
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4
sys/dev/bge/if_bge.c
View File

@ -240,7 +240,6 @@ static const struct bge_type {
{ FJTSU_VENDORID, FJTSU_DEVICEID_PW008GE4 },
{ FJTSU_VENDORID, FJTSU_DEVICEID_PW008GE5 },
{ FJTSU_VENDORID, FJTSU_DEVICEID_PP250450 },
{ 0, 0 }
};
@ -255,7 +254,6 @@ static const struct bge_vendor {
{ SK_VENDORID, "SysKonnect" },
{ TC_VENDORID, "3Com" },
{ FJTSU_VENDORID, "Fujitsu" },
{ 0, NULL }
};
@ -330,7 +328,6 @@ static const struct bge_revision {
{ BGE_CHIPID_BCM57765_B0, "BCM57765 B0" },
{ BGE_CHIPID_BCM57780_A0, "BCM57780 A0" },
{ BGE_CHIPID_BCM57780_A1, "BCM57780 A1" },
{ 0, NULL }
};
@ -363,7 +360,6 @@ static const struct bge_revision bge_majorrevs[] = {
{ BGE_ASICREV_BCM5719, "unknown BCM5719" },
{ BGE_ASICREV_BCM5720, "unknown BCM5720" },
{ BGE_ASICREV_BCM5762, "unknown BCM5762" },
{ 0, NULL }
};

15
sys/dev/bge/if_bgereg.h
View File

@ -145,7 +145,6 @@
#define BGE_EXT_SSRAM 0x00020000
#define BGE_EXT_SSRAM_END 0x000FFFFF
/*
* BCM570x register offsets. These are memory mapped registers
* which can be accessed with the CSR_READ_4()/CSR_WRITE_4() macros.
@ -462,7 +461,6 @@
#define BGE_PCICLOCKCTL_SYSPLL_DISABLE 0x00008000
#define BGE_PCICLOCKCTL_BIST_ENABLE 0x00010000
#ifndef PCIM_CMD_MWIEN
#define PCIM_CMD_MWIEN 0x0010
#endif
@ -902,7 +900,6 @@
#define BGE_SGDIGSTS_PAUSE_CAP 0x00080000
#define BGE_SGDIGSTS_ASYM_PAUSE 0x00100000
/* MI communication register */
#define BGE_MICOMM_DATA 0x0000FFFF
#define BGE_MICOMM_REG 0x001F0000
@ -927,7 +924,6 @@
#define BGE_MIMODE_500KHZ_CONST 0x00008000
#define BGE_MIMODE_BASE 0x000C0000
/*
* Send data initiator control registers.
*/
@ -1157,7 +1153,6 @@
#define BGE_RXLP_LOCSTAT_IFIN_ERRORS 0x2254
#define BGE_RXLP_LOCSTAT_RXTHRESH_HIT 0x2258
/* Receive List Placement mode register */
#define BGE_RXLPMODE_RESET 0x00000001
#define BGE_RXLPMODE_ENABLE 0x00000002
@ -1208,7 +1203,6 @@
#define BGE_RDBDI_RETURN_PROD15 0x24BC
#define BGE_RDBDI_HWDIAG 0x24C0
/* Receive Data and Receive BD Initiator Mode register */
#define BGE_RDBDIMODE_RESET 0x00000001
#define BGE_RDBDIMODE_ENABLE 0x00000002
@ -1221,7 +1215,6 @@
#define BGE_RDBDISTAT_GIANT_ATTN 0x00000008
#define BGE_RDBDISTAT_BADRINGSZ_ATTN 0x00000010
/*
* Receive Data Completion Control registers
*/
@ -1410,7 +1403,6 @@
#define BGE_HCC_TX_BD_CONS14 0x3CF8
#define BGE_HCC_TX_BD_CONS15 0x3CFC
/* Host coalescing mode register */
#define BGE_HCCMODE_RESET 0x00000001
#define BGE_HCCMODE_ENABLE 0x00000002
@ -1544,7 +1536,6 @@
#define BGE_BMANSTAT_ERRO 0x00000004
#define BGE_BMANSTAT_LOWMBUF_ERROR 0x00000010
/*
* Read DMA Control registers
*/
@ -1652,7 +1643,6 @@
#define BGE_WDMASTAT_PCI_FIFOOREAD_ATTN 0x00000100
#define BGE_WDMASTAT_LOCREAD_TOOBIG 0x00000200
/*
* RX CPU registers
*/
@ -1748,7 +1738,6 @@
#define BGE_TXCPUSTAT_MA_REQ_FIFOOFLOW 0x40000000
#define BGE_TXCPUSTAT_BLOCKING_READ 0x80000000
/*
* Low priority mailbox registers
*/
@ -1924,7 +1913,6 @@
#define BGE_MSISTAT_MSI_FIFOUFLOW_ATTN 0x00000020
#define BGE_MSISTAT_MSI_FIFOOFLOW_ATTN 0x00000040
/*
* DMA Completion registers
*/
@ -1934,7 +1922,6 @@
#define BGE_DMACMODE_RESET 0x00000001
#define BGE_DMACMODE_ENABLE 0x00000002
/*
* General control registers.
*/
@ -2427,7 +2414,6 @@ struct bge_status_block {
#define BGE_STATFLAG_LINKSTATE_CHANGED 0x00000002
#define BGE_STATFLAG_ERROR 0x00000004
/*
* Broadcom Vendor ID
* (Note: the BCM570x still defaults to the Alteon PCI vendor ID
@ -2666,7 +2652,6 @@ struct bge_rx_mac_stats {
bge_hostaddr etherStatsPkts8192Octetsto9022Octets;
};
/* Statistics maintained MAC Transmit block. */
struct bge_tx_mac_stats {
bge_hostaddr ifHCOutOctets;