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powerpc/booke: Use wrtee instead of msr to restore EE bit

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The MSR[EE] bit does not require synchronization when changing.  This is a
trivial micro-optimization, removing the trailing isync from mtmsr().

MFC after:	1 week
This commit is contained in:
Justin Hibbits 2019-05-22 02:43:17 +00:00
parent 11a5c93d51
commit b4b2e7a7b9
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=348079
1 changed files with 4 additions and 4 deletions
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8
sys/powerpc/booke/pmap.c
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@ -3916,7 +3916,7 @@ tlb1_read_entry(tlb_entry_t *entry, unsigned int slot)
entry->mas7 = 0;
break;
}
mtmsr(msr);
__asm __volatile("wrtee %0" :: "r"(msr));
entry->virt = entry->mas2 & MAS2_EPN_MASK;
entry->phys = ((vm_paddr_t)(entry->mas7 & MAS7_RPN) << 32) |
@ -3991,7 +3991,7 @@ tlb1_write_entry(tlb_entry_t *e, unsigned int idx)
msr = mfmsr();
__asm __volatile("wrteei 0");
tlb1_write_entry_int(&args);
mtmsr(msr);
__asm __volatile("wrtee %0" :: "r"(msr));
}
}
@ -4390,7 +4390,7 @@ tid_flush(tlbtid_t tid)
mtspr(SPR_MAS6, tid << MAS6_SPID0_SHIFT);
/* tlbilxpid */
__asm __volatile("isync; .long 0x7c000024; isync; msync");
mtmsr(msr);
__asm __volatile("wrtee %0" :: "r"(msr));
return;
}
@ -4415,7 +4415,7 @@ tid_flush(tlbtid_t tid)
mtspr(SPR_MAS1, mas1);
__asm __volatile("isync; tlbwe; isync; msync");
}
mtmsr(msr);
__asm __volatile("wrtee %0" :: "r"(msr));
}
#ifdef DDB