Fix endianness on FDT read in ARM GIC
Submitted by: Jakub Palider <jpa@semihalf.com> Reviewed by: ian, nwhitehorn Obtained from: Semihalf
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47568136c5
commit
b63ea39440
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=279235
@ -205,7 +205,7 @@ gic_decode_fdt(uint32_t iparent, uint32_t *intr, int *interrupt,
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*trig = INTR_TRIGGER_CONFORM;
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*pol = INTR_POLARITY_CONFORM;
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} else {
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if (intr[0] == 0)
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if (fdt32_to_cpu(intr[0]) == 0)
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*interrupt = fdt32_to_cpu(intr[1]) + GIC_FIRST_SPI;
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else
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*interrupt = fdt32_to_cpu(intr[1]) + GIC_FIRST_PPI;
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@ -217,13 +217,13 @@ gic_decode_fdt(uint32_t iparent, uint32_t *intr, int *interrupt,
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* 8 = active low level-sensitive
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* The hardware only supports active-high-level or rising-edge.
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*/
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if (intr[2] & 0x0a) {
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if (fdt32_to_cpu(intr[2]) & 0x0a) {
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printf("unsupported trigger/polarity configuration "
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"0x%2x\n", intr[2] & 0x0f);
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"0x%2x\n", fdt32_to_cpu(intr[2]) & 0x0f);
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return (ENOTSUP);
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}
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*pol = INTR_POLARITY_CONFORM;
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if (intr[2] & 0x01)
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if (fdt32_to_cpu(intr[2]) & 0x01)
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*trig = INTR_TRIGGER_EDGE;
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else
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*trig = INTR_TRIGGER_LEVEL;
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