bhyve: import OpRegion definitions
Those definitions are required for the GVT-d emulation to parse the OpRegion. Reviewed by: markj MFC after: 1 week Sponsored by: Beckhoff Automation GmbH & Co. KG Differential Revision: https://reviews.freebsd.org/D40037
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Corvin Köhne
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usr.sbin/bhyve/pci_gvt-d-opregion.h
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186
usr.sbin/bhyve/pci_gvt-d-opregion.h
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/** @file
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IGD OpRegion definition from Intel Integrated Graphics Device OpRegion
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Specification.
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https://01.org/sites/default/files/documentation/skl_opregion_rev0p5.pdf
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Copyright (c) 2016 - 2019, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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/*
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* See
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* <https://github.com/tianocore/edk2-platforms/blob/82979ab1ca44101e0b92a9c4bda1dfe64a8249f6/Silicon/Intel/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h>
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*/
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#pragma once
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#include <sys/types.h>
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#define IGD_OPREGION_HEADER_SIGN "IntelGraphicsMem"
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#define IGD_OPREGION_HEADER_MBOX1 BIT0
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#define IGD_OPREGION_HEADER_MBOX2 BIT1
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#define IGD_OPREGION_HEADER_MBOX3 BIT2
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#define IGD_OPREGION_HEADER_MBOX4 BIT3
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#define IGD_OPREGION_HEADER_MBOX5 BIT4
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#define IGD_OPREGION_VBT_SIZE_6K (6 * 1024UL)
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/**
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OpRegion structures:
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Sub-structures define the different parts of the OpRegion followed by the
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main structure representing the entire OpRegion.
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@note These structures are packed to 1 byte offsets because the exact
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data location is required by the supporting design specification due to
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the fact that the data is used by ASL and Graphics driver code compiled
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separately.
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**/
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///
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/// OpRegion Mailbox 0 Header structure. The OpRegion Header is used to
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/// identify a block of memory as the graphics driver OpRegion.
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/// Offset 0x0, Size 0x100
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///
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struct igd_opregion_header {
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int8_t sign[0x10]; ///< Offset 0x00 OpRegion Signature
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uint32_t size; ///< Offset 0x10 OpRegion Size
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uint32_t over; ///< Offset 0x14 OpRegion Structure Version
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uint8_t sver[0x20]; ///< Offset 0x18 System BIOS Build Version
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uint8_t vver[0x10]; ///< Offset 0x38 Video BIOS Build Version
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uint8_t gver[0x10]; ///< Offset 0x48 Graphic Driver Build Version
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uint32_t mbox; ///< Offset 0x58 Supported Mailboxes
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uint32_t dmod; ///< Offset 0x5C Driver Model
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uint32_t pcon; ///< Offset 0x60 Platform Configuration
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int16_t dver[0x10]; ///< Offset 0x64 GOP Version
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uint8_t rm01[0x7C]; ///< Offset 0x84 Reserved Must be zero
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} __packed;
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///
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/// OpRegion Mailbox 1 - Public ACPI Methods
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/// Offset 0x100, Size 0x100
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///
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struct igd_opregion_mbox1 {
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uint32_t drdy; ///< Offset 0x100 Driver Readiness
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uint32_t csts; ///< Offset 0x104 Status
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uint32_t cevt; ///< Offset 0x108 Current Event
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uint8_t rm11[0x14]; ///< Offset 0x10C Reserved Must be Zero
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uint32_t didl[8]; ///< Offset 0x120 Supported Display Devices ID List
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uint32_t
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cpdl[8]; ///< Offset 0x140 Currently Attached Display Devices List
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uint32_t
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cadl[8]; ///< Offset 0x160 Currently Active Display Devices List
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uint32_t nadl[8]; ///< Offset 0x180 Next Active Devices List
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uint32_t aslp; ///< Offset 0x1A0 ASL Sleep Time Out
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uint32_t tidx; ///< Offset 0x1A4 Toggle Table Index
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uint32_t chpd; ///< Offset 0x1A8 Current Hotplug Enable Indicator
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uint32_t clid; ///< Offset 0x1AC Current Lid State Indicator
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uint32_t cdck; ///< Offset 0x1B0 Current Docking State Indicator
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uint32_t sxsw; ///< Offset 0x1B4 Display Switch Notification on Sx
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///< StateResume
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uint32_t evts; ///< Offset 0x1B8 Events supported by ASL
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uint32_t cnot; ///< Offset 0x1BC Current OS Notification
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uint32_t NRDY; ///< Offset 0x1C0 Driver Status
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uint8_t did2[0x1C]; ///< Offset 0x1C4 Extended Supported Devices ID
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///< List(DOD)
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uint8_t
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cpd2[0x1C]; ///< Offset 0x1E0 Extended Attached Display Devices List
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uint8_t rm12[4]; ///< Offset 0x1FC - 0x1FF Reserved Must be zero
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} __packed;
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///
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/// OpRegion Mailbox 2 - Software SCI Interface
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/// Offset 0x200, Size 0x100
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///
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struct igd_opregion_mbox2 {
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uint32_t scic; ///< Offset 0x200 Software SCI Command / Status / Data
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uint32_t parm; ///< Offset 0x204 Software SCI Parameters
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uint32_t dslp; ///< Offset 0x208 Driver Sleep Time Out
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uint8_t rm21[0xF4]; ///< Offset 0x20C - 0x2FF Reserved Must be zero
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} __packed;
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///
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/// OpRegion Mailbox 3 - BIOS/Driver Notification - ASLE Support
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/// Offset 0x300, Size 0x100
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///
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struct igd_opregion_mbox3 {
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uint32_t ardy; ///< Offset 0x300 Driver Readiness
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uint32_t aslc; ///< Offset 0x304 ASLE Interrupt Command / Status
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uint32_t tche; ///< Offset 0x308 Technology Enabled Indicator
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uint32_t alsi; ///< Offset 0x30C Current ALS Luminance Reading
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uint32_t bclp; ///< Offset 0x310 Requested Backlight Brightness
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uint32_t pfit; ///< Offset 0x314 Panel Fitting State or Request
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uint32_t cblv; ///< Offset 0x318 Current Brightness Level
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uint16_t bclm[0x14]; ///< Offset 0x31C Backlight Brightness Levels Duty
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///< Cycle Mapping Table
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uint32_t cpfm; ///< Offset 0x344 Current Panel Fitting Mode
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uint32_t epfm; ///< Offset 0x348 Enabled Panel Fitting Modes
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uint8_t plut[0x4A]; ///< Offset 0x34C Panel Look Up Table & Identifier
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uint32_t pfmb; ///< Offset 0x396 PWM Frequency and Minimum Brightness
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uint32_t ccdv; ///< Offset 0x39A Color Correction Default Values
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uint32_t pcft; ///< Offset 0x39E Power Conservation Features
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uint32_t srot; ///< Offset 0x3A2 Supported Rotation Angles
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uint32_t iuer; ///< Offset 0x3A6 Intel Ultrabook(TM) Event Register
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uint64_t fdss; ///< Offset 0x3AA DSS Buffer address allocated for IFFS
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///< feature
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uint32_t fdsp; ///< Offset 0x3B2 Size of DSS buffer
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uint32_t stat; ///< Offset 0x3B6 State Indicator
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uint64_t rvda; ///< Offset 0x3BA Absolute/Relative Address of Raw VBT
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///< Data from OpRegion Base
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uint32_t rvds; ///< Offset 0x3C2 Raw VBT Data Size
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uint8_t rsvd2[0x3A]; ///< Offset 0x3C6 - 0x3FF Reserved Must be zero.
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///< Bug in spec 0x45(69)
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} __packed;
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///
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/// OpRegion Mailbox 4 - VBT Video BIOS Table
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/// Offset 0x400, Size 0x1800
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///
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struct igd_opregion_mbox4 {
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uint8_t rvbt[IGD_OPREGION_VBT_SIZE_6K]; ///< Offset 0x400 - 0x1BFF Raw
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///< VBT Data
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} __packed;
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///
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/// OpRegion Mailbox 5 - BIOS/Driver Notification - Data storage BIOS to Driver
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/// data sync Offset 0x1C00, Size 0x400
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///
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struct igd_opregion_mbox5 {
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uint32_t phed; ///< Offset 0x1C00 Panel Header
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uint8_t bddc[0x100]; ///< Offset 0x1C04 Panel EDID (DDC data)
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uint8_t rm51[0x2FC]; ///< Offset 0x1D04 - 0x1FFF Reserved Must be zero
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} __packed;
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///
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/// IGD OpRegion Structure
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///
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struct igd_opregion {
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struct igd_opregion_header
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header; ///< OpRegion header (Offset 0x0, Size 0x100)
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struct igd_opregion_mbox1 mbox1; ///< Mailbox 1: Public ACPI Methods
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///< (Offset 0x100, Size 0x100)
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struct igd_opregion_mbox2 mbox2; ///< Mailbox 2: Software SCI Interface
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///< (Offset 0x200, Size 0x100)
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struct igd_opregion_mbox3
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mbox3; ///< Mailbox 3: BIOS to Driver Notification (Offset 0x300,
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///< Size 0x100)
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struct igd_opregion_mbox4 mbox4; ///< Mailbox 4: Video BIOS Table (VBT)
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///< (Offset 0x400, Size 0x1800)
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struct igd_opregion_mbox5
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mbox5; ///< Mailbox 5: BIOS to Driver Notification Extension (Offset
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///< 0x1C00, Size 0x400)
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} __packed;
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///
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/// VBT Header Structure
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///
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struct vbt_header {
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uint8_t product_string[20];
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uint16_t version;
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uint16_t header_size;
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uint16_t table_size;
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uint8_t checksum;
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uint8_t reserved1;
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uint32_t bios_data_offset;
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uint32_t aim_data_offset[4];
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} __packed;
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