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Some gem and hme hardware bogusly has the intpin register hardwired to

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0; detect this case and correct it. While being there, clean up nearby
comments.
This commit is contained in:
tmm 2003-07-01 14:11:04 +00:00
parent d318541031
commit b69661fe83
2 changed files with 14 additions and 9 deletions
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11
sys/dev/gem/if_gem_pci.c
View File

@ -158,12 +158,15 @@ gem_pci_attach(dev)
struct gem_pci_softc *gsc = device_get_softc(dev);
struct gem_softc *sc = &gsc->gsc_gem;
/*
* Enable bus master and memory access. The firmware does in some
* cases not do this for us on sparc64 machines.
*/
pci_enable_busmaster(dev);
/*
* Some Sun GEMs/ERIs do have their intpin register bogusly set to 0,
* although it should be 1. correct that.
*/
if (pci_get_intpin(dev) == 0)
pci_set_intpin(dev, 1);
sc->sc_dev = dev;
sc->sc_pci = 1; /* XXX */

12
sys/dev/hme/if_hme_pci.c
View File

@ -132,13 +132,15 @@ hme_pci_attach(device_t dev)
struct hme_softc *sc = &hsc->hsc_hme;
int error;
/*
* Enable memory-space and bus master accesses. This is kinda of
* gross; but the hme comes up with neither enabled.
*/
pci_enable_busmaster(dev);
/*
* Some Sun HMEs do have their intpin register bogusly set to 0,
* although it should be 1. correct that.
*/
if (pci_get_intpin(dev) == 0)
pci_set_intpin(dev, 1);
sc->sc_pci = 1; /* XXXXX should all be done in bus_dma. */
sc->sc_pci = 1;
sc->sc_dev = dev;
/*