- KNFized pc98 specific files.
- Disabled unuseinit_cpu_accel_mem() which doesn't work now. - Deleted extra space at the end of line.
This commit is contained in:
KATO Takenori
parent
731955402d
commit
b8586e15da
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=22165
@ -1,6 +1,6 @@
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/*
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* Copyright (c) KATO Takenori, 1996. All rights reserved.
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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@ -12,7 +12,7 @@
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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@ -1,6 +1,6 @@
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/*
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* Copyright (c) KATO Takenori, 1996. All rights reserved.
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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@ -12,7 +12,7 @@
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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@ -26,7 +26,7 @@
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*/
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/*
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* PC-9801 specific definitions for National Semiconductor DP8390 NIC
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* PC-9801 specific definitions for National Semiconductor DP8390 NIC.
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*/
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#ifndef __PC98_PC98_IF_ED98_H__
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#define __PC98_PC98_IF_ED98_H__
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@ -36,80 +36,80 @@
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#error Why you include if_ed98.h?
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#endif
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static void pc98_set_register __P((struct isa_device *dev, int type));
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static void pc98_set_register __P((struct isa_device *dev, int type));
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/*
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* Vendor types
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*/
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#define ED_VENDOR_MISC 0xf0 /* others */
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#define ED_VENDOR_MISC 0xf0 /* others */
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/*
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* Register offsets/total
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*/
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#ifdef ED_NOVELL_NIC_OFFSET
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#undef ED_NOVELL_NIC_OFFSET
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#undef ED_NOVELL_NIC_OFFSET
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#endif
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#define ED_NOVELL_NIC_OFFSET sc->edreg.nic_offset
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#define ED_NOVELL_NIC_OFFSET sc->edreg.nic_offset
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#ifdef ED_NOVELL_ASIC_OFFSET
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#undef ED_NOVELL_ASIC_OFFSET
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#undef ED_NOVELL_ASIC_OFFSET
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#endif
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#define ED_NOVELL_ASIC_OFFSET sc->edreg.asic_offset
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#define ED_NOVELL_ASIC_OFFSET sc->edreg.asic_offset
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/*
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* Remote DMA data register; for reading or writing to the NIC mem
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* via programmed I/O (offset from ASIC base)
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* via programmed I/O (offset from ASIC base).
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*/
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#ifdef ED_NOVELL_DATA
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#undef ED_NOVELL_DATA
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#undef ED_NOVELL_DATA
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#endif
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#define ED_NOVELL_DATA sc->edreg.data
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#define ED_NOVELL_DATA sc->edreg.data
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/*
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* Reset register; reading from this register causes a board reset
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* Reset register; reading from this register causes a board reset.
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*/
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#ifdef ED_NOVELL_RESET
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#undef ED_NOVELL_RESET
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#undef ED_NOVELL_RESET
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#endif
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#define ED_NOVELL_RESET sc->edreg.reset
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#define ED_NOVELL_RESET sc->edreg.reset
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/*
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* Card type
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* Card types.
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*
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* Type Card
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* 0x00 Allied Telesis CenterCom LA-98-T
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* 0x10 MELCO LPC-TJ, LPC-TS / IO-DATA PCLA/T
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* 0x20 PLANET SMART COM 98 EN-2298 / ELECOM LANEED LD-BDN[123]A
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* 0x30 MELCO EGY-98 / Contec C-NET(98)E-A/L-A
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* 0x40 MELCO LGY-98, IND-SP, IND-SS / MACNICA NE2098(XXX)
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* 0x00 Allied Telesis CenterCom LA-98-T.
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* 0x10 MELCO LPC-TJ, LPC-TS / IO-DATA PCLA/T.
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* 0x20 PLANET SMART COM 98 EN-2298 / ELECOM LANEED LD-BDN[123]A.
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* 0x30 MELCO EGY-98 / Contec C-NET(98)E-A/L-A.
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* 0x40 MELCO LGY-98, IND-SP, IND-SS / MACNICA NE2098(XXX).
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* 0x50 ICM DT-ET-25, DT-ET-T5, IF-2766ET, IF-2771ET /
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* D-Link DE-298P{T,CAT}, DE-298{T,TP,CAT}
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* 0x60 Allied Telesis SIC-98
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* 0x80 NEC PC-9801-108
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* 0x90 IO-DATA LA-98
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* 0xa0 Contec C-NET(98)
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* 0xb0 Contec C-NET(98)E/L
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* D-Link DE-298P{T,CAT}, DE-298{T,TP,CAT}.
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* 0x60 Allied Telesis SIC-98.
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* 0x80 NEC PC-9801-108.
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* 0x90 IO-DATA LA-98.
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* 0xa0 Contec C-NET(98).
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* 0xb0 Contec C-NET(98)E/L.
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*/
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#define ED_TYPE98_BASE 0x10
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#define ED_TYPE98_BASE 0x10
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#define ED_TYPE98_GENERIC 0x10
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#define ED_TYPE98_LPC 0x11
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#define ED_TYPE98_GENERIC 0x10
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#define ED_TYPE98_LPC 0x11
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#define ED_TYPE98_BDN 0x12
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#define ED_TYPE98_EGY 0x13
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#define ED_TYPE98_LGY 0x14
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#define ED_TYPE98_ICM 0x15
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#define ED_TYPE98_SIC 0x16
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#define ED_TYPE98_108 0x18
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#define ED_TYPE98_LA98 0x19
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#define ED_TYPE98_CNET98 0x1a
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#define ED_TYPE98_CNET98EL 0x1b
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#define ED_TYPE98_UE2212 0x1c
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#define ED_TYPE98_108 0x18
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#define ED_TYPE98_LA98 0x19
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#define ED_TYPE98_CNET98 0x1a
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#define ED_TYPE98_CNET98EL 0x1b
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#define ED_TYPE98_UE2212 0x1c
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#define ED_TYPE98(x) (((x & 0xffff0000) >> 20) | ED_TYPE98_BASE)
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#define ED_TYPE98SUB(x) ((x & 0xf0000) >> 16)
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#define ED_TYPE98(x) (((x & 0xffff0000) >> 20) | ED_TYPE98_BASE)
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#define ED_TYPE98SUB(x) ((x & 0xf0000) >> 16)
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/*
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* Page 0 register offsets
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* Page 0 register offsets.
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*/
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#undef ED_P0_CR
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#define ED_P0_CR sc->edreg.port[0x00]
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@ -182,7 +182,7 @@ static void pc98_set_register __P((struct isa_device *dev, int type));
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#define ED_P0_IMR sc->edreg.port[0x0f]
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/*
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* Page 1 register offsets
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* Page 1 register offsets.
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*/
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#undef ED_P1_CR
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#define ED_P1_CR sc->edreg.port[0x00]
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@ -218,7 +218,7 @@ static void pc98_set_register __P((struct isa_device *dev, int type));
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#define ED_P1_MAR7 sc->edreg.port[0x0f]
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/*
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* Page 2 register offsets
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* Page 2 register offsets.
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*/
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#undef ED_P2_CR
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#define ED_P2_CR sc->edreg.port[0x00]
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@ -251,138 +251,139 @@ static void pc98_set_register __P((struct isa_device *dev, int type));
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/* PCCARD */
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#ifdef ED_PC_MISC
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#undef ED_PC_MISC
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#undef ED_PC_MISC
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#endif
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#define ED_PC_MISC sc->edreg.pc_misc
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#define ED_PC_MISC sc->edreg.pc_misc
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#ifdef ED_PC_RESET
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#undef ED_PC_RESET
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#undef ED_PC_RESET
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#endif
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#define ED_PC_RESET sc->edreg.pc_reset
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#define ED_PC_RESET sc->edreg.pc_reset
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/* LPC-T support */
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#define LPCT_1d0_ON() \
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{ \
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outb(0x2a8e, 0x84); \
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outw(0x4a8e, 0x1d0); \
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outw(0x5a8e, 0x0310); \
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#define LPCT_1d0_ON() \
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{ \
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outb(0x2a8e, 0x84); \
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outw(0x4a8e, 0x1d0); \
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outw(0x5a8e, 0x0310); \
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}
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#define LPCT_1d0_OFF() \
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{ \
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outb(0x2a8e, 0xa4); \
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outw(0x4a8e, 0xd0); \
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outw(0x5a8e, 0x0300); \
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#define LPCT_1d0_OFF() \
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{ \
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outb(0x2a8e, 0xa4); \
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outw(0x4a8e, 0xd0); \
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outw(0x5a8e, 0x0300); \
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}
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/*
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* C-NET(98)
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*/
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#define ED_CNET98_INIT_ADDR 0xaaed /* 0xaaed reset register */
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/* 0xaaef i/o address set */
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#define ED_CNET98_IO_PORTS 32
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#define ED_CNET98_INIT_ADDR 0xaaed /* 0xaaed reset register. */
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/* 0xaaef i/o address set. */
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#define ED_CNET98_IO_PORTS 32
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/* offset NIC address */
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#define ED_CNET98_MAP_REG0L 1 /* MAPPING register0 Low */
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#define ED_CNET98_MAP_REG1L 3 /* MAPPING register1 Low */
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#define ED_CNET98_MAP_REG2L 5 /* MAPPING register2 Low */
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#define ED_CNET98_MAP_REG3L 7 /* MAPPING register3 Low */
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#define ED_CNET98_MAP_REG0H 9 /* MAPPING register0 Hi */
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#define ED_CNET98_MAP_REG1H 11 /* MAPPING register1 Hi */
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#define ED_CNET98_MAP_REG2H 13 /* MAPPING register2 Hi */
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#define ED_CNET98_MAP_REG3H 15 /* MAPPING register3 Hi */
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#define ED_CNET98_WIN_REG (0x400 + 1) /* window register */
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#define ED_CNET98_INT_LEV (0x400 + 3) /* init level register */
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#define ED_CNET98_INT_REQ (0x400 + 5) /* init request register */
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#define ED_CNET98_INT_MASK (0x400 + 7) /* init mask register */
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#define ED_CNET98_INT_STAT (0x400 + 9) /* init status register */
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#define ED_CNET98_INT_CLR (0x400 + 9) /* init clear register */
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#define ED_CNET98_RESERVE1 (0x400 + 11)
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#define ED_CNET98_RESERVE2 (0x400 + 13)
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#define ED_CNET98_RESERVE3 (0x400 + 15)
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#define ED_CNET98_INT_IRQ3 0x01 /* INT 0 */
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#define ED_CNET98_INT_IRQ5 0x02 /* INT 1 */
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#define ED_CNET98_INT_IRQ6 0x04 /* INT 2 */
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#define ED_CNET98_INT_IRQ9 0x08 /* INT 3 */
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#define ED_CNET98_INT_IRQ12 0x20 /* INT 5 */
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#define ED_CNET98_INT_IRQ13 0x40 /* INT 6 */
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#define ED_CNET98_MAP_REG0L 1 /* MAPPING register0 Low. */
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#define ED_CNET98_MAP_REG1L 3 /* MAPPING register1 Low. */
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#define ED_CNET98_MAP_REG2L 5 /* MAPPING register2 Low. */
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#define ED_CNET98_MAP_REG3L 7 /* MAPPING register3 Low. */
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#define ED_CNET98_MAP_REG0H 9 /* MAPPING register0 Hi. */
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#define ED_CNET98_MAP_REG1H 11 /* MAPPING register1 Hi. */
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#define ED_CNET98_MAP_REG2H 13 /* MAPPING register2 Hi. */
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#define ED_CNET98_MAP_REG3H 15 /* MAPPING register3 Hi. */
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#define ED_CNET98_WIN_REG (0x400 + 1) /* Window register. */
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#define ED_CNET98_INT_LEV (0x400 + 3) /* Init level register. */
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#define ED_CNET98_INT_REQ (0x400 + 5) /* Init request register. */
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#define ED_CNET98_INT_MASK (0x400 + 7) /* Init mask register. */
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#define ED_CNET98_INT_STAT (0x400 + 9) /* Init status register. */
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#define ED_CNET98_INT_CLR (0x400 + 9) /* Init clear register. */
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#define ED_CNET98_RESERVE1 (0x400 + 11)
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#define ED_CNET98_RESERVE2 (0x400 + 13)
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#define ED_CNET98_RESERVE3 (0x400 + 15)
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#define ED_CNET98_INT_IRQ3 0x01 /* INT 0 */
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#define ED_CNET98_INT_IRQ5 0x02 /* INT 1 */
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#define ED_CNET98_INT_IRQ6 0x04 /* INT 2 */
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#define ED_CNET98_INT_IRQ9 0x08 /* INT 3 */
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#define ED_CNET98_INT_IRQ12 0x20 /* INT 5 */
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#define ED_CNET98_INT_IRQ13 0x40 /* INT 6 */
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/*
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* C-NET(98)E/L
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*/
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/*
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* NIC Initial Register(on board JP1)
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* NIC Initial Register(on board JP1).
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*/
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#define ED_CNET98EL_INIT 0xaaed
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#define ED_CNET98EL_INIT2 0x55ed
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#define ED_CNET98EL_INIT 0xaaed
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#define ED_CNET98EL_INIT2 0x55ed
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#define ED_CNET98EL_NIC_OFFSET 0
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#define ED_CNET98EL_ASIC_OFFSET 0x400 /* offset to nic i/o regs */
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#define ED_CNET98EL_PAGE_OFFSET 0x0000 /* page offset for NIC access to mem */
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#define ED_CNET98EL_NIC_OFFSET 0
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#define ED_CNET98EL_ASIC_OFFSET 0x400 /* Offset to nic i/o regs. */
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#define ED_CNET98EL_PAGE_OFFSET 0x0000 /* Page offset for NIC access to mem. */
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/*
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* XXX - The I/O address range is fragmented in the CNET98E/L; this is the
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* number of regs at iobase.
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*/
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#define ED_CNET98EL_IO_PORTS 16 /* # of i/o addresses used */
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#define ED_CNET98EL_IO_PORTS 16 /* # of i/o addresses used. */
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/*
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* Interrupt Configuration Register (offset from ASIC base)
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* Interrupt Configuration Register (offset from ASIC base).
|
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*/
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#define ED_CNET98EL_ICR 0x02
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#define ED_CNET98EL_ICR 0x02
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#define ED_CNET98EL_ICR_IRQ3 0x01 /* Interrupt request 3 select */
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#define ED_CNET98EL_ICR_IRQ5 0x02 /* Interrupt request 5 select */
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#define ED_CNET98EL_ICR_IRQ6 0x04 /* Interrupt request 6 select */
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#define ED_CNET98EL_ICR_IRQ12 0x20 /* Interrupt request 12 select */
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#define ED_CNET98EL_ICR_IRQ3 0x01 /* Interrupt request 3 select. */
|
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#define ED_CNET98EL_ICR_IRQ5 0x02 /* Interrupt request 5 select. */
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#define ED_CNET98EL_ICR_IRQ6 0x04 /* Interrupt request 6 select. */
|
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#define ED_CNET98EL_ICR_IRQ12 0x20 /* Interrupt request 12 select. */
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/*
|
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* Interrupt Mask Register (offset from ASIC base)
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* Interrupt Mask Register (offset from ASIC base).
|
||||
*/
|
||||
#define ED_CNET98EL_IMR 0x04
|
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#define ED_CNET98EL_IMR 0x04
|
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/*
|
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* Interrupt Status Register (offset from ASIC base)
|
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* Interrupt Status Register (offset from ASIC base).
|
||||
*/
|
||||
#define ED_CNET98EL_ISR 0x05
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#define ED_CNET98EL_ISR 0x05
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/* NE2000, LGY-98, ICM, LPC-T, C-NET(98)E/L */
|
||||
static unsigned int edp_generic[16] = {
|
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static unsigned int edp_generic[16] = {
|
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0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
|
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};
|
||||
|
||||
/* EGY-98 */
|
||||
static unsigned int edp_egy98[16] = {
|
||||
static unsigned int edp_egy98[16] = {
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||||
0, 0x02, 0x04, 0x06, 0x08, 0x0a, 0x0c, 0x0e,
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0x100, 0x102, 0x104, 0x106, 0x108, 0x10a, 0x10c, 0x10e
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};
|
||||
|
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/* SIC-98 */
|
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static unsigned int edp_sic98[16] = {
|
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static unsigned int edp_sic98[16] = {
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0x0000, 0x0200, 0x0400, 0x0600, 0x0800, 0x0a00, 0x0c00, 0x0e00,
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0x1000, 0x1200, 0x1400, 0x1600, 0x1800, 0x1a00, 0x1c00, 0x1e00
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};
|
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|
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/* IO-DATA LA-98, ELECOM LD-BDN */
|
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static unsigned int edp_la98[16] = {
|
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static unsigned int edp_la98[16] = {
|
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0x0000, 0x1000, 0x2000, 0x3000, 0x4000, 0x5000, 0x6000, 0x7000,
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0x8000, 0x9000, 0xa000, 0xb000, 0xc000, 0xd000, 0xe000, 0xf000
|
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};
|
||||
|
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/* NEC PC-9801-108 */
|
||||
static unsigned int edp_nec108[16] = {
|
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static unsigned int edp_nec108[16] = {
|
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0x0000, 0x0002, 0x0004, 0x0006, 0x0008, 0x000a, 0x000c, 0x000e,
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0x1000, 0x1002, 0x1004, 0x1006, 0x1008, 0x100a, 0x100c, 0x100e
|
||||
};
|
||||
|
||||
/* Contec C-NET(98) */
|
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static unsigned int edp_cnet98[16] = {
|
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static unsigned int edp_cnet98[16] = {
|
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0x0000, 0x0002, 0x0004, 0x0006, 0x0008, 0x000a, 0x000c, 0x000e,
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0x0400, 0x0402, 0x0404, 0x0406, 0x0408, 0x040a, 0x040c, 0x040e
|
||||
};
|
||||
|
||||
|
||||
static void pc98_set_register(struct isa_device *dev, int type)
|
||||
static void
|
||||
pc98_set_register(struct isa_device *dev, int type)
|
||||
{
|
||||
struct ed_softc *sc = &ed_softc[dev->id_unit];
|
||||
int adj;
|
||||
struct ed_softc *sc = &ed_softc[dev->id_unit];
|
||||
int adj;
|
||||
|
||||
switch (type) {
|
||||
case ED_TYPE98_GENERIC:
|
||||
@ -469,7 +470,7 @@ static void pc98_set_register(struct isa_device *dev, int type)
|
||||
ED_NOVELL_NIC_OFFSET = 0;
|
||||
ED_NOVELL_ASIC_OFFSET = (0x888 | adj) - dev->id_iobase;
|
||||
ED_NOVELL_DATA = 0;
|
||||
ED_NOVELL_RESET = 2;
|
||||
ED_NOVELL_RESET = 4;
|
||||
ED_PC_MISC = 0x18;
|
||||
ED_PC_RESET = 0x1f;
|
||||
break;
|
||||
|
||||
@ -43,18 +43,20 @@
|
||||
#include <pc98/pc98/pc98.h>
|
||||
#include <i386/isa/isa_device.h>
|
||||
|
||||
extern int Maxmem;
|
||||
extern int Maxmem_under16M;
|
||||
extern int Maxmem;
|
||||
extern int Maxmem_under16M;
|
||||
|
||||
static void init_cpu_accel_mem __P((void));
|
||||
void pc98_init_dmac __P((void));
|
||||
void pc98_getmemsize __P((void));
|
||||
static void init_cpu_accel_mem __P((void));
|
||||
void pc98_init_dmac __P((void));
|
||||
void pc98_getmemsize __P((void));
|
||||
|
||||
#ifdef EPSON_MEMWIN
|
||||
static void init_epson_memwin __P((void));
|
||||
static void init_epson_memwin __P((void));
|
||||
|
||||
static void init_epson_memwin(void)
|
||||
static void
|
||||
init_epson_memwin(void)
|
||||
{
|
||||
|
||||
if (pc98_machine_type & M_EPSON_PC98) {
|
||||
if (Maxmem > 3840) {
|
||||
if (Maxmem == Maxmem_under16M) {
|
||||
@ -65,23 +67,28 @@ static void init_epson_memwin(void)
|
||||
}
|
||||
}
|
||||
|
||||
/* Disable 15MB-16MB caching */
|
||||
/* Disable 15MB-16MB caching. */
|
||||
switch (epson_machine_id) {
|
||||
case 0x34: /* PC486HX */
|
||||
case 0x35: /* PC486HG */
|
||||
case 0x3B: /* PC486HA */
|
||||
/* Cache control start */
|
||||
/* Cache control start. */
|
||||
outb(0x43f, 0x42);
|
||||
outw(0xc40, 0x0033);
|
||||
|
||||
/* Disable 0xF00000-0xFFFFFF */
|
||||
outb(0xc48, 0x49); outb(0xc4c, 0x00);
|
||||
outb(0xc48, 0x48); outb(0xc4c, 0xf0);
|
||||
outb(0xc48, 0x4d); outb(0xc4c, 0x00);
|
||||
outb(0xc48, 0x4c); outb(0xc4c, 0xff);
|
||||
outb(0xc48, 0x4f); outb(0xc4c, 0x00);
|
||||
/* Disable 0xF00000-0xFFFFFF. */
|
||||
outb(0xc48, 0x49);
|
||||
outb(0xc4c, 0x00);
|
||||
outb(0xc48, 0x48);
|
||||
outb(0xc4c, 0xf0);
|
||||
outb(0xc48, 0x4d);
|
||||
outb(0xc4c, 0x00);
|
||||
outb(0xc48, 0x4c);
|
||||
outb(0xc4c, 0xff);
|
||||
outb(0xc48, 0x4f);
|
||||
outb(0xc4c, 0x00);
|
||||
|
||||
/* Cache control end */
|
||||
/* Cache control end. */
|
||||
outb(0x43f, 0x40);
|
||||
break;
|
||||
|
||||
@ -91,7 +98,7 @@ static void init_epson_memwin(void)
|
||||
case 0x32: /* PC486GR+ */
|
||||
case 0x37: /* PC486SE */
|
||||
case 0x38: /* PC486SR */
|
||||
/* Disable 0xF00000-0xFFFFFF */
|
||||
/* Disable 0xF00000-0xFFFFFF. */
|
||||
outb(0x43f, 0x42);
|
||||
outb(0x467, 0xe0);
|
||||
outb(0x567, 0xd8);
|
||||
@ -102,13 +109,17 @@ static void init_epson_memwin(void)
|
||||
break;
|
||||
}
|
||||
|
||||
/* Disable 15MB-16MB RAM and enable memory window */
|
||||
outb(0x43b, inb(0x43b) & 0xfd); /* clear bit1 */
|
||||
/* Disable 15MB-16MB RAM and enable memory window. */
|
||||
outb(0x43b, inb(0x43b) & 0xfd); /* Clear bit1. */
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
static void init_cpu_accel_mem(void)
|
||||
#ifdef notyet
|
||||
static void init_cpu_accel_mem(void);
|
||||
|
||||
static void
|
||||
init_cpu_accel_mem(void)
|
||||
{
|
||||
u_int target_page;
|
||||
/*
|
||||
@ -170,9 +181,10 @@ static void init_cpu_accel_mem(void)
|
||||
invltlb();
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
void pc98_init_dmac(void)
|
||||
void
|
||||
pc98_init_dmac(void)
|
||||
{
|
||||
outb(0x439, (inb(0x439) & 0xfb)); /* DMA Accsess Control over 1MB */
|
||||
outb(0x29, (0x0c | 0)); /* Bank Mode Reg. 16M mode */
|
||||
@ -182,8 +194,8 @@ void pc98_init_dmac(void)
|
||||
outb(0x11, 0x50); /* PC98 must be 0x40 */
|
||||
}
|
||||
|
||||
|
||||
void pc98_getmemsize(void)
|
||||
void
|
||||
pc98_getmemsize(void)
|
||||
{
|
||||
unsigned char under16, over16;
|
||||
|
||||
|
||||
@ -28,7 +28,7 @@
|
||||
#ifndef __PC98_PC98_PC98_MACHDEP_H__
|
||||
#define __PC98_PC98_PC98_MACHDEP_H__
|
||||
|
||||
void pc98_init_dmac __P((void));
|
||||
void pc98_getmemsize __P((void));
|
||||
void pc98_init_dmac __P((void));
|
||||
void pc98_getmemsize __P((void));
|
||||
|
||||
#endif /* __PC98_PC98_PC98_MACHDEP_H__ */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user