Handle unaligned 4-byte loads. While in the neighborhood, remove the
cr.isr sanity check. We actually encounter insanities, which very likely means that the insanity check itself is insane. Remove an empty comment while I'm at it.
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@ -134,6 +134,13 @@ fixup(struct asm_inst *i, mcontext_t *mc, uint64_t va)
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uint64_t postinc;
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switch (i->i_op) {
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case ASM_OP_LD4:
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copyin((void*)va, (void*)&buf.i, 4);
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reg = greg_ptr(mc, (int)i->i_oper[1].o_value);
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if (reg == NULL)
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return (EINVAL);
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wrreg(reg, buf.i & 0xffffffffU);
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break;
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case ASM_OP_LD8:
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copyin((void*)va, (void*)&buf.i, 8);
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reg = greg_ptr(mc, (int)i->i_oper[1].o_value);
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@ -178,19 +185,9 @@ unaligned_fixup(struct trapframe *tf, struct thread *td)
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struct asm_bundle bundle;
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int error, slot;
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/* Sanity checks. */
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if (!(tf->tf_special.isr & IA64_ISR_R) ||
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(tf->tf_special.isr & (IA64_ISR_W|IA64_ISR_X|IA64_ISR_NA))) {
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printf("%s: unexpected cr.isr value\n", __func__);
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return (SIGILL);
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}
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slot = ((tf->tf_special.psr & IA64_PSR_RI) == IA64_PSR_RI_0) ? 0 :
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((tf->tf_special.psr & IA64_PSR_RI) == IA64_PSR_RI_1) ? 1 : 2;
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/*
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*
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*/
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if (ia64_unaligned_print) {
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uprintf("pid %d (%s): unaligned access: va=0x%lx, pc=0x%lx\n",
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td->td_proc->p_pid, td->td_proc->p_comm,
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