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Update PMC events from October 2011 Intel documentation.

Browse Source 
Submitted by:	Davide Italiano <davide.italiano@gmail.com>
MFC after:	3 days
This commit is contained in:
Fabien Thomas 2012-01-04 07:58:36 +00:00
parent 3444c31af6
commit ba89031aea
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=229470
3 changed files with 17 additions and 23 deletions
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17
lib/libpmc/pmc.corei7.3
View File

@ -200,10 +200,6 @@ Number of cache load STLB hits
.Pq Event 08H , Umask 20H
Number of DTLB cache load misses where the low part of the linear to
physical address translation was missed.
.It Li DTLB_LOAD_MISSES.PDP_MISS
.Pq Event 08H , Umask 40H
Number of DTLB cache load misses where the high part of the linear to
physical address translation was missed.
.It Li DTLB_LOAD_MISSES.LARGE_WALK_COMPLETED
.Pq Event 08H , Umask 80H
Counts number of completed large page walks due to load miss in the STLB.
@ -646,10 +642,6 @@ Counter 0, 1 only
Counts all data reads and writes (speculated and retired) from cacheable
memory, including locked operations.
Counter 0, 1 only
.It Li L1D_PEND_MISS.LOAD_BUFFERS_FULL
.Pq Event 48H , Umask 02H
Counts cycles of L1 data cache load fill buffers full.
Counter 0, 1 only
.It Li DTLB_MISSES.ANY
.Pq Event 49H , Umask 01H
Counts the number of misses in the STLB which causes a page walk.
@ -660,6 +652,12 @@ Counts number of misses in the STLB which resulted in a completed page walk.
.Pq Event 49H , Umask 10H
Counts the number of DTLB first level misses that hit in the second level
TLB. This event is only relevant if the core contains multiple DTLB levels.
.It Li DTLB_MISSES.PDE_MISS
.Pq Event 49H , Umask 20H
Number of DTLB misses caused by low part of address, includes references to 2M pages because 2M pages do not use the PDE.
.It Li DTLB_MISSES.LARGE_WALK_COMPLETED
.Pq Event 49H , Umask 80H
Counts number of misses in the STLB which resulted in a completed page walk for large pages.
.It Li LOAD_HIT_PRE
.Pq Event 4CH , Umask 01H
Counts load operations sent to the L1 data cache while a previous SSE
@ -1205,9 +1203,6 @@ The BPU clear leads to 2 cycle bubble in the Front End.
.Pq Event E8H , Umask 02H
Counts late Branch Prediction Unit clears due to Most Recently Used
conflicts. The PBU clear leads to a 3 cycle bubble in the Front End.
.It Li BPU_CLEARS.ANY
.Pq Event E8H , Umask 03H
Counts all BPU clears.
.It Li L2_TRANSACTIONS.LOAD
.Pq Event F0H , Umask 01H
Counts L2 load operations due to HW prefetch or demand loads.

11
sys/dev/hwpmc/hwpmc_core.c
View File

@ -642,7 +642,7 @@ static struct iap_event_descr iap_events[] = {
IAPDESCR(08H_09H, 0x08, 0x09, IAP_F_FM | IAP_F_CA),
IAPDESCR(08H_10H, 0x08, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
IAPDESCR(08H_20H, 0x08, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
IAPDESCR(08H_40H, 0x08, 0x40, IAP_F_FM | IAP_F_I7),
IAPDESCR(08H_40H, 0x08, 0x40, IAP_F_FM | IAP_F_I7O),
IAPDESCR(08H_80H, 0x08, 0x80, IAP_F_FM | IAP_F_I7),
IAPDESCR(09H_01H, 0x09, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7O),
@ -845,7 +845,7 @@ static struct iap_event_descr iap_events[] = {
IAPDESCR(47H_00H, 0x47, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
IAPDESCR(48H_00H, 0x48, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
IAPDESCR(48H_02H, 0x48, 0x02, IAP_F_FM | IAP_F_I7),
IAPDESCR(48H_02H, 0x48, 0x02, IAP_F_FM | IAP_F_I7O),
IAPDESCR(49H_00H, 0x49, 0x00, IAP_F_FM | IAP_F_CC),
IAPDESCR(49H_01H, 0x49, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
@ -854,9 +854,9 @@ static struct iap_event_descr iap_events[] = {
IAP_F_I7 | IAP_F_WM),
IAPDESCR(49H_04H, 0x49, 0x04, IAP_F_FM | IAP_F_WM),
IAPDESCR(49H_10H, 0x49, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
IAPDESCR(49H_20H, 0x49, 0x20, IAP_F_FM | IAP_F_I7O),
IAPDESCR(49H_20H, 0x49, 0x20, IAP_F_FM | IAP_F_I7),
IAPDESCR(49H_40H, 0x49, 0x40, IAP_F_FM | IAP_F_I7O),
IAPDESCR(49H_80H, 0x49, 0x80, IAP_F_FM | IAP_F_WM | IAP_F_I7O),
IAPDESCR(49H_80H, 0x49, 0x80, IAP_F_FM | IAP_F_WM | IAP_F_I7),
IAPDESCR(4BH_00H, 0x4B, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2),
IAPDESCR(4BH_01H, 0x4B, 0x01, IAP_F_FM | IAP_F_ALLCPUSCORE2 | IAP_F_I7O),
@ -1306,7 +1306,7 @@ static struct iap_event_descr iap_events[] = {
IAPDESCR(E8H_01H, 0xE8, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
IAPDESCR(E8H_02H, 0xE8, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM),
IAPDESCR(E8H_03H, 0xE8, 0x03, IAP_F_FM | IAP_F_I7),
IAPDESCR(E8H_03H, 0xE8, 0x03, IAP_F_FM | IAP_F_I7O),
IAPDESCR(ECH_01H, 0xEC, 0x01, IAP_F_FM | IAP_F_WM),
@ -1454,7 +1454,6 @@ iap_event_corei7_ok_on_counter(enum pmc_event pe, int ri)
case PMC_EV_IAP_EVENT_42H_08H:
case PMC_EV_IAP_EVENT_43H_01H:
case PMC_EV_IAP_EVENT_43H_02H:
case PMC_EV_IAP_EVENT_48H_02H:
case PMC_EV_IAP_EVENT_51H_01H:
case PMC_EV_IAP_EVENT_51H_02H:
case PMC_EV_IAP_EVENT_51H_04H:

12
sys/dev/hwpmc/pmc_events.h
View File

@ -1669,7 +1669,7 @@ __PMC_EV_ALIAS("X87_OPS_RETIRED.FXCH", IAP_EVENT_C1H_01H)
/*
* Core i7 and Xeon 5500 events removed between 253669-031US June 2009
* and 253669-033US December 2009.
* and 253669-040US October 2011.
*/
#define __PMC_EV_ALIAS_COREI7_OLD() \
__PMC_EV_ALIAS("SB_FORWARD.ANY", IAP_EVENT_02H_01H) \
@ -1682,6 +1682,7 @@ __PMC_EV_ALIAS("MISALIGN_MEM_REF.ANY", IAP_EVENT_05H_03H) \
__PMC_EV_ALIAS("STORE_BLOCKS.NOT_STA", IAP_EVENT_06H_01H) \
__PMC_EV_ALIAS("STORE_BLOCKS.STA", IAP_EVENT_06H_02H) \
__PMC_EV_ALIAS("STORE_BLOCKS.ANY", IAP_EVENT_06H_0FH) \
__PMC_EV_ALIAS("DTLB_LOAD_MISSES.PDP_MISS", IAP_EVENT_08H_40H) \
__PMC_EV_ALIAS("MEMORY_DISAMBIGURATION.RESET", IAP_EVENT_09H_01H) \
__PMC_EV_ALIAS("MEMORY_DISAMBIGURATION.SUCCESS", IAP_EVENT_09H_02H) \
__PMC_EV_ALIAS("MEMORY_DISAMBIGURATION.WATCHDOG", IAP_EVENT_09H_04H) \
@ -1693,9 +1694,8 @@ __PMC_EV_ALIAS("L2_WRITE.RFO.E_STATE", IAP_EVENT_27H_04H) \
__PMC_EV_ALIAS("UOPS_DECODED.DEC0", IAP_EVENT_3DH_01H) \
__PMC_EV_ALIAS("L1D_CACHE_ST.I_STATE", IAP_EVENT_41H_01H) \
__PMC_EV_ALIAS("L1D_CACHE_ST.MESI", IAP_EVENT_41H_0FH) \
__PMC_EV_ALIAS("DTLB_MISSES.PDE_MISS", IAP_EVENT_49H_20H) \
__PMC_EV_ALIAS("L1D_PEND_MISS.LOAD_BUFFERS_FULL", IAP_EVENT_48H_02H) \
__PMC_EV_ALIAS("DTLB_MISSES.PDP_MISS", IAP_EVENT_49H_40H) \
__PMC_EV_ALIAS("DTLB_MISSES.LARGE_WALK_COMPLETED", IAP_EVENT_49H_80H) \
__PMC_EV_ALIAS("SSE_MEM_EXEC.NTA", IAP_EVENT_4BH_01H) \
__PMC_EV_ALIAS("SSE_MEM_EXEC.STREAMING_STORES", IAP_EVENT_4BH_08H) \
__PMC_EV_ALIAS("SFENCE_CYCLES", IAP_EVENT_4DH_01H) \
@ -1734,6 +1734,7 @@ __PMC_EV_ALIAS("PIC_ACCESSES.TPR_READS", IAP_EVENT_BAH_01H) \
__PMC_EV_ALIAS("PIC_ACCESSES.TPR_WRITES", IAP_EVENT_BAH_02H) \
__PMC_EV_ALIAS("MACHINE_CLEARS.FUSION_ASSIST", IAP_EVENT_C3H_10H) \
__PMC_EV_ALIAS("BOGUS_BR", IAP_EVENT_E4H_01H) \
__PMC_EV_ALIAS("BPU_CLEARS.ANY", IAP_EVENT_E8H_03H) \
__PMC_EV_ALIAS("L2_HW_PREFETCH.HIT", IAP_EVENT_F3H_01H) \
__PMC_EV_ALIAS("L2_HW_PREFETCH.ALLOC", IAP_EVENT_F3H_02H) \
__PMC_EV_ALIAS("L2_HW_PREFETCH.DATA_TRIGGER", IAP_EVENT_F3H_04H) \
@ -1759,7 +1760,6 @@ __PMC_EV_ALIAS("DTLB_LOAD_MISSES.ANY", IAP_EVENT_08H_01H) \
__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_COMPLETED", IAP_EVENT_08H_02H) \
__PMC_EV_ALIAS("DTLB_LOAD_MISSES.STLB_HIT", IAP_EVENT_08H_10H) \
__PMC_EV_ALIAS("DTLB_LOAD_MISSES.PDE_MISS", IAP_EVENT_08H_20H) \
__PMC_EV_ALIAS("DTLB_LOAD_MISSES.PDP_MISS", IAP_EVENT_08H_40H) \
__PMC_EV_ALIAS("DTLB_LOAD_MISSES.LARGE_WALK_COMPLETED", \
IAP_EVENT_08H_80H) \
__PMC_EV_ALIAS("MEM_INST_RETIRED.LOADS", IAP_EVENT_0BH_01H) \
@ -1867,10 +1867,11 @@ __PMC_EV_ALIAS("L1D_CACHE_LOCK.E_STATE", IAP_EVENT_42H_04H) \
__PMC_EV_ALIAS("L1D_CACHE_LOCK.M_STATE", IAP_EVENT_42H_08H) \
__PMC_EV_ALIAS("L1D_ALL_REF.ANY", IAP_EVENT_43H_01H) \
__PMC_EV_ALIAS("L1D_ALL_REF.CACHEABLE", IAP_EVENT_43H_02H) \
__PMC_EV_ALIAS("L1D_PEND_MISS.LOAD_BUFFERS_FULL", IAP_EVENT_48H_02H) \
__PMC_EV_ALIAS("DTLB_MISSES.ANY", IAP_EVENT_49H_01H) \
__PMC_EV_ALIAS("DTLB_MISSES.WALK_COMPLETED", IAP_EVENT_49H_02H) \
__PMC_EV_ALIAS("DTLB_MISSES.STLB_HIT", IAP_EVENT_49H_10H) \
__PMC_EV_ALIAS("DTLB_MISSES.PDE_MISS", IAP_EVENT_49H_20H) \
__PMC_EV_ALIAS("DTLB_MISSES.LARGE_WALK_COMPLETED", IAP_EVENT_49H_80H) \
__PMC_EV_ALIAS("LOAD_HIT_PRE", IAP_EVENT_4CH_01H) \
__PMC_EV_ALIAS("L1D_PREFETCH.REQUESTS", IAP_EVENT_4EH_01H) \
__PMC_EV_ALIAS("L1D_PREFETCH.MISS", IAP_EVENT_4EH_02H) \
@ -1996,7 +1997,6 @@ __PMC_EV_ALIAS("BACLEAR.CLEAR", IAP_EVENT_E6H_01H) \
__PMC_EV_ALIAS("BACLEAR.BAD_TARGET", IAP_EVENT_E6H_02H) \
__PMC_EV_ALIAS("BPU_CLEARS.EARLY", IAP_EVENT_E8H_01H) \
__PMC_EV_ALIAS("BPU_CLEARS.LATE", IAP_EVENT_E8H_02H) \
__PMC_EV_ALIAS("BPU_CLEARS.ANY", IAP_EVENT_E8H_03H) \
__PMC_EV_ALIAS("L2_TRANSACTIONS.LOAD", IAP_EVENT_F0H_01H) \
__PMC_EV_ALIAS("L2_TRANSACTIONS.RFO", IAP_EVENT_F0H_02H) \
__PMC_EV_ALIAS("L2_TRANSACTIONS.IFETCH", IAP_EVENT_F0H_04H) \