Changes to support NetBSD and the new ifmedia extensions.

Submitted by:	Jason Thorpe <thorpej@netbsd.org>
This commit is contained in:
David Greenman 1997-09-05 10:23:58 +00:00
parent 7aa7e2b075
commit ba8c6fd534
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=29138
6 changed files with 1808 additions and 610 deletions

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@ -24,7 +24,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id: if_fxpreg.h,v 1.8 1997/03/21 08:00:13 davidg Exp $
* $Id$
*/
#define FXP_VENDORID_INTEL 0x8086
@ -33,19 +33,26 @@
#define FXP_PCI_MMBA 0x10
#define FXP_PCI_IOBA 0x14
struct fxp_csr {
volatile u_int8_t :2,
scb_rus:4,
scb_cus:2;
volatile u_int8_t scb_statack;
volatile u_int8_t scb_command;
volatile u_int8_t scb_intrcntl;
volatile u_int32_t scb_general;
volatile u_int32_t port;
volatile u_int16_t flash_control;
volatile u_int16_t eeprom_control;
volatile u_int32_t mdi_control;
};
/*
* Control/status registers.
*/
#define FXP_CSR_SCB_RUSCUS 0 /* scb_rus/scb_cus (1 byte) */
#define FXP_CSR_SCB_STATACK 1 /* scb_statack (1 byte) */
#define FXP_CSR_SCB_COMMAND 2 /* scb_command (1 byte) */
#define FXP_CSR_SCB_INTRCNTL 3 /* scb_intrcntl (1 byte) */
#define FXP_CSR_SCB_GENERAL 4 /* scb_general (4 bytes) */
#define FXP_CSR_PORT 8 /* port (4 bytes) */
#define FXP_CSR_FLASHCONTROL 12 /* flash control (2 bytes) */
#define FXP_CSR_EEPROMCONTROL 14 /* eeprom control (2 bytes) */
#define FXP_CSR_MDICONTROL 16 /* mdi control (4 bytes) */
/*
* FOR REFERENCE ONLY, the old definition of FXP_CSR_SCB_RUSCUS:
*
* volatile u_int8_t :2,
* scb_rus:4,
* scb_cus:2;
*/
#define FXP_PORT_SOFTWARE_RESET 0
#define FXP_PORT_SELFTEST 1

107
sys/dev/fxp/if_fxpvar.h Normal file
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@ -0,0 +1,107 @@
/*
* Copyright (c) 1995, David Greenman
* All rights reserved.
*
* Modifications to support NetBSD:
* Copyright (c) 1997 Jason R. Thorpe. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice unmodified, this list of conditions, and the following
* disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id$
*/
/*
* Misc. defintions for the Intel EtherExpress Pro/100B PCI Fast
* Ethernet driver
*/
struct fxp_softc {
#if defined(__NetBSD__)
struct device sc_dev; /* generic device structures */
void *sc_ih; /* interrupt handler cookie */
bus_space_tag_t sc_st; /* bus space tag */
bus_space_handle_t sc_sh; /* bus space handle */
struct ethercom sc_ethercom; /* ethernet common part */
#else
struct arpcom arpcom; /* per-interface network data */
caddr_t csr; /* control/status registers */
#endif /* __NetBSD__ */
struct ifmedia sc_media; /* media information */
struct fxp_cb_tx *cbl_base; /* base of TxCB list */
struct fxp_cb_tx *cbl_first; /* first active TxCB in list */
struct fxp_cb_tx *cbl_last; /* last active TxCB in list */
struct mbuf *rfa_headm; /* first mbuf in receive frame area */
struct mbuf *rfa_tailm; /* last mbuf in receive frame area */
struct fxp_stats *fxp_stats; /* Pointer to interface stats */
int tx_queued; /* # of active TxCB's */
int promisc_mode; /* promiscuous mode enabled */
int phy_primary_addr; /* address of primary PHY */
int phy_primary_device; /* device type of primary PHY */
int phy_10Mbps_only; /* PHY is 10Mbps-only device */
};
/* Macros to ease CSR access. */
#if defined(__NetBSD__)
#define CSR_READ_1(sc, reg) \
bus_space_read_1((sc)->sc_st, (sc)->sc_sh, (reg))
#define CSR_READ_2(sc, reg) \
bus_space_read_2((sc)->sc_st, (sc)->sc_sh, (reg))
#define CSR_READ_4(sc, reg) \
bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg))
#define CSR_WRITE_1(sc, reg, val) \
bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val))
#define CSR_WRITE_2(sc, reg, val) \
bus_space_write_2((sc)->sc_st, (sc)->sc_sh, (reg), (val))
#define CSR_WRITE_4(sc, reg, val) \
bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))
#else
#define CSR_READ_1(sc, reg) \
(*((u_int8_t *)((sc)->csr + (reg))))
#define CSR_READ_2(sc, reg) \
(*((u_int16_t *)((sc)->csr + (reg))))
#define CSR_READ_4(sc, reg) \
(*((u_int32_t *)((sc)->csr + (reg))))
#define CSR_WRITE_1(sc, reg, val) \
(*((u_int8_t *)((sc)->csr + (reg)))) = (val)
#define CSR_WRITE_2(sc, reg, val) \
(*((u_int16_t *)((sc)->csr + (reg)))) = (val)
#define CSR_WRITE_4(sc, reg, val) \
(*((u_int32_t *)((sc)->csr + (reg)))) = (val)
#endif /* __NetBSD__ */
/* Deal with slight differences in software interfaces. */
#if defined(__NetBSD__)
#define sc_if sc_ethercom.ec_if
#define FXP_FORMAT "%s"
#define FXP_ARGS(sc) (sc)->sc_dev.dv_xname
#define FXP_INTR_TYPE int
#define FXP_IOCTLCMD_TYPE u_long
#define FXP_BPFTAP_ARG(ifp) (ifp)->if_bpf
#else /* __FreeBSD__ */
#define sc_if arpcom.ac_if
#define FXP_FORMAT "fxp%d"
#define FXP_ARGS(sc) (sc)->arpcom.ac_if.if_unit
#define FXP_INTR_TYPE void
#define FXP_IOCTLCMD_TYPE int
#define FXP_BPFTAP_ARG(ifp) ifp
#endif /* __NetBSD__ */

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@ -24,7 +24,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id: if_fxpreg.h,v 1.8 1997/03/21 08:00:13 davidg Exp $
* $Id$
*/
#define FXP_VENDORID_INTEL 0x8086
@ -33,19 +33,26 @@
#define FXP_PCI_MMBA 0x10
#define FXP_PCI_IOBA 0x14
struct fxp_csr {
volatile u_int8_t :2,
scb_rus:4,
scb_cus:2;
volatile u_int8_t scb_statack;
volatile u_int8_t scb_command;
volatile u_int8_t scb_intrcntl;
volatile u_int32_t scb_general;
volatile u_int32_t port;
volatile u_int16_t flash_control;
volatile u_int16_t eeprom_control;
volatile u_int32_t mdi_control;
};
/*
* Control/status registers.
*/
#define FXP_CSR_SCB_RUSCUS 0 /* scb_rus/scb_cus (1 byte) */
#define FXP_CSR_SCB_STATACK 1 /* scb_statack (1 byte) */
#define FXP_CSR_SCB_COMMAND 2 /* scb_command (1 byte) */
#define FXP_CSR_SCB_INTRCNTL 3 /* scb_intrcntl (1 byte) */
#define FXP_CSR_SCB_GENERAL 4 /* scb_general (4 bytes) */
#define FXP_CSR_PORT 8 /* port (4 bytes) */
#define FXP_CSR_FLASHCONTROL 12 /* flash control (2 bytes) */
#define FXP_CSR_EEPROMCONTROL 14 /* eeprom control (2 bytes) */
#define FXP_CSR_MDICONTROL 16 /* mdi control (4 bytes) */
/*
* FOR REFERENCE ONLY, the old definition of FXP_CSR_SCB_RUSCUS:
*
* volatile u_int8_t :2,
* scb_rus:4,
* scb_cus:2;
*/
#define FXP_PORT_SOFTWARE_RESET 0
#define FXP_PORT_SELFTEST 1

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sys/pci/if_fxpvar.h Normal file
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@ -0,0 +1,107 @@
/*
* Copyright (c) 1995, David Greenman
* All rights reserved.
*
* Modifications to support NetBSD:
* Copyright (c) 1997 Jason R. Thorpe. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice unmodified, this list of conditions, and the following
* disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id$
*/
/*
* Misc. defintions for the Intel EtherExpress Pro/100B PCI Fast
* Ethernet driver
*/
struct fxp_softc {
#if defined(__NetBSD__)
struct device sc_dev; /* generic device structures */
void *sc_ih; /* interrupt handler cookie */
bus_space_tag_t sc_st; /* bus space tag */
bus_space_handle_t sc_sh; /* bus space handle */
struct ethercom sc_ethercom; /* ethernet common part */
#else
struct arpcom arpcom; /* per-interface network data */
caddr_t csr; /* control/status registers */
#endif /* __NetBSD__ */
struct ifmedia sc_media; /* media information */
struct fxp_cb_tx *cbl_base; /* base of TxCB list */
struct fxp_cb_tx *cbl_first; /* first active TxCB in list */
struct fxp_cb_tx *cbl_last; /* last active TxCB in list */
struct mbuf *rfa_headm; /* first mbuf in receive frame area */
struct mbuf *rfa_tailm; /* last mbuf in receive frame area */
struct fxp_stats *fxp_stats; /* Pointer to interface stats */
int tx_queued; /* # of active TxCB's */
int promisc_mode; /* promiscuous mode enabled */
int phy_primary_addr; /* address of primary PHY */
int phy_primary_device; /* device type of primary PHY */
int phy_10Mbps_only; /* PHY is 10Mbps-only device */
};
/* Macros to ease CSR access. */
#if defined(__NetBSD__)
#define CSR_READ_1(sc, reg) \
bus_space_read_1((sc)->sc_st, (sc)->sc_sh, (reg))
#define CSR_READ_2(sc, reg) \
bus_space_read_2((sc)->sc_st, (sc)->sc_sh, (reg))
#define CSR_READ_4(sc, reg) \
bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg))
#define CSR_WRITE_1(sc, reg, val) \
bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val))
#define CSR_WRITE_2(sc, reg, val) \
bus_space_write_2((sc)->sc_st, (sc)->sc_sh, (reg), (val))
#define CSR_WRITE_4(sc, reg, val) \
bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))
#else
#define CSR_READ_1(sc, reg) \
(*((u_int8_t *)((sc)->csr + (reg))))
#define CSR_READ_2(sc, reg) \
(*((u_int16_t *)((sc)->csr + (reg))))
#define CSR_READ_4(sc, reg) \
(*((u_int32_t *)((sc)->csr + (reg))))
#define CSR_WRITE_1(sc, reg, val) \
(*((u_int8_t *)((sc)->csr + (reg)))) = (val)
#define CSR_WRITE_2(sc, reg, val) \
(*((u_int16_t *)((sc)->csr + (reg)))) = (val)
#define CSR_WRITE_4(sc, reg, val) \
(*((u_int32_t *)((sc)->csr + (reg)))) = (val)
#endif /* __NetBSD__ */
/* Deal with slight differences in software interfaces. */
#if defined(__NetBSD__)
#define sc_if sc_ethercom.ec_if
#define FXP_FORMAT "%s"
#define FXP_ARGS(sc) (sc)->sc_dev.dv_xname
#define FXP_INTR_TYPE int
#define FXP_IOCTLCMD_TYPE u_long
#define FXP_BPFTAP_ARG(ifp) (ifp)->if_bpf
#else /* __FreeBSD__ */
#define sc_if arpcom.ac_if
#define FXP_FORMAT "fxp%d"
#define FXP_ARGS(sc) (sc)->arpcom.ac_if.if_unit
#define FXP_INTR_TYPE void
#define FXP_IOCTLCMD_TYPE int
#define FXP_BPFTAP_ARG(ifp) ifp
#endif /* __NetBSD__ */