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cxgbe(4): Get the count of FCS errors from the MAC and not MPS for T6 ports.

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The MPS register on the T6 counts something other than FCS errors despite its
name.

MFC after:	3 days
Sponsored by:	Chelsio Communications
This commit is contained in:
Navdeep Parhar 2020-09-14 22:15:54 +00:00
parent 3c41bcdf29
commit bb60ba7e22
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=365732
1 changed files with 27 additions and 1 deletions
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28
sys/dev/cxgbe/common/t4_hw.c
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@ -6853,6 +6853,7 @@ void t4_get_port_stats_offset(struct adapter *adap, int idx,
void t4_get_port_stats(struct adapter *adap, int idx, struct port_stats *p)
{
u32 bgmap = adap2pinfo(adap, idx)->mps_bg_map;
struct link_config *lc = &adap->port[idx]->link_cfg;
u32 stat_ctl = t4_read_reg(adap, A_MPS_STAT_CTL);
#define GET_STAT(name) \
@ -6902,7 +6903,6 @@ void t4_get_port_stats(struct adapter *adap, int idx, struct port_stats *p)
p->rx_ucast_frames = GET_STAT(RX_PORT_UCAST);
p->rx_too_long = GET_STAT(RX_PORT_MTU_ERROR);
p->rx_jabber = GET_STAT(RX_PORT_MTU_CRC_ERROR);
p->rx_fcs_err = GET_STAT(RX_PORT_CRC_ERROR);
p->rx_len_err = GET_STAT(RX_PORT_LEN_ERROR);
p->rx_symbol_err = GET_STAT(RX_PORT_SYM_ERROR);
p->rx_runt = GET_STAT(RX_PORT_LESS_64B);
@ -6922,6 +6922,26 @@ void t4_get_port_stats(struct adapter *adap, int idx, struct port_stats *p)
p->rx_ppp6 = GET_STAT(RX_PORT_PPP6);
p->rx_ppp7 = GET_STAT(RX_PORT_PPP7);
/*
* The T6's MPS's RX_PORT_CRC_ERROR register doesn't actually count CRC
* errors so get that information from the MAC instead. Which MAC is in
* use depends on speed and FEC. The MAC counters clear on reset or
* link state change so we are only reporting errors for this
* incarnation of the link here.
*/
if (chip_id(adap) != CHELSIO_T6)
p->rx_fcs_err = GET_STAT(RX_PORT_CRC_ERROR);
else if (lc->link_ok) {
if (lc->speed > 25000 ||
(lc->speed == 25000 && lc->fec == FEC_RS)) {
p->rx_fcs_err = t4_read_reg64(adap, T5_PORT_REG(idx,
A_MAC_PORT_AFRAMECHECKSEQUENCEERRORS));
} else {
p->rx_fcs_err = t4_read_reg64(adap, T5_PORT_REG(idx,
A_MAC_PORT_MTIP_1G10G_RX_CRCERRORS));
}
}
if (chip_id(adap) >= CHELSIO_T5) {
if (stat_ctl & F_COUNTPAUSESTATRX) {
p->rx_frames -= p->rx_pause;
@ -10757,6 +10777,12 @@ void t4_clr_port_stats(struct adapter *adap, int idx)
t4_write_reg(adap,
A_MPS_STAT_RX_BG_0_MAC_TRUNC_FRAME_L + i * 8, 0);
}
if (chip_id(adap) == CHELSIO_T6) {
t4_write_reg64(adap, T5_PORT_REG(idx,
A_MAC_PORT_AFRAMECHECKSEQUENCEERRORS), 0);
t4_write_reg64(adap, T5_PORT_REG(idx,
A_MAC_PORT_MTIP_1G10G_RX_CRCERRORS), 0);
}
}
/**