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- Change ichsmb(4) to follow the format of all the other smbus controllers

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for slave addressing by using left-adjusted slave addresses (i.e.
  xxxxxxx0b).
- Require the low bit of the slave address to always be zero in smb(4) to
  help catch broken applications.
- Adjust some code in the IPMI driver to not convert the slave address for
  SSIF to a right-adjusted address.  I (or possibly ambrisko@) added this in
  the past to (unknowingly) work around the bug in ichsmb(4).

Submitted by:	 Andriy Gapon <avg of icyb.net.ua> (1,2)
MFC after:	1 month
This commit is contained in:
John Baldwin 2009-02-03 16:14:37 +00:00
parent c96a3b833f
commit bb6bb7fe1b
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=188077
3 changed files with 16 additions and 12 deletions
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20
sys/dev/ichsmb/ichsmb.c
View File

@ -182,7 +182,7 @@ ichsmb_quick(device_t dev, u_char slave, int how)
mtx_lock(&sc->mutex);
sc->ich_cmd = ICH_HST_CNT_SMB_CMD_QUICK;
bus_write_1(sc->io_res, ICH_XMIT_SLVA,
(slave << 1) | (how == SMB_QREAD ?
slave | (how == SMB_QREAD ?
ICH_XMIT_SLVA_READ : ICH_XMIT_SLVA_WRITE));
bus_write_1(sc->io_res, ICH_HST_CNT,
ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
@ -208,7 +208,7 @@ ichsmb_sendb(device_t dev, u_char slave, char byte)
mtx_lock(&sc->mutex);
sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BYTE;
bus_write_1(sc->io_res, ICH_XMIT_SLVA,
(slave << 1) | ICH_XMIT_SLVA_WRITE);
slave | ICH_XMIT_SLVA_WRITE);
bus_write_1(sc->io_res, ICH_HST_CMD, byte);
bus_write_1(sc->io_res, ICH_HST_CNT,
ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
@ -230,7 +230,7 @@ ichsmb_recvb(device_t dev, u_char slave, char *byte)
mtx_lock(&sc->mutex);
sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BYTE;
bus_write_1(sc->io_res, ICH_XMIT_SLVA,
(slave << 1) | ICH_XMIT_SLVA_READ);
slave | ICH_XMIT_SLVA_READ);
bus_write_1(sc->io_res, ICH_HST_CNT,
ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
if ((smb_error = ichsmb_wait(sc)) == SMB_ENOERR)
@ -253,7 +253,7 @@ ichsmb_writeb(device_t dev, u_char slave, char cmd, char byte)
mtx_lock(&sc->mutex);
sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BYTE_DATA;
bus_write_1(sc->io_res, ICH_XMIT_SLVA,
(slave << 1) | ICH_XMIT_SLVA_WRITE);
slave | ICH_XMIT_SLVA_WRITE);
bus_write_1(sc->io_res, ICH_HST_CMD, cmd);
bus_write_1(sc->io_res, ICH_D0, byte);
bus_write_1(sc->io_res, ICH_HST_CNT,
@ -277,7 +277,7 @@ ichsmb_writew(device_t dev, u_char slave, char cmd, short word)
mtx_lock(&sc->mutex);
sc->ich_cmd = ICH_HST_CNT_SMB_CMD_WORD_DATA;
bus_write_1(sc->io_res, ICH_XMIT_SLVA,
(slave << 1) | ICH_XMIT_SLVA_WRITE);
slave | ICH_XMIT_SLVA_WRITE);
bus_write_1(sc->io_res, ICH_HST_CMD, cmd);
bus_write_1(sc->io_res, ICH_D0, word & 0xff);
bus_write_1(sc->io_res, ICH_D1, word >> 8);
@ -301,7 +301,7 @@ ichsmb_readb(device_t dev, u_char slave, char cmd, char *byte)
mtx_lock(&sc->mutex);
sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BYTE_DATA;
bus_write_1(sc->io_res, ICH_XMIT_SLVA,
(slave << 1) | ICH_XMIT_SLVA_READ);
slave | ICH_XMIT_SLVA_READ);
bus_write_1(sc->io_res, ICH_HST_CMD, cmd);
bus_write_1(sc->io_res, ICH_HST_CNT,
ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
@ -324,7 +324,7 @@ ichsmb_readw(device_t dev, u_char slave, char cmd, short *word)
mtx_lock(&sc->mutex);
sc->ich_cmd = ICH_HST_CNT_SMB_CMD_WORD_DATA;
bus_write_1(sc->io_res, ICH_XMIT_SLVA,
(slave << 1) | ICH_XMIT_SLVA_READ);
slave | ICH_XMIT_SLVA_READ);
bus_write_1(sc->io_res, ICH_HST_CMD, cmd);
bus_write_1(sc->io_res, ICH_HST_CNT,
ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
@ -352,7 +352,7 @@ ichsmb_pcall(device_t dev, u_char slave, char cmd, short sdata, short *rdata)
mtx_lock(&sc->mutex);
sc->ich_cmd = ICH_HST_CNT_SMB_CMD_PROC_CALL;
bus_write_1(sc->io_res, ICH_XMIT_SLVA,
(slave << 1) | ICH_XMIT_SLVA_WRITE);
slave | ICH_XMIT_SLVA_WRITE);
bus_write_1(sc->io_res, ICH_HST_CMD, cmd);
bus_write_1(sc->io_res, ICH_D0, sdata & 0xff);
bus_write_1(sc->io_res, ICH_D1, sdata >> 8);
@ -403,7 +403,7 @@ ichsmb_bwrite(device_t dev, u_char slave, char cmd, u_char count, char *buf)
mtx_lock(&sc->mutex);
sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BLOCK;
bus_write_1(sc->io_res, ICH_XMIT_SLVA,
(slave << 1) | ICH_XMIT_SLVA_WRITE);
slave | ICH_XMIT_SLVA_WRITE);
bus_write_1(sc->io_res, ICH_HST_CMD, cmd);
bus_write_1(sc->io_res, ICH_D0, count);
bus_write_1(sc->io_res, ICH_BLOCK_DB, buf[0]);
@ -434,7 +434,7 @@ ichsmb_bread(device_t dev, u_char slave, char cmd, u_char *count, char *buf)
mtx_lock(&sc->mutex);
sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BLOCK;
bus_write_1(sc->io_res, ICH_XMIT_SLVA,
(slave << 1) | ICH_XMIT_SLVA_READ);
slave | ICH_XMIT_SLVA_READ);
bus_write_1(sc->io_res, ICH_HST_CMD, cmd);
bus_write_1(sc->io_res, ICH_D0, *count); /* XXX? */
bus_write_1(sc->io_res, ICH_HST_CNT,

4
sys/dev/ipmi/ipmi_smbios.c
View File

@ -154,10 +154,10 @@ smbios_t38_proc_info(uint8_t *p, char **table, struct ipmi_get_info *info)
case SSIF_MODE:
if ((s->base_address & 0xffffffffffffff00) != 0) {
printf("SMBIOS: Invalid SSIF SMBus address, using BMC I2C slave address instead\n");
info->address = s->i2c_slave_address >> 1;
info->address = s->i2c_slave_address;
break;
}
info->address = IPMI_BAR_ADDR(s->base_address) >> 1;
info->address = IPMI_BAR_ADDR(s->base_address);
break;
default:
return;

4
sys/dev/smbus/smb.c
View File

@ -180,6 +180,10 @@ smbioctl(struct cdev *dev, u_long cmd, caddr_t data, int flags, struct thread *t
parent = device_get_parent(smbdev);
/* Make sure that LSB bit is cleared. */
if (s->slave & 0x1)
return (EINVAL);
/* Allocate the bus. */
if ((error = smbus_request_bus(parent, smbdev,
(flags & O_NONBLOCK) ? SMB_DONTWAIT : (SMB_WAIT | SMB_INTR))))