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ig4: Add PCI IDs for Intel Gemini Lake I2C controller.

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Submitted by:	Dmitry Luhtionov
MFC after:	2 weeks
This commit is contained in:
Vladimir Kondratyev 2021-02-24 01:20:36 +03:00
parent 408edcca07
commit bbacb7ce72
3 changed files with 24 additions and 1 deletions
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6
sys/dev/ichiic/ig4_iic.c
View File

@ -125,6 +125,12 @@ static const struct ig4_hw ig4iic_hw[] = {
.scl_fall_time = 208,
.sda_hold_time = 42,
},
[IG4_GEMINILAKE] = {
.ic_clock_rate = 133,
.sda_fall_time = 171,
.scl_fall_time = 290,
.sda_hold_time = 313,
},
};
static int ig4iic_set_config(ig4iic_softc_t *sc, bool reset);

16
sys/dev/ichiic/ig4_pci.c
View File

@ -136,6 +136,14 @@ static int ig4iic_pci_detach(device_t dev);
#define PCI_CHIP_TIGERLAKE_LP_I2C_5 0xa0e98086
#define PCI_CHIP_TIGERLAKE_LP_I2C_6 0xa0ea8086
#define PCI_CHIP_TIGERLAKE_LP_I2C_7 0xa0eb8086
#define PCI_CHIP_GEMINILAKE_I2C_0 0x31ac8086
#define PCI_CHIP_GEMINILAKE_I2C_1 0x31ae8086
#define PCI_CHIP_GEMINILAKE_I2C_2 0x31b08086
#define PCI_CHIP_GEMINILAKE_I2C_3 0x31b28086
#define PCI_CHIP_GEMINILAKE_I2C_4 0x31b48086
#define PCI_CHIP_GEMINILAKE_I2C_5 0x31b68086
#define PCI_CHIP_GEMINILAKE_I2C_6 0x31b88086
#define PCI_CHIP_GEMINILAKE_I2C_7 0x31ba8086
struct ig4iic_pci_device {
uint32_t devid;
@ -214,6 +222,14 @@ static struct ig4iic_pci_device ig4iic_pci_devices[] = {
{ PCI_CHIP_TIGERLAKE_LP_I2C_5, "Intel Tiger Lake-LP I2C Controller-5", IG4_SKYLAKE},
{ PCI_CHIP_TIGERLAKE_LP_I2C_6, "Intel Tiger Lake-LP I2C Controller-6", IG4_SKYLAKE},
{ PCI_CHIP_TIGERLAKE_LP_I2C_7, "Intel Tiger Lake-LP I2C Controller-7", IG4_SKYLAKE},
{ PCI_CHIP_GEMINILAKE_I2C_0, "Intel Gemini Lake I2C Controller-0", IG4_GEMINILAKE},
{ PCI_CHIP_GEMINILAKE_I2C_1, "Intel Gemini Lake I2C Controller-1", IG4_GEMINILAKE},
{ PCI_CHIP_GEMINILAKE_I2C_2, "Intel Gemini Lake I2C Controller-2", IG4_GEMINILAKE},
{ PCI_CHIP_GEMINILAKE_I2C_3, "Intel Gemini Lake I2C Controller-3", IG4_GEMINILAKE},
{ PCI_CHIP_GEMINILAKE_I2C_4, "Intel Gemini Lake I2C Controller-4", IG4_GEMINILAKE},
{ PCI_CHIP_GEMINILAKE_I2C_5, "Intel Gemini Lake I2C Controller-5", IG4_GEMINILAKE},
{ PCI_CHIP_GEMINILAKE_I2C_6, "Intel Gemini Lake I2C Controller-6", IG4_GEMINILAKE},
{ PCI_CHIP_GEMINILAKE_I2C_7, "Intel Gemini Lake I2C Controller-7", IG4_GEMINILAKE},
};
static int

3
sys/dev/ichiic/ig4_var.h
View File

@ -49,7 +49,8 @@ enum ig4_vers {
IG4_SKYLAKE,
IG4_APL,
IG4_CANNONLAKE,
IG4_TIGERLAKE
IG4_TIGERLAKE,
IG4_GEMINILAKE
};
/* Controller has additional registers */