Add a driver for the AMD AM79c873 10/100 PHY. By some strange coincidence,

this PHY and the Davicom DM9101 have exactly the same register definitions.
One of them is probably a clone of the other. I'm not sure which.

This is needed for the Davicom DM9102 10/100 PCI ethernet driver which
will be committed shortly.
This commit is contained in:
Bill Paul 1999-09-06 05:27:55 +00:00
parent 7114cf8c67
commit bbf7ca2249
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=50983
4 changed files with 431 additions and 1 deletions

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@ -125,6 +125,7 @@ dev/mii/mii.c optional miibus
dev/mii/mii_physubr.c optional miibus
dev/mii/ukphy.c optional miibus
dev/mii/ukphy_subr.c optional miibus
dev/mii/amphy.c optional miibus
dev/mii/exphy.c optional miibus
dev/mii/mlphy.c optional miibus
dev/mii/nsphy.c optional miibus
@ -634,6 +635,7 @@ pci/if_pn.c optional pn
pci/if_fpa.c optional fpa pci
pci/if_rl.c optional rl
pci/if_sf.c optional sf
pci/if_sis.c optional sis
pci/if_sk.c optional sk
pci/if_ste.c optional ste
pci/if_sr_p.c optional sr pci

344
sys/dev/mii/amphy.c Normal file
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@ -0,0 +1,344 @@
/*
* Copyright (c) 1997, 1998, 1999
* Bill Paul <wpaul@ee.columbia.edu>. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Bill Paul.
* 4. Neither the name of the author nor the names of any co-contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*
* $FreeBSD$
*/
/*
* driver for AMD AM79c873 PHYs
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <sys/malloc.h>
#include <sys/socket.h>
#include <sys/bus.h>
#include <net/if.h>
#include <net/if_media.h>
#include <dev/mii/mii.h>
#include <dev/mii/miivar.h>
#include <dev/mii/miidevs.h>
#include <dev/mii/amphyreg.h>
#include "miibus_if.h"
#if !defined(lint)
static const char rcsid[] =
"$FreeBSD$";
#endif
static int amphy_probe __P((device_t));
static int amphy_attach __P((device_t));
static int amphy_detach __P((device_t));
static device_method_t amphy_methods[] = {
/* device interface */
DEVMETHOD(device_probe, amphy_probe),
DEVMETHOD(device_attach, amphy_attach),
DEVMETHOD(device_detach, amphy_detach),
DEVMETHOD(device_shutdown, bus_generic_shutdown),
{ 0, 0 }
};
static devclass_t amphy_devclass;
static driver_t amphy_driver = {
"amphy",
amphy_methods,
sizeof(struct mii_softc)
};
DRIVER_MODULE(amphy, miibus, amphy_driver, amphy_devclass, 0, 0);
int amphy_service __P((struct mii_softc *, struct mii_data *, int));
void amphy_status __P((struct mii_softc *));
static int amphy_probe(dev)
device_t dev;
{
struct mii_attach_args *ma;
ma = device_get_ivars(dev);
if (MII_OUI(ma->mii_id1, ma->mii_id2) != MII_OUI_xxAMD ||
MII_MODEL(ma->mii_id2) != MII_MODEL_xxAMD_79C873)
return(ENXIO);
device_set_desc(dev, MII_STR_xxAMD_79C873);
return(0);
}
static int amphy_attach(dev)
device_t dev;
{
struct mii_softc *sc;
struct mii_attach_args *ma;
struct mii_data *mii;
sc = device_get_softc(dev);
ma = device_get_ivars(dev);
sc->mii_dev = device_get_parent(dev);
mii = device_get_softc(sc->mii_dev);
LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
sc->mii_inst = mii->mii_instance;
sc->mii_phy = ma->mii_phyno;
sc->mii_service = amphy_service;
sc->mii_pdata = mii;
sc->mii_flags |= MIIF_NOISOLATE;
mii->mii_instance++;
#define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL)
ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst),
BMCR_ISO);
#if 0
ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP, sc->mii_inst),
BMCR_LOOP|BMCR_S100);
#endif
mii_phy_reset(sc);
sc->mii_capabilities =
PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
device_printf(dev, " ");
if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0)
printf("no media present");
else
mii_add_media(mii, sc->mii_capabilities,
sc->mii_inst);
printf("\n");
#undef ADD
MIIBUS_MEDIAINIT(sc->mii_dev);
return(0);
}
static int amphy_detach(dev)
device_t dev;
{
struct mii_softc *sc;
struct mii_data *mii;
sc = device_get_softc(dev);
mii = device_get_softc(device_get_parent(dev));
sc->mii_dev = NULL;
LIST_REMOVE(sc, mii_list);
return(0);
}
int
amphy_service(sc, mii, cmd)
struct mii_softc *sc;
struct mii_data *mii;
int cmd;
{
struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
int reg;
switch (cmd) {
case MII_POLLSTAT:
/*
* If we're not polling our PHY instance, just return.
*/
if (IFM_INST(ife->ifm_media) != sc->mii_inst)
return (0);
break;
case MII_MEDIACHG:
/*
* If the media indicates a different PHY instance,
* isolate ourselves.
*/
if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
reg = PHY_READ(sc, MII_BMCR);
PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
return (0);
}
/*
* If the interface is not up, don't do anything.
*/
if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
break;
switch (IFM_SUBTYPE(ife->ifm_media)) {
case IFM_AUTO:
/*
* If we're already in auto mode, just return.
*/
if (PHY_READ(sc, MII_BMCR) & BMCR_AUTOEN)
return (0);
(void) mii_phy_auto(sc, 1);
break;
case IFM_100_T4:
/*
* XXX Not supported as a manual setting right now.
*/
return (EINVAL);
default:
/*
* BMCR data is stored in the ifmedia entry.
*/
PHY_WRITE(sc, MII_ANAR,
mii_anar(ife->ifm_media));
PHY_WRITE(sc, MII_BMCR, ife->ifm_data);
}
break;
case MII_TICK:
/*
* If we're not currently selected, just return.
*/
if (IFM_INST(ife->ifm_media) != sc->mii_inst)
return (0);
/*
* Only used for autonegotiation.
*/
if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
return (0);
/*
* Is the interface even up?
*/
if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
return (0);
/*
* Only retry autonegotiation every 5 seconds.
*/
if (++sc->mii_ticks != 5)
return (0);
sc->mii_ticks = 0;
/*
* Check to see if we have link. If we do, we don't
* need to restart the autonegotiation process. Read
* the BMSR twice in case it's latched.
*/
reg = PHY_READ(sc, MII_BMSR) |
PHY_READ(sc, MII_BMSR);
if (reg & BMSR_LINK)
break;
mii_phy_reset(sc);
if (mii_phy_auto(sc, 0) == EJUSTRETURN)
return(0);
break;
}
/* Update the media status. */
amphy_status(sc);
/* Callback if something changed. */
if (sc->mii_active != mii->mii_media_active || cmd == MII_MEDIACHG) {
MIIBUS_STATCHG(sc->mii_dev);
sc->mii_active = mii->mii_media_active;
}
return (0);
}
void
amphy_status(sc)
struct mii_softc *sc;
{
struct mii_data *mii = sc->mii_pdata;
int bmsr, bmcr, par, anlpar;
mii->mii_media_status = IFM_AVALID;
mii->mii_media_active = IFM_ETHER;
bmsr = PHY_READ(sc, MII_BMSR) |
PHY_READ(sc, MII_BMSR);
if (bmsr & BMSR_LINK)
mii->mii_media_status |= IFM_ACTIVE;
bmcr = PHY_READ(sc, MII_BMCR);
if (bmcr & BMCR_ISO) {
mii->mii_media_active |= IFM_NONE;
mii->mii_media_status = 0;
return;
}
if (bmcr & BMCR_LOOP)
mii->mii_media_active |= IFM_LOOP;
if (bmcr & BMCR_AUTOEN) {
/*
* The PAR status bits are only valid of autonegotiation
* has completed (or it's disabled).
*/
if ((bmsr & BMSR_ACOMP) == 0) {
/* Erg, still trying, I guess... */
mii->mii_media_active |= IFM_NONE;
return;
}
if (PHY_READ(sc, MII_ANER) & ANER_LPAN) {
anlpar = PHY_READ(sc, MII_ANAR) &
PHY_READ(sc, MII_ANLPAR);
if (anlpar & ANLPAR_T4)
mii->mii_media_active |= IFM_100_T4;
else if (anlpar & ANLPAR_TX_FD)
mii->mii_media_active |= IFM_100_TX|IFM_FDX;
else if (anlpar & ANLPAR_TX)
mii->mii_media_active |= IFM_100_TX;
else if (anlpar & ANLPAR_10_FD)
mii->mii_media_active |= IFM_10_T|IFM_FDX;
else if (anlpar & ANLPAR_10)
mii->mii_media_active |= IFM_10_T;
else
mii->mii_media_active |= IFM_NONE;
return;
}
/*
* Link partner is not capable of autonegotiation.
*/
par = PHY_READ(sc, MII_AMPHY_DSCSR);
if (par & DSCSR_100FDX)
mii->mii_media_active |= IFM_100_TX|IFM_FDX;
else if (par & DSCSR_100HDX)
mii->mii_media_active |= IFM_100_TX;
else if (par & DSCSR_10FDX)
mii->mii_media_active |= IFM_10_T|IFM_HDX;
else if (par & DSCSR_10HDX)
mii->mii_media_active |= IFM_10_T;
} else
mii->mii_media_active = mii_media_from_bmcr(bmcr);
}

84
sys/dev/mii/amphyreg.h Normal file
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@ -0,0 +1,84 @@
/*
* Copyright (c) 1997, 1998, 1999
* Bill Paul <wpaul@ee.columbia.edu>. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Bill Paul.
* 4. Neither the name of the author nor the names of any co-contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*
* $FreeBSD$
*/
#ifndef _DEV_MII_AMTPHYREG_H_
#define _DEV_MII_AMTPHYREG_H_
/*
* AMD Am79C873 registers.
*/
#define MII_AMPHY_DSCR 0x10 /* Specified configuration register */a
#define DSCR_BP4B5B 0x8000 /* Bypass 4B5B encoding */
#define DSCR_BPSCR 0x4000 /* Bypass scrambler */
#define DSCR_BPALIGN 0x2000 /* Bypass symbol alignment */
#define DSCR_REPEATER 0x0800 /* Repeater mode */
#define DSCR_TX 0x0400 /* TX/FX mode control */
#define DSCR_UTP 0x0200 /* UTP/STP mode control */
#define DSCR_CLK25MDIS 0x0100 /* CLK25M disable */
#define DSCR_FGLNKTX 0x0080 /* Force good link at 100baseTX */
#define DSCR_LINKLEDCTL 0x0020 /* Link LED control */
#define DSCR_FDXLEDCTL 0x0010 /* FDX LED control */
#define DSCR_SMRTS 0x0008 /* Reset state machine */
#define DSCR_MFPSC 0x0004 /* Preamble surpression control */
#define DSCR_SLEEP 0x0002 /* Sleep mode */
#define DSCR_RLOUT 0x0001 /* Remote loopout control */
#define MII_AMPHY_DSCSR 0x11 /* Specified configuration and status */
#define DSCSR_100FDX 0x8000 /* 100MBps full duplex */
#define DSCSR_100HDX 0x4000 /* 100Mbps half duplex */
#define DSCSR_10FDX 0x2000 /* 10Mbps full duplex */
#define DSCSR_10HDX 0x1000 /* 10Mbps half duplex */
#define DSCSR_PADDR 0x01F0 /* PHY address */
#define DSCSR_ASTAT 0x000F /* Autonegotiation status */
#define ASTAT_COMPLETE 0x8
#define ASTAT_PDLINK_READY_FAIL 0x7
#define ASTAT_PDLINK_READY 0x6
#define ASTAT_CONSTMATCH_FAIL 0x5
#define ASTAT_CONSTMATCH 0x4
#define ASTAT_ACKMATCH_FAIL 0x3
#define ASTAT_ACKMATCH 0x2
#define ASTAT_ABILITYMATCH 0x1
#define ASTAT_IDLE 0x0
#define MII_AMPHY_T10CSRSCR 0x12 /* 10baseT configuration/status */
#define T10CSRSCR_LPEN 0x4000 /* Link pulse enable */
#define T10CSRSCR_HBE 0x2000 /* Heartbeat enable */
#define T10CSRSCR_JABEN 0x0800 /* Jabber enable */
#define T10CSRSCR_SER 0x0400 /* Serial mode enable */
#define T10CSRSCR_POLR 0x0001 /* Polarity reversed */
#endif /* _DEV_MII_AMTPHYREG_H_ */

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@ -5,7 +5,7 @@ S = ${.CURDIR}/../..
KMOD = mii
SRCS = mii.c mii_physubr.c ukphy.c ukphy_subr.c bus_if.h
SRCS += miibus_if.h device_if.h miibus_if.c exphy.c nsphy.c
SRCS += mlphy.c tlphy.c rlphy.c
SRCS += mlphy.c tlphy.c rlphy.c amphy.c
CLEANFILES += device_if.h bus_if.h miibus_if.h miibus_if.c
CFLAGS += ${DEBUG_FLAGS}