Add a driver for the AMD AM79c873 10/100 PHY. By some strange coincidence,
this PHY and the Davicom DM9101 have exactly the same register definitions. One of them is probably a clone of the other. I'm not sure which. This is needed for the Davicom DM9102 10/100 PCI ethernet driver which will be committed shortly.
This commit is contained in:
parent
7114cf8c67
commit
bbf7ca2249
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=50983
@ -125,6 +125,7 @@ dev/mii/mii.c optional miibus
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dev/mii/mii_physubr.c optional miibus
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dev/mii/ukphy.c optional miibus
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dev/mii/ukphy_subr.c optional miibus
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dev/mii/amphy.c optional miibus
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dev/mii/exphy.c optional miibus
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dev/mii/mlphy.c optional miibus
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dev/mii/nsphy.c optional miibus
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@ -634,6 +635,7 @@ pci/if_pn.c optional pn
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pci/if_fpa.c optional fpa pci
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pci/if_rl.c optional rl
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pci/if_sf.c optional sf
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pci/if_sis.c optional sis
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pci/if_sk.c optional sk
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pci/if_ste.c optional ste
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pci/if_sr_p.c optional sr pci
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344
sys/dev/mii/amphy.c
Normal file
344
sys/dev/mii/amphy.c
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@ -0,0 +1,344 @@
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/*
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* Copyright (c) 1997, 1998, 1999
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* Bill Paul <wpaul@ee.columbia.edu>. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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||||
* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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||||
* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Bill Paul.
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* 4. Neither the name of the author nor the names of any co-contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/*
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* driver for AMD AM79c873 PHYs
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/socket.h>
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#include <sys/bus.h>
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#include <net/if.h>
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#include <net/if_media.h>
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#include <dev/mii/mii.h>
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#include <dev/mii/miivar.h>
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#include <dev/mii/miidevs.h>
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#include <dev/mii/amphyreg.h>
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#include "miibus_if.h"
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#if !defined(lint)
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static const char rcsid[] =
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"$FreeBSD$";
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#endif
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static int amphy_probe __P((device_t));
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static int amphy_attach __P((device_t));
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static int amphy_detach __P((device_t));
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static device_method_t amphy_methods[] = {
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/* device interface */
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DEVMETHOD(device_probe, amphy_probe),
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DEVMETHOD(device_attach, amphy_attach),
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DEVMETHOD(device_detach, amphy_detach),
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DEVMETHOD(device_shutdown, bus_generic_shutdown),
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{ 0, 0 }
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};
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static devclass_t amphy_devclass;
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static driver_t amphy_driver = {
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"amphy",
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amphy_methods,
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sizeof(struct mii_softc)
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};
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DRIVER_MODULE(amphy, miibus, amphy_driver, amphy_devclass, 0, 0);
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int amphy_service __P((struct mii_softc *, struct mii_data *, int));
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void amphy_status __P((struct mii_softc *));
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static int amphy_probe(dev)
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device_t dev;
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{
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struct mii_attach_args *ma;
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ma = device_get_ivars(dev);
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if (MII_OUI(ma->mii_id1, ma->mii_id2) != MII_OUI_xxAMD ||
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MII_MODEL(ma->mii_id2) != MII_MODEL_xxAMD_79C873)
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return(ENXIO);
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device_set_desc(dev, MII_STR_xxAMD_79C873);
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return(0);
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}
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static int amphy_attach(dev)
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device_t dev;
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{
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struct mii_softc *sc;
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struct mii_attach_args *ma;
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struct mii_data *mii;
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sc = device_get_softc(dev);
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ma = device_get_ivars(dev);
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sc->mii_dev = device_get_parent(dev);
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mii = device_get_softc(sc->mii_dev);
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LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
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sc->mii_inst = mii->mii_instance;
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sc->mii_phy = ma->mii_phyno;
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sc->mii_service = amphy_service;
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sc->mii_pdata = mii;
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sc->mii_flags |= MIIF_NOISOLATE;
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mii->mii_instance++;
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#define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL)
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ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst),
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BMCR_ISO);
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#if 0
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ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP, sc->mii_inst),
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BMCR_LOOP|BMCR_S100);
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#endif
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mii_phy_reset(sc);
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sc->mii_capabilities =
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PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
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device_printf(dev, " ");
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if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0)
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printf("no media present");
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else
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mii_add_media(mii, sc->mii_capabilities,
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sc->mii_inst);
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printf("\n");
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#undef ADD
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MIIBUS_MEDIAINIT(sc->mii_dev);
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return(0);
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}
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static int amphy_detach(dev)
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device_t dev;
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{
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struct mii_softc *sc;
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struct mii_data *mii;
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sc = device_get_softc(dev);
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mii = device_get_softc(device_get_parent(dev));
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sc->mii_dev = NULL;
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LIST_REMOVE(sc, mii_list);
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return(0);
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}
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int
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amphy_service(sc, mii, cmd)
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struct mii_softc *sc;
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struct mii_data *mii;
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int cmd;
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{
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struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
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int reg;
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switch (cmd) {
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case MII_POLLSTAT:
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/*
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* If we're not polling our PHY instance, just return.
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*/
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if (IFM_INST(ife->ifm_media) != sc->mii_inst)
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return (0);
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break;
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case MII_MEDIACHG:
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/*
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* If the media indicates a different PHY instance,
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* isolate ourselves.
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*/
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if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
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reg = PHY_READ(sc, MII_BMCR);
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PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
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return (0);
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}
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/*
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* If the interface is not up, don't do anything.
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*/
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if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
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break;
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switch (IFM_SUBTYPE(ife->ifm_media)) {
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case IFM_AUTO:
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/*
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* If we're already in auto mode, just return.
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*/
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if (PHY_READ(sc, MII_BMCR) & BMCR_AUTOEN)
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return (0);
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(void) mii_phy_auto(sc, 1);
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break;
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case IFM_100_T4:
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/*
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* XXX Not supported as a manual setting right now.
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*/
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return (EINVAL);
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default:
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/*
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* BMCR data is stored in the ifmedia entry.
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*/
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PHY_WRITE(sc, MII_ANAR,
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mii_anar(ife->ifm_media));
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PHY_WRITE(sc, MII_BMCR, ife->ifm_data);
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}
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break;
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case MII_TICK:
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/*
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* If we're not currently selected, just return.
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*/
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if (IFM_INST(ife->ifm_media) != sc->mii_inst)
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return (0);
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/*
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* Only used for autonegotiation.
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*/
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if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
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return (0);
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/*
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* Is the interface even up?
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*/
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if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
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return (0);
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/*
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* Only retry autonegotiation every 5 seconds.
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*/
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if (++sc->mii_ticks != 5)
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return (0);
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sc->mii_ticks = 0;
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/*
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* Check to see if we have link. If we do, we don't
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* need to restart the autonegotiation process. Read
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* the BMSR twice in case it's latched.
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*/
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reg = PHY_READ(sc, MII_BMSR) |
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PHY_READ(sc, MII_BMSR);
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if (reg & BMSR_LINK)
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break;
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mii_phy_reset(sc);
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if (mii_phy_auto(sc, 0) == EJUSTRETURN)
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return(0);
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break;
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}
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/* Update the media status. */
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amphy_status(sc);
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/* Callback if something changed. */
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if (sc->mii_active != mii->mii_media_active || cmd == MII_MEDIACHG) {
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MIIBUS_STATCHG(sc->mii_dev);
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sc->mii_active = mii->mii_media_active;
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}
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return (0);
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}
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void
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amphy_status(sc)
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struct mii_softc *sc;
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{
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struct mii_data *mii = sc->mii_pdata;
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int bmsr, bmcr, par, anlpar;
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mii->mii_media_status = IFM_AVALID;
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mii->mii_media_active = IFM_ETHER;
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bmsr = PHY_READ(sc, MII_BMSR) |
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PHY_READ(sc, MII_BMSR);
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if (bmsr & BMSR_LINK)
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mii->mii_media_status |= IFM_ACTIVE;
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bmcr = PHY_READ(sc, MII_BMCR);
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if (bmcr & BMCR_ISO) {
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mii->mii_media_active |= IFM_NONE;
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mii->mii_media_status = 0;
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return;
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}
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if (bmcr & BMCR_LOOP)
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mii->mii_media_active |= IFM_LOOP;
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if (bmcr & BMCR_AUTOEN) {
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/*
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* The PAR status bits are only valid of autonegotiation
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* has completed (or it's disabled).
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*/
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if ((bmsr & BMSR_ACOMP) == 0) {
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/* Erg, still trying, I guess... */
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mii->mii_media_active |= IFM_NONE;
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return;
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}
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if (PHY_READ(sc, MII_ANER) & ANER_LPAN) {
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anlpar = PHY_READ(sc, MII_ANAR) &
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PHY_READ(sc, MII_ANLPAR);
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if (anlpar & ANLPAR_T4)
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mii->mii_media_active |= IFM_100_T4;
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else if (anlpar & ANLPAR_TX_FD)
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mii->mii_media_active |= IFM_100_TX|IFM_FDX;
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else if (anlpar & ANLPAR_TX)
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mii->mii_media_active |= IFM_100_TX;
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else if (anlpar & ANLPAR_10_FD)
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mii->mii_media_active |= IFM_10_T|IFM_FDX;
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else if (anlpar & ANLPAR_10)
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mii->mii_media_active |= IFM_10_T;
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else
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mii->mii_media_active |= IFM_NONE;
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return;
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}
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/*
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* Link partner is not capable of autonegotiation.
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*/
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par = PHY_READ(sc, MII_AMPHY_DSCSR);
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if (par & DSCSR_100FDX)
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mii->mii_media_active |= IFM_100_TX|IFM_FDX;
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else if (par & DSCSR_100HDX)
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mii->mii_media_active |= IFM_100_TX;
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else if (par & DSCSR_10FDX)
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mii->mii_media_active |= IFM_10_T|IFM_HDX;
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else if (par & DSCSR_10HDX)
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mii->mii_media_active |= IFM_10_T;
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} else
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mii->mii_media_active = mii_media_from_bmcr(bmcr);
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}
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84
sys/dev/mii/amphyreg.h
Normal file
84
sys/dev/mii/amphyreg.h
Normal file
@ -0,0 +1,84 @@
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/*
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* Copyright (c) 1997, 1998, 1999
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* Bill Paul <wpaul@ee.columbia.edu>. All rights reserved.
|
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*
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* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. All advertising materials mentioning features or use of this software
|
||||
* must display the following acknowledgement:
|
||||
* This product includes software developed by Bill Paul.
|
||||
* 4. Neither the name of the author nor the names of any co-contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
|
||||
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
|
||||
* THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
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* $FreeBSD$
|
||||
*/
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#ifndef _DEV_MII_AMTPHYREG_H_
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#define _DEV_MII_AMTPHYREG_H_
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/*
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* AMD Am79C873 registers.
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*/
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#define MII_AMPHY_DSCR 0x10 /* Specified configuration register */a
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#define DSCR_BP4B5B 0x8000 /* Bypass 4B5B encoding */
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#define DSCR_BPSCR 0x4000 /* Bypass scrambler */
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#define DSCR_BPALIGN 0x2000 /* Bypass symbol alignment */
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#define DSCR_REPEATER 0x0800 /* Repeater mode */
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#define DSCR_TX 0x0400 /* TX/FX mode control */
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#define DSCR_UTP 0x0200 /* UTP/STP mode control */
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#define DSCR_CLK25MDIS 0x0100 /* CLK25M disable */
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#define DSCR_FGLNKTX 0x0080 /* Force good link at 100baseTX */
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#define DSCR_LINKLEDCTL 0x0020 /* Link LED control */
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#define DSCR_FDXLEDCTL 0x0010 /* FDX LED control */
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#define DSCR_SMRTS 0x0008 /* Reset state machine */
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#define DSCR_MFPSC 0x0004 /* Preamble surpression control */
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#define DSCR_SLEEP 0x0002 /* Sleep mode */
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#define DSCR_RLOUT 0x0001 /* Remote loopout control */
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#define MII_AMPHY_DSCSR 0x11 /* Specified configuration and status */
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#define DSCSR_100FDX 0x8000 /* 100MBps full duplex */
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#define DSCSR_100HDX 0x4000 /* 100Mbps half duplex */
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#define DSCSR_10FDX 0x2000 /* 10Mbps full duplex */
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#define DSCSR_10HDX 0x1000 /* 10Mbps half duplex */
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#define DSCSR_PADDR 0x01F0 /* PHY address */
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#define DSCSR_ASTAT 0x000F /* Autonegotiation status */
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#define ASTAT_COMPLETE 0x8
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#define ASTAT_PDLINK_READY_FAIL 0x7
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#define ASTAT_PDLINK_READY 0x6
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#define ASTAT_CONSTMATCH_FAIL 0x5
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#define ASTAT_CONSTMATCH 0x4
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#define ASTAT_ACKMATCH_FAIL 0x3
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#define ASTAT_ACKMATCH 0x2
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#define ASTAT_ABILITYMATCH 0x1
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#define ASTAT_IDLE 0x0
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#define MII_AMPHY_T10CSRSCR 0x12 /* 10baseT configuration/status */
|
||||
#define T10CSRSCR_LPEN 0x4000 /* Link pulse enable */
|
||||
#define T10CSRSCR_HBE 0x2000 /* Heartbeat enable */
|
||||
#define T10CSRSCR_JABEN 0x0800 /* Jabber enable */
|
||||
#define T10CSRSCR_SER 0x0400 /* Serial mode enable */
|
||||
#define T10CSRSCR_POLR 0x0001 /* Polarity reversed */
|
||||
|
||||
#endif /* _DEV_MII_AMTPHYREG_H_ */
|
@ -5,7 +5,7 @@ S = ${.CURDIR}/../..
|
||||
KMOD = mii
|
||||
SRCS = mii.c mii_physubr.c ukphy.c ukphy_subr.c bus_if.h
|
||||
SRCS += miibus_if.h device_if.h miibus_if.c exphy.c nsphy.c
|
||||
SRCS += mlphy.c tlphy.c rlphy.c
|
||||
SRCS += mlphy.c tlphy.c rlphy.c amphy.c
|
||||
CLEANFILES += device_if.h bus_if.h miibus_if.h miibus_if.c
|
||||
CFLAGS += ${DEBUG_FLAGS}
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user