Expose breakpoint() to userland from <machine/cpufunc.h> on MIPS.
Enable ptrace() tests using breakpoint on MIPS as well. Tested on: mips64 MFC after: 1 month
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bd061c3998
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=332907
@ -108,6 +108,12 @@ mips_wbflush(void)
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#endif
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}
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static __inline void
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breakpoint(void)
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{
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__asm __volatile ("break");
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}
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#ifdef _KERNEL
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/*
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* XXX
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@ -365,12 +371,6 @@ get_intr_mask(void)
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return (mips_rd_status() & MIPS_SR_INT_MASK);
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}
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static __inline void
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breakpoint(void)
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{
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__asm __volatile ("break");
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}
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#if defined(__GNUC__) && !defined(__mips_o32)
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#define mips3_ld(a) (*(const volatile uint64_t *)(a))
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#define mips3_sd(a, v) (*(volatile uint64_t *)(a) = (v))
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@ -54,7 +54,8 @@ __FBSDID("$FreeBSD$");
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/*
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* Architectures with a user-visible breakpoint().
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*/
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#if defined(__amd64__) || defined(__i386__) || defined(__sparc64__)
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#if defined(__amd64__) || defined(__i386__) || defined(__mips__) || \
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defined(__sparc64__)
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#define HAVE_BREAKPOINT
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#endif
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@ -64,6 +65,8 @@ __FBSDID("$FreeBSD$");
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#ifdef HAVE_BREAKPOINT
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#if defined(__amd64__) || defined(__i386__)
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#define SKIP_BREAK(reg)
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#elif defined(__mips__)
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#define SKIP_BREAK(reg) ((reg)->r_regs[PC] += 4)
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#elif defined(__sparc64__)
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#define SKIP_BREAK(reg) do { \
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(reg)->r_tpc = (reg)->r_tnpc + 4; \
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