Code for dealing with external interrupts.
Obtained from: NetBSD
This commit is contained in:
Benno Rice
parent
aa623ed281
commit
bda034cf8f
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=78883
832
sys/powerpc/powerpc/extintr.c
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832
sys/powerpc/powerpc/extintr.c
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@ -0,0 +1,832 @@
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/*-
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* Copyright (c) 1995 Per Fogelstrom
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* Copyright (c) 1993, 1994 Charles M. Hannum.
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* Copyright (c) 1990 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* William Jolitz and Don Ahn.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $NetBSD: extintr.c,v 1.12 2000/02/14 12:45:52 tsubai Exp $
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* @(#)isa.c 7.2 (Berkeley) 5/12/91
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*/
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#ifndef lint
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static const char rcsid[] =
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"$FreeBSD$";
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#endif /* not lint */
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/mutex.h>
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#include <sys/interrupt.h>
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#include <sys/malloc.h>
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#include <sys/kernel.h>
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#include <vm/vm.h>
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#include <vm/vm_kern.h>
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#include <machine/autoconf.h>
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#include <machine/intr.h>
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#include <machine/psl.h>
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#include <machine/pio.h>
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#include <machine/openpicreg.h>
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#include <dev/ofw/openfirm.h>
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#define NIRQ 32
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#define HWIRQ_MAX (NIRQ - 4 - 1)
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#define HWIRQ_MASK 0x0fffffff
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void intr_calculatemasks __P((void));
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char *intr_typename __P((int));
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int fakeintr __P((void *));
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static __inline int cntlzw __P((int));
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static __inline int read_irq __P((void));
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static __inline int mapirq __P((int));
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static void enable_irq __P((int));
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static __inline u_int openpic_read __P((int));
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static __inline void openpic_write __P((int, u_int));
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void openpic_enable_irq __P((int));
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void openpic_disable_irq __P((int));
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void openpic_set_priority __P((int, int));
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static __inline int openpic_read_irq __P((int));
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static __inline void openpic_eoi __P((int));
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unsigned int imen = 0xffffffff;
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u_int cpl, ipending, tickspending;
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int astpending;
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int imask[NIPL];
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int intrtype[NIRQ], intrmask[NIRQ], intrlevel[NIRQ];
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struct intrhand *intrhand[NIRQ];
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static u_char hwirq[NIRQ], virq[ICU_LEN];
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static int virq_max = 0;
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static u_char *obio_base, *openpic_base;
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#if 0 /* XXX */
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extern u_int *heathrow_FCR;
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#endif
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extern void install_extint(void (*)(void));
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#define interrupt_reg (obio_base + 0x10)
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#define INT_STATE_REG_H (interrupt_reg + 0x00)
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#define INT_ENABLE_REG_H (interrupt_reg + 0x04)
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#define INT_CLEAR_REG_H (interrupt_reg + 0x08)
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#define INT_LEVEL_REG_H (interrupt_reg + 0x0c)
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#define INT_STATE_REG_L (interrupt_reg + 0x10)
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#define INT_ENABLE_REG_L (interrupt_reg + 0x14)
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#define INT_CLEAR_REG_L (interrupt_reg + 0x18)
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#define INT_LEVEL_REG_L (interrupt_reg + 0x1c)
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#define have_openpic (openpic_base != NULL)
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/*
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* Map 64 irqs into 32 (bits).
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*/
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int
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mapirq(irq)
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int irq;
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{
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int v;
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if (irq < 0 || irq >= ICU_LEN)
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panic("invalid irq");
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if (virq[irq])
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return virq[irq];
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virq_max++;
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v = virq_max;
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if (v > HWIRQ_MAX)
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panic("virq overflow");
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hwirq[v] = irq;
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virq[irq] = v;
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return v;
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}
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/*
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* Count leading zeros.
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*/
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static __inline int
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cntlzw(x)
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int x;
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{
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int a;
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__asm __volatile ("cntlzw %0,%1" : "=r"(a) : "r"(x));
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return a;
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}
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int
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read_irq()
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{
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int rv, lo, hi, p;
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rv = 0;
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lo = in32rb(INT_STATE_REG_L);
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if (lo)
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out32rb(INT_CLEAR_REG_L, lo);
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while (lo) {
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p = 31 - cntlzw(lo);
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rv |= 1 << virq[p];
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lo &= ~(1 << p);
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}
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#if 0 /* XXX */
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if (heathrow_FCR) /* has heathrow? */
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hi = in32rb(INT_STATE_REG_H);
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else
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#endif
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hi = 0;
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if (hi)
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out32rb(INT_CLEAR_REG_H, hi);
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while (hi) {
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p = 31 - cntlzw(hi);
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rv |= 1 << virq[p + 32];
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hi &= ~(1 << p);
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}
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/* 1 << 0 is invalid. */
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return rv & ~1;
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}
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void
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enable_irq(x)
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int x;
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{
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int lo, hi, v, irq;
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x &= HWIRQ_MASK; /* XXX Higher bits are software interrupts. */
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lo = hi = 0;
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while (x) {
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v = 31 - cntlzw(x);
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irq = hwirq[v];
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if (irq < 32)
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lo |= 1 << irq;
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else
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hi |= 1 << (irq - 32);
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x &= ~(1 << v);
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}
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out32rb(INT_ENABLE_REG_L, lo);
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#if 0 /* XXX */
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if (heathrow_FCR)
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out32rb(INT_ENABLE_REG_H, hi);
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#endif
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}
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u_int
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openpic_read(reg)
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int reg;
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{
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char *addr
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addr = openpic_base + reg;
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return in32rb(addr);
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}
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void
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openpic_write(reg, val)
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int reg;
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u_int val;
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{
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char *addr
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addr = openpic_base + reg;
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out32rb(addr, val);
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}
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void
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openpic_enable_irq(irq)
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int irq;
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{
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u_int x;
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x = openpic_read(OPENPIC_SRC_VECTOR(irq));
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x &= ~OPENPIC_IMASK;
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openpic_write(OPENPIC_SRC_VECTOR(irq), x);
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}
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void
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openpic_disable_irq(irq)
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int irq;
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{
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u_int x;
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x = openpic_read(OPENPIC_SRC_VECTOR(irq));
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x |= OPENPIC_IMASK;
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openpic_write(OPENPIC_SRC_VECTOR(irq), x);
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}
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void
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openpic_set_priority(cpu, pri)
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int cpu, pri;
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{
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u_int x;
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x = openpic_read(OPENPIC_CPU_PRIORITY(cpu));
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x &= ~OPENPIC_CPU_PRIORITY_MASK;
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x |= pri;
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openpic_write(OPENPIC_CPU_PRIORITY(cpu), x);
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}
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int
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openpic_read_irq(cpu)
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int cpu;
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{
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return openpic_read(OPENPIC_IACK(cpu)) & OPENPIC_VECTOR_MASK;
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}
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void
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openpic_eoi(cpu)
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int cpu;
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{
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openpic_write(OPENPIC_EOI(cpu), 0);
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openpic_read(OPENPIC_EOI(cpu));
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}
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/*
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* Recalculate the interrupt masks from scratch.
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* We could code special registry and deregistry versions of this function that
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* would be faster, but the code would be nastier, and we don't expect this to
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* happen very much anyway.
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*/
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void
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intr_calculatemasks()
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{
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int irq, level, irqs;
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struct intrhand *q;
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irqs = 0;
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/* First, figure out which levels each IRQ uses. */
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#if 0 /* XXX */
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for (irq = 0; irq < NIRQ; irq++) {
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register int levels = 0;
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for (q = intrhand[irq]; q; q = q->ih_next)
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levels |= 1 << q->ih_level;
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intrlevel[irq] = levels;
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}
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#endif
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/* Then figure out which IRQs use each level. */
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for (level = 0; level < NIPL; level++) {
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register int irqs = 0;
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for (irq = 0; irq < NIRQ; irq++)
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if (intrlevel[irq] & (1 << level))
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irqs |= 1 << irq;
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imask[level] = irqs;
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}
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/*
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* IPL_CLOCK should mask clock interrupt even if interrupt handler
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* is not registered.
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*/
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imask[IPL_CLOCK] |= 1 << SPL_CLOCK;
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/*
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* Initialize soft interrupt masks to block themselves.
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*/
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imask[IPL_SOFTCLOCK] = 1 << SIR_CLOCK;
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imask[IPL_SOFTNET] = 1 << SIR_NET;
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imask[IPL_SOFTSERIAL] = 1 << SIR_SERIAL;
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/*
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* IPL_NONE is used for hardware interrupts that are never blocked,
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* and do not block anything else.
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*/
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imask[IPL_NONE] = 0;
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/*
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* Enforce a hierarchy that gives slow devices a better chance at not
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* dropping data.
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*/
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imask[IPL_SOFTCLOCK] |= imask[IPL_NONE];
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imask[IPL_SOFTNET] |= imask[IPL_SOFTCLOCK];
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imask[IPL_BIO] |= imask[IPL_SOFTNET];
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imask[IPL_NET] |= imask[IPL_BIO];
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imask[IPL_SOFTSERIAL] |= imask[IPL_NET];
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imask[IPL_TTY] |= imask[IPL_SOFTSERIAL];
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/*
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* There are tty, network and disk drivers that use free() at interrupt
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* time, so imp > (tty | net | bio).
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*/
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imask[IPL_IMP] |= imask[IPL_TTY];
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imask[IPL_AUDIO] |= imask[IPL_IMP];
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/*
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* Since run queues may be manipulated by both the statclock and tty,
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* network, and disk drivers, clock > imp.
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*/
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imask[IPL_CLOCK] |= imask[IPL_AUDIO];
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/*
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* IPL_HIGH must block everything that can manipulate a run queue.
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*/
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imask[IPL_HIGH] |= imask[IPL_CLOCK];
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/*
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* We need serial drivers to run at the absolute highest priority to
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* avoid overruns, so serial > high.
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*/
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imask[IPL_SERIAL] |= imask[IPL_HIGH];
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/* And eventually calculate the complete masks. */
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#if 0 /* XXX */
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for (irq = 0; irq < NIRQ; irq++) {
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register int irqs = 1 << irq;
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for (q = intrhand[irq]; q; q = q->ih_next)
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irqs |= imask[q->ih_level];
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intrmask[irq] = irqs;
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}
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#endif
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/* Lastly, determine which IRQs are actually in use. */
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for (irq = 0; irq < NIRQ; irq++)
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if (intrhand[irq])
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irqs |= 1 << irq;
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if (have_openpic) {
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for (irq = 0; irq < NIRQ; irq++) {
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if (irqs & (1 << irq))
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openpic_enable_irq(hwirq[irq]);
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else
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openpic_disable_irq(hwirq[irq]);
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}
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} else {
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imen = ~irqs;
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enable_irq(~imen);
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}
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}
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int
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fakeintr(arg)
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void *arg;
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{
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return 0;
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}
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#define LEGAL_IRQ(x) ((x) >= 0 && (x) < NIRQ)
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char *
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intr_typename(type)
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int type;
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{
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switch (type) {
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case IST_NONE :
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return ("none");
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case IST_PULSE:
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return ("pulsed");
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case IST_EDGE:
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return ("edge-triggered");
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case IST_LEVEL:
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return ("level-triggered");
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default:
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panic("intr_typename: invalid type %d", type);
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#if 1 /* XXX */
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return ("unknown");
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#endif
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}
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}
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/*
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* Register an interrupt handler.
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*/
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void *
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intr_establish(int irq, int type, int level, int (*ih_fun)(void *),
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void *ih_arg)
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{
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struct intrhand **p, *q, *ih;
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static struct intrhand fakehand = {fakeintr};
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irq = mapirq(irq);
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/* no point in sleeping unless someone can free memory. */
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ih = malloc(sizeof *ih, M_DEVBUF, cold ? M_NOWAIT : M_WAITOK);
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if (ih == NULL)
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panic("intr_establish: can't malloc handler info");
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if (!LEGAL_IRQ(irq) || type == IST_NONE)
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panic("intr_establish: bogus irq or type");
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switch (intrtype[irq]) {
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case IST_NONE:
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intrtype[irq] = type;
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break;
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case IST_EDGE:
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case IST_LEVEL:
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if (type == intrtype[irq])
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break;
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case IST_PULSE:
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if (type != IST_NONE)
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panic("intr_establish: can't share %s with %s",
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intr_typename(intrtype[irq]),
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intr_typename(type));
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break;
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}
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/*
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* Figure out where to put the handler.
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* This is O(N^2), but we want to preserve the order, and N is
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* generally small.
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*/
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#if 0 /* XXX */
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for (p = &intrhand[irq]; (q = *p) != NULL; p = &q->ih_next)
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;
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#endif
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/*
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* Actually install a fake handler momentarily, since we might be doing
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* this with interrupts enabled and don't want the real routine called
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* until masking is set up.
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*/
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#if 0 /* XXX */
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fakehand.ih_level = level;
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#endif
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*p = &fakehand;
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intr_calculatemasks();
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/*
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* Poke the real handler in now.
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*/
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#if 0
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ih->ih_fun = ih_fun;
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ih->ih_arg = ih_arg;
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ih->ih_count = 0;
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ih->ih_next = NULL;
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ih->ih_level = level;
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ih->ih_irq = irq;
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#endif
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*p = ih;
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return (ih);
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}
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/*
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* Deregister an interrupt handler.
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*/
|
||||
void
|
||||
intr_disestablish(void *arg)
|
||||
{
|
||||
struct intrhand *ih, **p, *q;
|
||||
int irq;
|
||||
|
||||
#if 0 /* XXX */
|
||||
irq = ih->ih_irq;
|
||||
#endif
|
||||
|
||||
ih = arg;
|
||||
|
||||
if (!LEGAL_IRQ(irq))
|
||||
panic("intr_disestablish: bogus irq");
|
||||
|
||||
/*
|
||||
* Remove the handler from the chain.
|
||||
* This is O(n^2), too.
|
||||
*/
|
||||
for (p = &intrhand[irq]; (q = *p) != NULL && q != ih; p = &q->ih_next)
|
||||
;
|
||||
if (q)
|
||||
#if 0 /* XXX */
|
||||
*p = q->ih_next;
|
||||
#else
|
||||
p = p;
|
||||
#endif
|
||||
else
|
||||
panic("intr_disestablish: handler not registered");
|
||||
free((void *)ih, M_DEVBUF);
|
||||
|
||||
intr_calculatemasks();
|
||||
|
||||
if (intrhand[irq] == NULL)
|
||||
intrtype[irq] = IST_NONE;
|
||||
}
|
||||
|
||||
/*
|
||||
* external interrupt handler
|
||||
*/
|
||||
void
|
||||
ext_intr(void)
|
||||
{
|
||||
int irq;
|
||||
int o_imen, r_imen;
|
||||
int pcpl;
|
||||
struct intrhand *ih;
|
||||
volatile unsigned long int_state;
|
||||
|
||||
pcpl = splhigh(); /* Turn off all */
|
||||
|
||||
int_state = read_irq();
|
||||
if (int_state == 0)
|
||||
goto out;
|
||||
|
||||
start:
|
||||
irq = 31 - cntlzw(int_state);
|
||||
|
||||
o_imen = imen;
|
||||
r_imen = 1 << irq;
|
||||
|
||||
if ((pcpl & r_imen) != 0) {
|
||||
ipending |= r_imen; /* Masked! Mark this as pending */
|
||||
imen |= r_imen;
|
||||
enable_irq(~imen);
|
||||
} else {
|
||||
ih = intrhand[irq];
|
||||
while (ih) {
|
||||
#if 0 /* XXX */
|
||||
(*ih->ih_fun)(ih->ih_arg);
|
||||
ih = ih->ih_next;
|
||||
#endif
|
||||
}
|
||||
|
||||
intrcnt[hwirq[irq]]++;
|
||||
}
|
||||
|
||||
int_state &= ~r_imen;
|
||||
if (int_state)
|
||||
goto start;
|
||||
|
||||
out:
|
||||
splx(pcpl); /* Process pendings. */
|
||||
}
|
||||
|
||||
void
|
||||
ext_intr_openpic()
|
||||
{
|
||||
int irq, realirq;
|
||||
int r_imen;
|
||||
int pcpl;
|
||||
struct intrhand *ih;
|
||||
|
||||
pcpl = splhigh(); /* Turn off all */
|
||||
|
||||
realirq = openpic_read_irq(0);
|
||||
if (realirq == 255) {
|
||||
printf("sprious interrupt\n");
|
||||
goto out;
|
||||
}
|
||||
|
||||
start:
|
||||
irq = virq[realirq];
|
||||
|
||||
/* XXX check range */
|
||||
|
||||
r_imen = 1 << irq;
|
||||
|
||||
if ((pcpl & r_imen) != 0) {
|
||||
ipending |= r_imen; /* Masked! Mark this as pending */
|
||||
openpic_disable_irq(realirq);
|
||||
} else {
|
||||
ih = intrhand[irq];
|
||||
while (ih) {
|
||||
#if 0 /* XXX */
|
||||
(*ih->ih_fun)(ih->ih_arg);
|
||||
ih = ih->ih_next;
|
||||
#endif
|
||||
}
|
||||
|
||||
intrcnt[hwirq[irq]]++;
|
||||
}
|
||||
|
||||
openpic_eoi(0);
|
||||
|
||||
realirq = openpic_read_irq(0);
|
||||
if (realirq != 255)
|
||||
goto start;
|
||||
|
||||
out:
|
||||
splx(pcpl); /* Process pendings. */
|
||||
}
|
||||
|
||||
void
|
||||
do_pending_int()
|
||||
{
|
||||
struct intrhand *ih;
|
||||
int irq;
|
||||
int pcpl;
|
||||
int hwpend;
|
||||
int emsr, dmsr;
|
||||
static int processing;
|
||||
|
||||
return; /* XXX */
|
||||
|
||||
if (processing)
|
||||
return;
|
||||
|
||||
processing = 1;
|
||||
emsr = mfmsr();
|
||||
dmsr = emsr & ~PSL_EE;
|
||||
mtmsr(dmsr);
|
||||
|
||||
pcpl = splhigh(); /* Turn off all */
|
||||
hwpend = ipending & ~pcpl; /* Do now unmasked pendings */
|
||||
if (!have_openpic) {
|
||||
imen &= ~hwpend;
|
||||
enable_irq(~imen);
|
||||
}
|
||||
hwpend &= HWIRQ_MASK;
|
||||
while (hwpend) {
|
||||
irq = 31 - cntlzw(hwpend);
|
||||
hwpend &= ~(1L << irq);
|
||||
ih = intrhand[irq];
|
||||
while(ih) {
|
||||
#if 0 /* XXX */
|
||||
(*ih->ih_fun)(ih->ih_arg);
|
||||
ih = ih->ih_next;
|
||||
#endif
|
||||
}
|
||||
|
||||
intrcnt[hwirq[irq]]++;
|
||||
if (have_openpic)
|
||||
openpic_enable_irq(hwirq[irq]);
|
||||
}
|
||||
|
||||
/*out32rb(INT_ENABLE_REG, ~imen);*/
|
||||
|
||||
if ((ipending & ~pcpl) & (1 << SIR_CLOCK)) {
|
||||
ipending &= ~(1 << SIR_CLOCK);
|
||||
softclock(NULL);
|
||||
intrcnt[CNT_SOFTCLOCK]++;
|
||||
}
|
||||
#if 0 /* XXX */
|
||||
if ((ipending & ~pcpl) & (1 << SIR_NET)) {
|
||||
ipending &= ~(1 << SIR_NET);
|
||||
softnet();
|
||||
intrcnt[CNT_SOFTNET]++;
|
||||
}
|
||||
if ((ipending & ~pcpl) & (1 << SIR_SERIAL)) {
|
||||
ipending &= ~(1 << SIR_SERIAL);
|
||||
softserial();
|
||||
intrcnt[CNT_SOFTSERIAL]++;
|
||||
}
|
||||
#endif
|
||||
ipending &= pcpl;
|
||||
cpl = pcpl; /* Don't use splx... we are here already! */
|
||||
mtmsr(emsr);
|
||||
processing = 0;
|
||||
}
|
||||
|
||||
void
|
||||
openpic_init(void)
|
||||
{
|
||||
int irq;
|
||||
u_int x;
|
||||
|
||||
/* disable all interrupts */
|
||||
for (irq = 0; irq < 256; irq++)
|
||||
openpic_write(OPENPIC_SRC_VECTOR(irq), OPENPIC_IMASK);
|
||||
|
||||
openpic_set_priority(0, 15);
|
||||
|
||||
/* we don't need 8259 pass through mode */
|
||||
x = openpic_read(OPENPIC_CONFIG);
|
||||
x |= OPENPIC_CONFIG_8259_PASSTHRU_DISABLE;
|
||||
openpic_write(OPENPIC_CONFIG, x);
|
||||
|
||||
/* send all interrupts to cpu 0 */
|
||||
for (irq = 0; irq < ICU_LEN; irq++)
|
||||
openpic_write(OPENPIC_IDEST(irq), 1 << 0);
|
||||
|
||||
for (irq = 0; irq < ICU_LEN; irq++) {
|
||||
x = irq;
|
||||
x |= OPENPIC_IMASK;
|
||||
x |= OPENPIC_POLARITY_POSITIVE;
|
||||
x |= OPENPIC_SENSE_LEVEL;
|
||||
x |= 8 << OPENPIC_PRIORITY_SHIFT;
|
||||
openpic_write(OPENPIC_SRC_VECTOR(irq), x);
|
||||
}
|
||||
|
||||
/* XXX set spurious intr vector */
|
||||
|
||||
openpic_set_priority(0, 0);
|
||||
|
||||
/* clear all pending interrunts */
|
||||
for (irq = 0; irq < 256; irq++) {
|
||||
openpic_read_irq(0);
|
||||
openpic_eoi(0);
|
||||
}
|
||||
|
||||
for (irq = 0; irq < ICU_LEN; irq++)
|
||||
openpic_disable_irq(irq);
|
||||
|
||||
install_extint(ext_intr_openpic);
|
||||
}
|
||||
|
||||
void
|
||||
legacy_int_init(void)
|
||||
{
|
||||
out32rb(INT_ENABLE_REG_L, 0); /* disable all intr. */
|
||||
out32rb(INT_CLEAR_REG_L, 0xffffffff); /* clear pending intr. */
|
||||
|
||||
install_extint(ext_intr);
|
||||
}
|
||||
|
||||
#define HEATHROW_FCR_OFFSET 0x38 /* XXX should not here */
|
||||
#define GC_OBIO_BASE 0xf3000000
|
||||
|
||||
void
|
||||
init_interrupt(void)
|
||||
{
|
||||
int chosen;
|
||||
int mac_io, reg[5];
|
||||
int32_t ictlr;
|
||||
char type[32];
|
||||
|
||||
openpic_base = NULL;
|
||||
|
||||
mac_io = OF_finddevice("mac-io");
|
||||
if (mac_io == -1)
|
||||
mac_io = OF_finddevice("/pci/mac-io");
|
||||
|
||||
if (mac_io == -1) {
|
||||
/*
|
||||
* No mac-io. Assume Grand-Central or OHare.
|
||||
*/
|
||||
obio_base = (void *)GC_OBIO_BASE;
|
||||
legacy_int_init();
|
||||
return;
|
||||
}
|
||||
|
||||
if (OF_getprop(mac_io, "assigned-addresses", reg, sizeof(reg)) < 20)
|
||||
goto failed;
|
||||
|
||||
obio_base = (void *)reg[2];
|
||||
#if 0 /* XXX */
|
||||
heathrow_FCR = (void *)(obio_base + HEATHROW_FCR_OFFSET);
|
||||
#endif
|
||||
|
||||
bzero(type, sizeof(type));
|
||||
chosen = OF_finddevice("/chosen");
|
||||
if (OF_getprop(chosen, "interrupt-controller", &ictlr, 4) == 4)
|
||||
OF_getprop(ictlr, "device_type", type, sizeof(type));
|
||||
|
||||
if (strcmp(type, "open-pic") != 0) {
|
||||
/*
|
||||
* Not an open-pic. Must be a Heathrow (compatible).
|
||||
*/
|
||||
legacy_int_init();
|
||||
return;
|
||||
} else {
|
||||
/*
|
||||
* We have an Open PIC.
|
||||
*/
|
||||
if (OF_getprop(ictlr, "reg", reg, sizeof(reg)) < 8)
|
||||
goto failed;
|
||||
|
||||
openpic_base = (void *)(obio_base + reg[0]);
|
||||
openpic_init();
|
||||
return;
|
||||
}
|
||||
|
||||
printf("unknown interrupt controller\n");
|
||||
failed:
|
||||
panic("init_interrupt: failed to initialize interrupt controller");
|
||||
}
|
||||
Loading…
Reference in New Issue
Block a user