Pull the correct file over to freefall.
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7d5e08df01
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@ -112,6 +112,8 @@ register SCSISIGI {
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mask PHASE_MASK CDI|IOI|MSGI
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mask P_DATAOUT 0x00
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mask P_DATAIN IOI
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mask P_DATAOUT_DT P_DATAOUT|MSGI
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mask P_DATAIN_DT P_DATAIN|MSGI
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mask P_COMMAND CDI
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mask P_MESGOUT CDI|MSGI
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mask P_STATUS CDI|IOI
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@ -311,6 +313,10 @@ register SSTAT2 {
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bit OVERRUN 0x80
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bit SHVALID 0x40 /* Shaddow Layer non-zero */
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bit EXP_ACTIVE 0x10 /* SCSI Expander Active */
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bit CRCVALERR 0x08 /* CRC doesn't match (U3 only) */
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bit CRCENDERR 0x04 /* No terminal CRC packet (U3 only) */
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bit CRCREQERR 0x02 /* Illegal CRC packet req (U3 only) */
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bit DUAL_EDGE_ERR 0x01 /* Incorrect data phase (U3 only) */
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mask SFCNT 0x1f
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}
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@ -959,30 +965,6 @@ register SFUNCT {
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*/
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scb {
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address 0x0a0
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SCB_CONTROL {
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size 1
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bit TARGET_SCB 0x80
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bit DISCENB 0x40
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bit TAG_ENB 0x20
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bit MK_MESSAGE 0x10
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bit ULTRAENB 0x08
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bit DISCONNECTED 0x04
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mask SCB_TAG_TYPE 0x03
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}
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SCB_SCSIID {
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size 1
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bit TWIN_CHNLB 0x80
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mask TWIN_TID 0x70
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mask TID 0xf0
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mask OID 0x0f
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}
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SCB_LUN {
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mask LID 0xff
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size 1
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}
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SCB_CDB_LEN {
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size 1
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}
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SCB_CDB_PTR {
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size 4
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alias SCB_RESIDUAL_DATACNT
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@ -1016,9 +998,33 @@ scb {
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bit SG_FULL_RESID 0x02 /* In the first byte */
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bit SG_LIST_NULL 0x01 /* In the first byte */
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}
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SCB_CONTROL {
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size 1
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bit TARGET_SCB 0x80
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bit DISCENB 0x40
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bit TAG_ENB 0x20
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bit MK_MESSAGE 0x10
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bit ULTRAENB 0x08
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bit DISCONNECTED 0x04
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mask SCB_TAG_TYPE 0x03
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}
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SCB_SCSIID {
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size 1
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bit TWIN_CHNLB 0x80
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mask TWIN_TID 0x70
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mask TID 0xf0
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mask OID 0x0f
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}
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SCB_LUN {
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mask LID 0xff
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size 1
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}
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SCB_TAG {
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size 1
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}
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SCB_CDB_LEN {
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size 1
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}
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SCB_SCSIRATE {
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size 1
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}
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@ -1028,16 +1034,17 @@ scb {
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SCB_NEXT {
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size 1
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}
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SCB_64_BTT {
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SCB_64_SPARE {
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size 16
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}
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SCB_64_SPARE {
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SCB_64_BTT {
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size 16
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}
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}
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const SCB_32BYTE_SIZE 30 /* Cards supporting 32byte scbs */
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const SCB_64BYTE_SIZE 32 /* Cards supporting 64byte scbs */
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const SCB_UPLOAD_SIZE 32
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const SCB_DOWNLOAD_SIZE 32
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const SCB_DOWNLOAD_SIZE_64 48
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const SG_SIZEOF 0x08 /* sizeof(struct ahc_dma) */
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@ -1210,13 +1217,22 @@ scratch_ram {
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size 16
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}
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/*
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* Bit vector of targets that have ULTRA enabled.
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* Bit vector of targets that have ULTRA enabled as set by the BIOS.
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* The Sequencer relies in a per-SCB field to control the disconnect
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* priveldge.
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*/
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ULTRA_ENB {
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size 2
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/*
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* Partial transfer past cacheline end to be
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* transferred using an extra S/G.
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*/
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alias MWI_RESIDUAL
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}
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/*
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* Bit vector of targets that have disconnection disabled.
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* Bit vector of targets that have disconnection disabled as set by
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* the BIOS. The Sequencer relies in a per-SCB field to control the
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* disconnect priveldge.
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*/
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DISC_DSB {
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size 2
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@ -1470,3 +1486,5 @@ const TARGET_DATA_IN 1
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/* Offsets into the SCBID array where different data is stored */
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const QOUTFIFO_OFFSET download
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const QINFIFO_OFFSET download
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const CACHESIZE_MASK download
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const INVERTED_CACHESIZE_MASK download
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