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Support for the new Patsburg PCH chipset:

Browse Source 
- SMBus Controller
     - SATA Controller
     - HD Audio Controller
     - Watchdog Controller

Thanks to Seth Heasley (seth.heasley@intel.com) for providing us code.

MFC after 3 days
This commit is contained in:
Jack F Vogel 2011-02-01 01:05:11 +00:00
parent 94486ae22d
commit bf0477b215
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=218149
7 changed files with 29 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
sys/dev/ahci/ahci.c
View File

@ -161,7 +161,10 @@ static struct {
{0x1c038086, 0x00, "Intel Cougar Point", 0},
{0x1c048086, 0x00, "Intel Cougar Point", 0},
{0x1c058086, 0x00, "Intel Cougar Point", 0},
{0x23238086, 0x00, "Intel DH89xxCC", 0},
{0x23238086, 0x00, "Intel DH89xxCC", 0},
{0x1d028086, 0x00, "Intel Patsburg", 0},
{0x1d048086, 0x00, "Intel Patsburg", 0},
{0x1d068086, 0x00, "Intel Patsburg", 0},
{0x2361197b, 0x00, "JMicron JMB361", AHCI_Q_NOFORCE},
{0x2363197b, 0x00, "JMicron JMB363", AHCI_Q_NOFORCE},
{0x2365197b, 0x00, "JMicron JMB365", AHCI_Q_NOFORCE},

6
sys/dev/ata/ata-pci.h
View File

@ -227,6 +227,12 @@ struct ata_pci_controller {
#define ATA_CPT_S3 0x1c088086
#define ATA_CPT_S4 0x1c098086
#define ATA_PBG_S1 0x1d008086
#define ATA_PBG_AH1 0x1d028086
#define ATA_PBG_R1 0x1d048086
#define ATA_PBG_R2 0x1d068086
#define ATA_PBG_S2 0x1d088086
#define ATA_I31244 0x32008086
#define ATA_ISCH 0x811a8086
#define ATA_DH89XXCC 0x23238086

5
sys/dev/ata/chipsets/ata-intel.c
View File

@ -176,6 +176,11 @@ ata_intel_probe(device_t dev)
{ ATA_CPT_R2, 0, INTEL_AHCI, 0, ATA_SA300, "Cougar Point" },
{ ATA_CPT_S3, 0, INTEL_6CH2, 0, ATA_SA300, "Cougar Point" },
{ ATA_CPT_S4, 0, INTEL_6CH2, 0, ATA_SA300, "Cougar Point" },
{ ATA_PBG_S1, 0, INTEL_6CH, 0, ATA_SA300, "Patsburg" },
{ ATA_PBG_AH1, 0, INTEL_AHCI, 0, ATA_SA300, "Patsburg" },
{ ATA_PBG_R1, 0, INTEL_AHCI, 0, ATA_SA300, "Patsburg" },
{ ATA_PBG_R2, 0, INTEL_AHCI, 0, ATA_SA300, "Patsburg" },
{ ATA_PBG_S2, 0, INTEL_6CH2, 0, ATA_SA300, "Patsburg" },
{ ATA_I31244, 0, 0, 2, ATA_SA150, "31244" },
{ ATA_ISCH, 0, 0, 1, ATA_UDMA5, "SCH" },
{ ATA_DH89XXCC, 0, INTEL_AHCI, 0, ATA_SA300, "DH89xxCC" },

4
sys/dev/ichsmb/ichsmb_pci.c
View File

@ -82,6 +82,7 @@ __FBSDID("$FreeBSD$");
#define ID_6300ESB 0x25a48086
#define ID_631xESB 0x269b8086
#define ID_DH89XXCC 0x23308086
#define ID_PATSBURG 0x1d228086
#define ID_CPT 0x1c228086
#define PCIS_SERIALBUS_SMBUS_PROGIF 0x00
@ -179,6 +180,9 @@ ichsmb_pci_probe(device_t dev)
case ID_DH89XXCC:
device_set_desc(dev, "Intel DH89xxCC SMBus controller");
break;
case ID_PATSBURG:
device_set_desc(dev, "Intel Patsburg SMBus controller");
break;
case ID_CPT:
device_set_desc(dev, "Intel Cougar Point SMBus controller");
break;

4
sys/dev/ichwd/ichwd.c
View File

@ -157,7 +157,9 @@ static struct ichwd_device ichwd_devices[] = {
{ DEVICEID_CPT29, "Intel Cougar Point watchdog timer", 10 },
{ DEVICEID_CPT30, "Intel Cougar Point watchdog timer", 10 },
{ DEVICEID_CPT31, "Intel Cougar Point watchdog timer", 10 },
{ DEVICEID_DH89XXCC_LPC, "Intel DH89xxCC watchdog timer", 10 },
{ DEVICEID_DH89XXCC_LPC, "Intel DH89xxCC watchdog timer", 10 },
{ DEVICEID_PATSBURG_LPC1, "Intel Patsburg watchdog timer", 10 },
{ DEVICEID_PATSBURG_LPC2, "Intel Patsburg watchdog timer", 10 },
{ 0, NULL, 0 },
};

2
sys/dev/ichwd/ichwd.h
View File

@ -96,6 +96,8 @@ struct ichwd_softc {
#define DEVICEID_CPT29 0x1c5d
#define DEVICEID_CPT30 0x1c5e
#define DEVICEID_CPT31 0x1c5f
#define DEVICEID_PATSBURG_LPC1 0x1d40
#define DEVICEID_PATSBURG_LPC2 0x1d41
#define DEVICEID_DH89XXCC_LPC 0x2310
#define DEVICEID_82801AA 0x2410
#define DEVICEID_82801AB 0x2420

6
sys/dev/sound/pci/hda/hdac.c
View File

@ -141,6 +141,7 @@ SND_DECLARE_FILE("$FreeBSD$");
/* Intel */
#define INTEL_VENDORID 0x8086
#define HDA_INTEL_CPT HDA_MODEL_CONSTRUCT(INTEL, 0x1c20)
#define HDA_INTEL_PATSBURG HDA_MODEL_CONSTRUCT(INTEL, 0x1d20)
#define HDA_INTEL_82801F HDA_MODEL_CONSTRUCT(INTEL, 0x2668)
#define HDA_INTEL_63XXESB HDA_MODEL_CONSTRUCT(INTEL, 0x269a)
#define HDA_INTEL_82801G HDA_MODEL_CONSTRUCT(INTEL, 0x27d8)
@ -149,6 +150,7 @@ SND_DECLARE_FILE("$FreeBSD$");
#define HDA_INTEL_82801JI HDA_MODEL_CONSTRUCT(INTEL, 0x3a3e)
#define HDA_INTEL_82801JD HDA_MODEL_CONSTRUCT(INTEL, 0x3a6e)
#define HDA_INTEL_PCH HDA_MODEL_CONSTRUCT(INTEL, 0x3b56)
#define HDA_INTEL_PCH2 HDA_MODEL_CONSTRUCT(INTEL, 0x3b57)
#define HDA_INTEL_SCH HDA_MODEL_CONSTRUCT(INTEL, 0x811b)
#define HDA_INTEL_ALL HDA_MODEL_CONSTRUCT(INTEL, 0xffff)
@ -492,6 +494,7 @@ static const struct {
char flags;
} hdac_devices[] = {
{ HDA_INTEL_CPT, "Intel Cougar Point", 0 },
{ HDA_INTEL_PATSBURG,"Intel Patsburg", 0 },
{ HDA_INTEL_82801F, "Intel 82801F", 0 },
{ HDA_INTEL_63XXESB, "Intel 631x/632xESB", 0 },
{ HDA_INTEL_82801G, "Intel 82801G", 0 },
@ -499,7 +502,8 @@ static const struct {
{ HDA_INTEL_82801I, "Intel 82801I", 0 },
{ HDA_INTEL_82801JI, "Intel 82801JI", 0 },
{ HDA_INTEL_82801JD, "Intel 82801JD", 0 },
{ HDA_INTEL_PCH, "Intel PCH", 0 },
{ HDA_INTEL_PCH, "Intel 5 Series/3400 Series", 0 },
{ HDA_INTEL_PCH2, "Intel 5 Series/3400 Series", 0 },
{ HDA_INTEL_SCH, "Intel SCH", 0 },
{ HDA_NVIDIA_MCP51, "NVidia MCP51", HDAC_NO_MSI },
{ HDA_NVIDIA_MCP55, "NVidia MCP55", HDAC_NO_MSI },