Add macros required to enable VMX operation on Intel processors.
Obtained from: NetApp
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svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=245055
@ -68,6 +68,7 @@
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#define CR4_PCE 0x00000100 /* Performance monitoring counter enable */
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#define CR4_FXSR 0x00000200 /* Fast FPU save/restore used by OS */
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#define CR4_XMM 0x00000400 /* enable SIMD/MMX2 to use except 16 */
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#define CR4_VMXE 0x00002000 /* enable VMX operation (Intel-specific) */
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#define CR4_FSGSBASE 0x00010000 /* Enable FS/GS BASE accessing instructions */
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#define CR4_PCIDE 0x00020000 /* Enable Context ID */
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#define CR4_XSAVE 0x00040000 /* XSETBV/XGETBV */
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@ -310,6 +311,7 @@
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#define MSR_APICBASE 0x01b
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#define MSR_EBL_CR_POWERON 0x02a
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#define MSR_TEST_CTL 0x033
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#define MSR_IA32_FEATURE_CONTROL 0x03a
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#define MSR_BIOS_UPDT_TRIG 0x079
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#define MSR_BBL_CR_D0 0x088
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#define MSR_BBL_CR_D1 0x089
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