From c005a51c4e357a1de461a016e8685b212e8ac596 Mon Sep 17 00:00:00 2001 From: Andrew Gallatin Date: Mon, 5 Oct 2009 14:28:23 +0000 Subject: [PATCH] MFC:197645 Two more mxge watchdog fixes 1) Restore the PCI Express control register after a watchdog reset. This is required because the device will come out of watchdog reset with the pectl reg at its default state, and important BIOS configuration (like max payload size) could be lost. 2) Call mxge_start_locked() for every tx queue before dropping the lock in the watchdog handler. This is required, as the queue's buf ring may have filled during the reset. Approved by: re (kib) --- sys/dev/mxge/if_mxge.c | 17 +++++++++++++---- sys/dev/mxge/if_mxge_var.h | 1 + 2 files changed, 14 insertions(+), 4 deletions(-) diff --git a/sys/dev/mxge/if_mxge.c b/sys/dev/mxge/if_mxge.c index f41fbf6cfb53..e59d10c13c6a 100644 --- a/sys/dev/mxge/if_mxge.c +++ b/sys/dev/mxge/if_mxge.c @@ -3653,10 +3653,16 @@ mxge_setup_cfg_space(mxge_softc_t *sc) if (pci_find_extcap(dev, PCIY_EXPRESS, ®) == 0) { lnk = pci_read_config(dev, reg + 0x12, 2); sc->link_width = (lnk >> 4) & 0x3f; - - pectl = pci_read_config(dev, reg + 0x8, 2); - pectl = (pectl & ~0x7000) | (5 << 12); - pci_write_config(dev, reg + 0x8, pectl, 2); + + if (sc->pectl == 0) { + pectl = pci_read_config(dev, reg + 0x8, 2); + pectl = (pectl & ~0x7000) | (5 << 12); + pci_write_config(dev, reg + 0x8, pectl, 2); + sc->pectl = pectl; + } else { + /* restore saved pectl after watchdog reset */ + pci_write_config(dev, reg + 0x8, sc->pectl, 2); + } } /* Enable DMA and Memory space access */ @@ -3768,6 +3774,9 @@ mxge_watchdog_reset(mxge_softc_t *sc, int slice) /* release all TX locks */ for (s = 0; s < num_tx_slices; s++) { ss = &sc->ss[s]; +#ifdef IFNET_BUF_RING + mxge_start_locked(ss); +#endif mtx_unlock(&ss->tx.mtx); } } diff --git a/sys/dev/mxge/if_mxge_var.h b/sys/dev/mxge/if_mxge_var.h index 47c39b5f0193..dedb7ba2e479 100644 --- a/sys/dev/mxge/if_mxge_var.h +++ b/sys/dev/mxge/if_mxge_var.h @@ -273,6 +273,7 @@ struct mxge_softc { struct sysctl_ctx_list slice_sysctl_ctx; char *mac_addr_string; uint8_t mac_addr[6]; /* eeprom mac address */ + uint16_t pectl; /* save PCIe CTL state */ char product_code_string[64]; char serial_number_string[64]; char cmd_mtx_name[16];