Mediatek/Ralink: Get our drivers closer to OpenWRT dts definitions
This revision gets our Mediatek/Ralink drivers closer to OpenWRT's dts definitions, so we can reuse them with less modifications later in order to bring support for a lot of boards at once. Approved by: adrian (mentor) Sponsored by: Smartcom - Bulgaria AD Differential Revision: https://reviews.freebsd.org/D5961
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913b41b84e
commit
c1300b5e37
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=298059
@ -99,13 +99,14 @@ __FBSDID("$FreeBSD$");
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#ifdef FDT
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/* more specific and new models should go first */
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static const struct ofw_compat_data rt_compat_data[] = {
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{ "ralink,rt3050-eth", RT_CHIPID_RT3050 },
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{ "ralink,rt3352-eth", RT_CHIPID_RT3050 },
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{ "ralink,rt3883-eth", RT_CHIPID_RT3050 },
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{ "ralink,rt5350-eth", RT_CHIPID_RT5350 },
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{ "ralink,mt7620a-eth", RT_CHIPID_MT7620 },
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{ "ralink,mt7621-eth", RT_CHIPID_MT7621 },
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{ NULL, 0 }
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{ "ralink,rt3050-eth", RT_CHIPID_RT3050 },
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{ "ralink,rt3352-eth", RT_CHIPID_RT3050 },
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{ "ralink,rt3883-eth", RT_CHIPID_RT3050 },
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{ "ralink,rt5350-eth", RT_CHIPID_RT5350 },
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{ "ralink,mt7620a-eth", RT_CHIPID_MT7620 },
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{ "ralink,mt7621-eth", RT_CHIPID_MT7621 },
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{ "mediatek,mt7621-eth", RT_CHIPID_MT7621 },
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{ NULL, 0 }
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};
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#endif
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@ -78,7 +78,7 @@ ehci_fdt_probe(device_t self)
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if (!ofw_bus_status_okay(self))
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return (ENXIO);
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if (!ofw_bus_is_compatible(self, "ralink,rt3xxx-ehci"))
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if (!ofw_bus_is_compatible(self, "generic-ehci"))
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return (ENXIO);
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device_set_desc(self, EHCI_HC_DEVSTR);
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@ -281,8 +281,8 @@ mtk_gpio_attach(device_t dev)
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sc->do_remap = 0;
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}
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if (OF_hasprop(node, "mtk,num-pins") && (OF_getencprop(node,
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"mtk,num-pins", &num_pins, sizeof(num_pins)) >= 0))
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if (OF_hasprop(node, "ralink,num-gpios") && (OF_getencprop(node,
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"ralink,num-gpios", &num_pins, sizeof(num_pins)) >= 0))
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sc->num_pins = num_pins;
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else
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sc->num_pins = MTK_GPIO_PINS;
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@ -121,8 +121,8 @@ static int mtk_gpio_intr(void *arg);
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#define GPIO_PIORESET(_sc) GPIO_REG((_sc), 0x0040)
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static struct ofw_compat_data compat_data[] = {
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{ "mtk,mt7621-gpio", 1 },
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{ "mtk,mt7628-gpio", 1 },
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{ "mtk,mt7621-gpio-bank", 1 },
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{ "mtk,mt7628-gpio-bank", 1 },
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{ NULL, 0 }
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};
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@ -281,7 +281,7 @@ mtk_gpio_attach(device_t dev)
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else
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sc->num_pins = MTK_GPIO_PINS;
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for (i = 0; i < num_pins; i++) {
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for (i = 0; i < sc->num_pins; i++) {
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sc->pins[i].pin_caps |= GPIO_PIN_INPUT | GPIO_PIN_OUTPUT |
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GPIO_PIN_INVIN | GPIO_PIN_INVOUT;
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sc->pins[i].intr_polarity = INTR_POLARITY_HIGH;
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@ -281,10 +281,10 @@ mtk_gic_map_intr(device_t dev, struct intr_map_data *data,
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sc = device_get_softc(dev);
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if (data == NULL || data->type != INTR_MAP_DATA_FDT ||
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data->fdt.ncells != 1 || data->fdt.cells[0] >= sc->nirqs)
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data->fdt.ncells != 3 || data->fdt.cells[1] >= sc->nirqs)
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return (EINVAL);
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*isrcp = GIC_INTR_ISRC(sc, data->fdt.cells[0]);
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*isrcp = GIC_INTR_ISRC(sc, data->fdt.cells[1]);
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return (0);
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#else
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return (EINVAL);
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@ -78,7 +78,7 @@ ohci_fdt_probe(device_t self)
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if (!ofw_bus_status_okay(self))
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return (ENXIO);
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if (!ofw_bus_is_compatible(self, "ralink,rt3xxx-ohci"))
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if (!ofw_bus_is_compatible(self, "generic-ohci"))
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return (ENXIO);
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device_set_desc(self, OHCI_HC_DEVSTR);
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@ -99,7 +99,7 @@ struct mtk_pci_range {
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u_long len;
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};
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#define FDT_RANGES_CELLS (3 * 2)
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#define FDT_RANGES_CELLS ((1 + 2 + 3) * 2)
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static void
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mtk_pci_range_dump(struct mtk_pci_range *range)
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@ -117,30 +117,33 @@ mtk_pci_ranges_decode(phandle_t node, struct mtk_pci_range *io_space,
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{
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struct mtk_pci_range *pci_space;
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pcell_t ranges[FDT_RANGES_CELLS];
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pcell_t addr_cells, size_cells, par_addr_cells;
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pcell_t *rangesptr;
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pcell_t cell0, cell1, cell2;
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int tuples, i, rv, len;
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int tuple_size, tuples, i, rv, len;
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/*
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* Retrieve 'ranges' property.
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*/
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if (!OF_hasprop(node, "ranges")) {
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printf("%s: %d\n", __FUNCTION__, 1);
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if ((fdt_addrsize_cells(node, &addr_cells, &size_cells)) != 0)
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return (EINVAL);
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}
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if (addr_cells != 3 || size_cells != 2)
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return (ERANGE);
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par_addr_cells = fdt_parent_addr_cells(node);
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if (par_addr_cells != 1)
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return (ERANGE);
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len = OF_getproplen(node, "ranges");
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if (len > sizeof(ranges)) {
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printf("%s: %d\n", __FUNCTION__, 2);
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if (len > sizeof(ranges))
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return (ENOMEM);
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}
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if (OF_getprop(node, "ranges", ranges, sizeof(ranges)) <= 0) {
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printf("%s: %d\n", __FUNCTION__, 3);
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if (OF_getprop(node, "ranges", ranges, sizeof(ranges)) <= 0)
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return (EINVAL);
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}
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tuples = len / (sizeof(pcell_t) * 3);
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tuple_size = sizeof(pcell_t) * (addr_cells + par_addr_cells +
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size_cells);
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tuples = len / tuple_size;
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/*
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* Initialize the ranges so that we don't have to worry about
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@ -159,18 +162,21 @@ mtk_pci_ranges_decode(phandle_t node, struct mtk_pci_range *io_space,
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cell2 = fdt_data_get((void *)rangesptr, 1);
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rangesptr++;
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if (cell0 == 2) {
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if (cell0 & 0x02000000) {
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pci_space = mem_space;
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} else if (cell0 == 1) {
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} else if (cell0 & 0x01000000) {
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pci_space = io_space;
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} else {
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rv = ERANGE;
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printf("%s: %d\n", __FUNCTION__, 4);
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goto out;
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}
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pci_space->base = cell1;
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pci_space->len = cell2;
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pci_space->base = fdt_data_get((void *)rangesptr,
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par_addr_cells);
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rangesptr += par_addr_cells;
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pci_space->len = fdt_data_get((void *)rangesptr, size_cells);
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rangesptr += size_cells;
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}
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rv = 0;
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@ -199,6 +205,7 @@ static struct ofw_compat_data compat_data[] = {
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{ "ralink,rt3883-pcie", MTK_SOC_RT3883 },
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{ "ralink,mt7620a-pcie", MTK_SOC_MT7620A },
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{ "ralink,mt7621-pcie", MTK_SOC_MT7621 },
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{ "mediatek,mt7621-pci", MTK_SOC_MT7621 },
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{ "ralink,mt7628-pcie", MTK_SOC_MT7628 },
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{ "ralink,mt7688-pcie", MTK_SOC_MT7628 },
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{ NULL, MTK_SOC_UNKNOWN }
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@ -63,6 +63,7 @@ static const struct ofw_compat_data compat_data[] = {
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{ "ralink,mtk7620a-soc", MTK_SOC_MT7620A },
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{ "ralink,mtk7620n-soc", MTK_SOC_MT7620N },
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{ "mediatek,mtk7621-soc", MTK_SOC_MT7621 },
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{ "mediatek,mt7621-soc", MTK_SOC_MT7621 },
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{ "ralink,mtk7621-soc", MTK_SOC_MT7621 },
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{ "ralink,mtk7628an-soc", MTK_SOC_MT7628 },
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{ "mediatek,mt7628an-soc", MTK_SOC_MT7628 },
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@ -84,9 +84,10 @@ static void mtk_usb_phy_mt7621_init(device_t);
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static void mtk_usb_phy_mt7628_init(device_t);
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static struct ofw_compat_data compat_data[] = {
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{ "ralink,mt7620a-usbphy", MTK_SOC_MT7620A },
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{ "ralink,mt7620-usbphy", MTK_SOC_MT7620A },
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{ "ralink,mt7628an-usbphy", MTK_SOC_MT7628 },
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{ "ralink,rt3xxx-usbphy", MTK_SOC_RT3352 },
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{ "ralink,rt3352-usbphy", MTK_SOC_RT3352 },
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{ "ralink,rt3050-usbphy", MTK_SOC_RT3050 },
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{ NULL, MTK_SOC_UNKNOWN }
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};
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@ -80,7 +80,7 @@ mtk_xhci_fdt_probe(device_t self)
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if (!ofw_bus_status_okay(self))
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return (ENXIO);
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if (!ofw_bus_is_compatible(self, "mtk,usb-xhci"))
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if (!ofw_bus_is_compatible(self, "mediatek,mt8173-xhci"))
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return (ENXIO);
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device_set_desc(self, XHCI_HC_DEVSTR);
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