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amdtemp: Fix missing 49 degree offset on current EPYC CPUs

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On an EPYC 7313P, the temperature reported by amdtemp was off, because
the offset was not applied. Turns out it needs to be applied with one
more condition: https://lkml.org/lkml/2023/4/13/1095

Reviewed by:	mhorne
Tested by:	mike.jakubik@gmail.com
MFC after:	1 week
Sponsored by:	https://www.patreon.com/valpackett
Pull Request:	https://github.com/freebsd/freebsd-src/pull/754
This commit is contained in:
Val Packett 2023-06-17 13:29:53 -03:00 committed by Mitchell Horne
parent 9aef25d268
commit c1cbabe8ae
1 changed files with 8 additions and 1 deletions
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9
sys/dev/amdtemp/amdtemp.c
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@ -165,6 +165,12 @@ static const struct amdtemp_product {
*/
#define AMDTEMP_17H_CUR_TMP 0x59800
#define AMDTEMP_17H_CUR_TMP_RANGE_SEL (1u << 19)
/*
* Bits 16-17, when set, mean that CUR_TMP is read-write. When it is, the
* 49 degree offset should apply as well. This was revealed in a Linux
* patch from an AMD employee.
*/
#define AMDTEMP_17H_CUR_TMP_TJ_SEL ((1u << 17) | (1u << 16))
/*
* The following register set was discovered experimentally by Ondrej Čerman
* and collaborators, but is not (yet) documented in a PPR/OSRR (other than
@ -731,7 +737,8 @@ amdtemp_decode_fam17h_tctl(int32_t sc_offset, uint32_t val)
{
bool minus49;
minus49 = ((val & AMDTEMP_17H_CUR_TMP_RANGE_SEL) != 0);
minus49 = ((val & AMDTEMP_17H_CUR_TMP_RANGE_SEL) != 0)
|| ((val & AMDTEMP_17H_CUR_TMP_TJ_SEL) == AMDTEMP_17H_CUR_TMP_TJ_SEL);
return (amdtemp_decode_fam10h_to_17h(sc_offset,
val >> AMDTEMP_REPTMP10H_CURTMP_SHIFT, minus49));
}