Unconditionally restore ar.k7 (memory stack) and ar.k6 (register stack)
when returning from an interrupt. Both registers are used on interrupt to switch to the right kernel stack, but other than that they are not used. This means we only have to make sure they contain proper values while in user mode. As such, we conditionally restored these registers based on whether we returned to userland or not. A nice property of conditionally restoring ar.k6 and ar.k7 is that it introduces two invariants: ar.k6 always points to the bottom of the kernel stack and ar.k7 always points to the top of the kernel stack (immediately below the PCB we have there). However, the EPC syscall path introduces an irregularity: there's no "thin red line" between user and kernel. There's a grey area that's a couple of instructions wide. Any interruption in that grey area is bound to see an inconsistent state. One such state is that we're in kernel space for all practical purposes, but we still need to have ar.k6 and ar.k7 restored as if we're in userland. Thus: restore ar.k6 and ar.k7 unconditionally at the cost of losing a valuable invariant. Both registers now hold the extend of the usable portion of the kernel stack at any interrupt nesting, which when in userland mean the bottom and the top of the kstack.
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@ -522,7 +522,7 @@ ENTRY(exception_restore, 0)
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// the backing store.
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{ .mmi
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mov ar.rsc=r31 // setup for loadrs
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(p15) mov ar.k7=r16
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mov ar.k7=r16
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(p15) mov r13=r29
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;;
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}
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@ -542,7 +542,7 @@ exception_restore_restart:
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;;
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}
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{ .mmb
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(p15) mov ar.k6=r31
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mov ar.k6=r31
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mov ar.rnat=r21
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nop 0
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;;
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@ -522,7 +522,7 @@ ENTRY(exception_restore, 0)
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// the backing store.
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{ .mmi
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mov ar.rsc=r31 // setup for loadrs
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(p15) mov ar.k7=r16
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mov ar.k7=r16
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(p15) mov r13=r29
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;;
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}
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@ -542,7 +542,7 @@ exception_restore_restart:
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;;
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}
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{ .mmb
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(p15) mov ar.k6=r31
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mov ar.k6=r31
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mov ar.rnat=r21
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nop 0
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;;
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