- Fix a bug where the TLBPC value was forced to being odd for IN
direction isochronous transfers. - Remove setting of fields which does not belong to the respective TRBs. These fields are currently set as zero and this is more a cosmetic change. MFC after: 3 days Submitted by: Horse Ma <HMa@wyse.com>
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c23c960364
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Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=266541
@ -1849,31 +1849,25 @@ xhci_setup_generic_chain_sub(struct xhci_std_temp *temp)
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XHCI_TRB_3_ISO_SIA_BIT;
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}
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if (temp->direction == UE_DIR_IN)
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dword |= XHCI_TRB_3_DIR_IN | XHCI_TRB_3_ISP_BIT;
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dword |= XHCI_TRB_3_ISP_BIT;
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break;
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case XHCI_TRB_TYPE_DATA_STAGE:
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dword = XHCI_TRB_3_CHAIN_BIT | XHCI_TRB_3_CYCLE_BIT |
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XHCI_TRB_3_TYPE_SET(XHCI_TRB_TYPE_DATA_STAGE) |
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XHCI_TRB_3_TBC_SET(temp->tbc) |
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XHCI_TRB_3_TLBPC_SET(temp->tlbpc);
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XHCI_TRB_3_TYPE_SET(XHCI_TRB_TYPE_DATA_STAGE);
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if (temp->direction == UE_DIR_IN)
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dword |= XHCI_TRB_3_DIR_IN | XHCI_TRB_3_ISP_BIT;
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break;
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case XHCI_TRB_TYPE_STATUS_STAGE:
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dword = XHCI_TRB_3_CHAIN_BIT | XHCI_TRB_3_CYCLE_BIT |
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XHCI_TRB_3_TYPE_SET(XHCI_TRB_TYPE_STATUS_STAGE) |
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XHCI_TRB_3_TBC_SET(temp->tbc) |
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XHCI_TRB_3_TLBPC_SET(temp->tlbpc);
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XHCI_TRB_3_TYPE_SET(XHCI_TRB_TYPE_STATUS_STAGE);
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if (temp->direction == UE_DIR_IN)
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dword |= XHCI_TRB_3_DIR_IN;
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break;
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default: /* XHCI_TRB_TYPE_NORMAL */
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dword = XHCI_TRB_3_CHAIN_BIT | XHCI_TRB_3_CYCLE_BIT |
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XHCI_TRB_3_TYPE_SET(XHCI_TRB_TYPE_NORMAL) |
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XHCI_TRB_3_TBC_SET(temp->tbc) |
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XHCI_TRB_3_TLBPC_SET(temp->tlbpc);
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XHCI_TRB_3_TYPE_SET(XHCI_TRB_TYPE_NORMAL);
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if (temp->direction == UE_DIR_IN)
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dword |= XHCI_TRB_3_DIR_IN | XHCI_TRB_3_ISP_BIT;
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dword |= XHCI_TRB_3_ISP_BIT;
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break;
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}
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td->td_trb[x].dwTrb3 = htole32(dword);
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