Add delays in MI communication register R/W loops.
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ca0ba1d16f
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svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=169875
@ -658,6 +658,7 @@ bge_miibus_readreg(device_t dev, int phy, int reg)
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val = CSR_READ_4(sc, BGE_MI_COMM);
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if (!(val & BGE_MICOMM_BUSY))
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break;
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DELAY(10);
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}
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if (i == BGE_TIMEOUT) {
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@ -702,6 +703,7 @@ bge_miibus_writereg(device_t dev, int phy, int reg, int val)
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for (i = 0; i < BGE_TIMEOUT; i++) {
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if (!(CSR_READ_4(sc, BGE_MI_COMM) & BGE_MICOMM_BUSY))
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break;
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DELAY(10);
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}
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if (autopoll & BGE_MIMODE_AUTOPOLL) {
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