Add delays in MI communication register R/W loops.

This commit is contained in:
Jung-uk Kim 2007-05-22 18:16:23 +00:00
parent d426153980
commit ca0ba1d16f
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=169875

View File

@ -658,6 +658,7 @@ bge_miibus_readreg(device_t dev, int phy, int reg)
val = CSR_READ_4(sc, BGE_MI_COMM);
if (!(val & BGE_MICOMM_BUSY))
break;
DELAY(10);
}
if (i == BGE_TIMEOUT) {
@ -702,6 +703,7 @@ bge_miibus_writereg(device_t dev, int phy, int reg, int val)
for (i = 0; i < BGE_TIMEOUT; i++) {
if (!(CSR_READ_4(sc, BGE_MI_COMM) & BGE_MICOMM_BUSY))
break;
DELAY(10);
}
if (autopoll & BGE_MIMODE_AUTOPOLL) {