Use the cp15 functions to read cp15 registers rather than using assembly

functions. The former are static inline functions so will compile to a
single instruction.

sys/arm/arm/cpufunc.c

@@ -284,10 +284,8 @@ get_cachetype_cp15(void)
 	u_int multiplier;
 	u_char type;
 
-	__asm __volatile("mrc p15, 0, %0, c0, c0, 1"
-		: "=r" (ctype));
-
-	cpuid = cpu_ident();
+	ctype = cp15_ctr_get();
+	cpuid = cp15_midr_get();
 	/*
 	 * ...and thus spake the ARM ARM:
 	 *
@@ -388,7 +386,7 @@ get_cachetype_cp15(void)
 int
 set_cpufuncs(void)
 {
-	cputype = cpu_ident();
+	cputype = cp15_midr_get();
 	cputype &= CPU_ID_CPU_MASK;
 
 #if defined(CPU_ARM9E)
@@ -553,7 +551,7 @@ arm11x6_setup(void)
 	uint32_t tmp, tmp2;
 	uint32_t cpuid;
 
-	cpuid = cpu_ident();
+	cpuid = cp15_midr_get();
 
 	auxctrl = 0;
 	auxctrl_wax = ~0;

sys/arm/arm/cpufunc_asm.S

@@ -62,35 +62,10 @@ END(cpufunc_nullop)
  *
  */
 
-ENTRY(cpu_ident)
-	mrc	p15, 0, r0, c0, c0, 0
-	RET
-END(cpu_ident)
-
-ENTRY(cpu_get_control)
-	mrc	CP15_SCTLR(r0)
-	RET
-END(cpu_get_control)
-
-ENTRY(cpu_read_cache_config)
-	mrc	p15, 0, r0, c0, c0, 1
-	RET
-END(cpu_read_cache_config)
-
-ENTRY(cpu_faultstatus)
-	mrc	p15, 0, r0, c5, c0, 0
-	RET
-END(cpu_faultstatus)
-
-ENTRY(cpu_faultaddress)
-	mrc	p15, 0, r0, c6, c0, 0
-	RET
-END(cpu_faultaddress)
-
 /*
  * Generic functions to write the internal coprocessor registers
  *
- *
+
  * Currently these registers are
  *  c1 - CPU Control
  *  c3 - Domain Access Control

sys/arm/arm/identcpu-v4.c

@@ -279,8 +279,8 @@ identify_arm_cpu(void)
 	u_int cpuid, ctrl;
 	int i;
 
-	ctrl = cpu_get_control();
-	cpuid = cpu_ident();
+	ctrl = cp15_sctlr_get();
+	cpuid = cp15_midr_get();
 
 	if (cpuid == 0) {
 		printf("Processor failed probe - no CPU ID\n");

sys/arm/arm/trap-v4.c

@@ -189,8 +189,8 @@ abort_handler(struct trapframe *tf, int type)
 		return (prefetch_abort_handler(tf));
 
 	/* Grab FAR/FSR before enabling interrupts */
-	far = cpu_faultaddress();
-	fsr = cpu_faultstatus();
+	far = cp15_dfar_get();
+	fsr = cp15_dfsr_get();
 #if 0
 	printf("data abort: fault address=%p (from pc=%p lr=%p)\n",
 	       (void*)far, (void*)tf->tf_pc, (void*)tf->tf_svc_lr);

sys/arm/include/cpufunc.h

@@ -208,12 +208,8 @@ int	set_cpufuncs		(void);
 #define ARCHITECTURE_NOT_SUPPORTED	2	/* not known */
 
 void	cpufunc_nullop		(void);
-u_int	cpu_ident		(void);
 u_int	cpufunc_control		(u_int clear, u_int bic);
 void	cpu_domains		(u_int domains);
-u_int	cpu_faultstatus		(void);
-u_int	cpu_faultaddress	(void);
-u_int	cpu_get_control		(void);
 u_int	cpu_pfr			(int);
 
 #if defined(CPU_ARM9E)

sys/arm/mv/armadaxp/armadaxp.c

@@ -35,8 +35,9 @@ __FBSDID("$FreeBSD$");
 #include <sys/systm.h>
 #include <sys/bus.h>
 
-#include <machine/bus.h>
 #include <machine/armreg.h>
+#include <machine/bus.h>
+#include <machine/cpu.h>
 
 #include <arm/mv/mvwin.h>
 #include <arm/mv/mvreg.h>
@@ -142,7 +143,7 @@ get_tclk_armadaxp(void)
 {
  	uint32_t cputype;
 
-	cputype = cpu_ident();
+	cputype = cp15_midr_get();
 	cputype &= CPU_ID_CPU_MASK;
 
 	if (cputype == CPU_ID_MV88SV584X_V7)

sys/arm/mv/armadaxp/armadaxp_mp.c

@@ -107,7 +107,7 @@ mv_axp_platform_mp_start_ap(platform_t plat)
 	 * Initialization procedure depends on core revision,
 	 * in this step CHIP ID is checked to choose proper procedure
 	 */
-	cputype = cpu_ident();
+	cputype = cp15_midr_get();
 	cputype &= CPU_ID_CPU_MASK;
 
 	/*

sys/arm/ti/ti_cpuid.c

@@ -41,6 +41,7 @@ __FBSDID("$FreeBSD$");
 #include <sys/mutex.h>
 
 #include <machine/bus.h>
+#include <machine/cpu.h>
 #include <machine/fdt.h>
 #include <machine/resource.h>
 #include <machine/intr.h>
@@ -124,7 +125,7 @@ omap4_get_revision(void)
 	 * the ARM cpuid to get the correct revision.
 	 */
 	if (revision == 0) {
-		id_code = cpu_ident();
+		id_code = cp15_midr_get();
 		revision = (id_code & 0xf) - 1;
 	}