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amd64 efirt: do not flush cache for runtime pages

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We actually do not know is it safe or not to flush cache for random
BAR/register page existing in the system.  It is well-known that for
instance LAPICs cannot tolerate cache flush.  As report indicates,
there are more such devices.

This issue typically affects AMD machines which do not report self-snoop,
causing real CLFLUSH invocation on the mapped pages.  Intels do self-snoop,
so this change should be nop for them, and unsafe devices, if any, are
already ignored.

Reported and tested by:	manu
Reviewed by:	alc, markj
Sponsored by:	The FreeBSD Foundation
MFC after:	1 week
Differential revision:	https://reviews.freebsd.org/D32318
This commit is contained in:
Konstantin Belousov 2021-10-05 17:14:11 +03:00
parent 33c17670af
commit ce21d4bff1
1 changed files with 1 additions and 1 deletions
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2
sys/amd64/amd64/efirt_machdep.c
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@ -254,7 +254,7 @@ efi_create_1t1_map(struct efi_md *map, int ndesc, int descsz)
vm_page_init_page(m, va, -1);
m->order = VM_NFREEORDER + 1; /* invalid */
m->pool = VM_NFREEPOOL + 1; /* invalid */
pmap_page_set_memattr(m, mode);
pmap_page_set_memattr_noflush(m, mode);
}
}
VM_OBJECT_WUNLOCK(obj_1t1_pt);