Initial import of ipw, iwi, ral and ural drivers:
ipw - Intel PRO/Wireless 2100 iwi - Intel PRO/Wireless 2200BG/2225BG/2915ABG ral - Ralink Technology RT2500 ural - Ralink Technology RT2500USB Approved by: silby (mentor)
This commit is contained in:
parent
8195404bed
commit
ceaec73d40
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=145247
@ -113,8 +113,10 @@ MAN= aac.4 \
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ipfirewall.4 \
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ips.4 \
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ipsec.4 \
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ipw.4 \
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isp.4 \
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ispfw.4 \
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iwi.4 \
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ixgb.4 \
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joy.4 \
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kame.4 \
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@ -236,6 +238,7 @@ MAN= aac.4 \
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pt.4 \
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pty.4 \
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puc.4 \
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ral.4 \
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random.4 \
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rc.4 \
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re.4 \
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@ -338,6 +341,7 @@ MAN= aac.4 \
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ums.4 \
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unix.4 \
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uplcom.4 \
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ural.4 \
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urio.4 \
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usb.4 \
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uscanner.4 \
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@ -410,6 +414,8 @@ MLINKS+=ip.4 rawip.4
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MLINKS+=ipfirewall.4 ipaccounting.4 \
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ipfirewall.4 ipacct.4 \
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ipfirewall.4 ipfw.4
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MLINKS+=ipw.4 if_ipw.4
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MLINKS+=iwi.4 if_iwi.4
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MLINKS+=kue.4 if_kue.4
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MLINKS+=lge.4 if_lge.4
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MLINKS+=lo.4 loop.4
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@ -428,6 +434,7 @@ MLINKS+=pcm.4 snd.4 \
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MLINKS+=pcn.4 if_pcn.4
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MLINKS+=pcvt.4 vt.4
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MLINKS+=ppp.4 if_ppp.4
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MLINKS+=ral.4 if_ral.4
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MLINKS+=re.4 if_re.4
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MLINKS+=rl.4 if_rl.4
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MLINKS+=rue.4 if_rue.4
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@ -454,6 +461,7 @@ MLINKS+=tun.4 if_tun.4
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MLINKS+=tx.4 if_tx.4
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MLINKS+=txp.4 if_txp.4
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MLINKS+=udav.4 if_udav.4
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MLINKS+=ural.4 if_ural.4
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MLINKS+=vge.4 if_vge.4
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MLINKS+=vlan.4 if_vlan.4
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MLINKS+=vpo.4 imm.4
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94
share/man/man4/ipw.4
Normal file
94
share/man/man4/ipw.4
Normal file
@ -0,0 +1,94 @@
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.\" $FreeBSD$
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.\"
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.\" Copyright (c) 2004
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.\" Damien Bergamini <damien.bergamini@free.fr>. All rights reserved.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
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.\" notice unmodified, this list of conditions, and the following
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.\" disclaimer.
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.\" 2. Redistributions in binary form must reproduce the above copyright
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.\" notice, this list of conditions and the following disclaimer in the
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.\" documentation and/or other materials provided with the distribution.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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.\" SUCH DAMAGE.
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.\"
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.Dd May 02, 2005
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.Os
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.Dt IPW 4
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.Sh NAME
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.Nm ipw
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.Nd Intel PRO/Wireless 2100 IEEE 802.11 driver
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.Sh SYNOPSIS
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.Cd "device ipw"
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.Cd "device pci"
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.Cd "device wlan"
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.Sh DESCRIPTION
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The
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.Nm
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driver provides support for the
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.Tn Intel
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PRO/Wireless 2100 MiniPCI network adapter.
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.Pp
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By default, the
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.Nm
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driver configures the adapter for BSS operation (aka infrastructure mode).
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This mode requires the use of an access point.
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.Pp
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For more information on configuring this device, see
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.Xr ifconfig 8 .
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.Sh EXAMPLES
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Join an existing BSS network (ie: connect to an access point):
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.Pp
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.Dl "ifconfig ipw0 inet 192.168.0.20 netmask 0xffffff00"
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.Pp
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Join a specific BSS network with network name
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.Dq Li my_net :
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.Pp
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.Dl "ifconfig ipw0 inet 192.168.0.20 netmask 0xffffff00 ssid my_net"
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.Pp
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Join a specific BSS network with 40bit WEP encryption:
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.Bd -literal -offset indent
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ifconfig ipw0 inet 192.168.0.20 netmask 0xffffff00 ssid my_net \e
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wepmode on wepkey 0x1234567890
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.Ed
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.Pp
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Join a specific BSS network with 104bit WEP encryption:
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.Bd -literal -offset indent
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ifconfig ipw0 inet 192.168.0.20 netmask 0xffffff00 ssid my_net \e
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wepmode on wepkey 0x01020304050607080910111213
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.Ed
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.Sh DIAGNOSTICS
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.Bl -diag
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.It "ipw%d: device timeout"
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The driver will reset the hardware. This should not happen.
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.El
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.Sh SEE ALSO
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.Xr an 4 ,
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.Xr ath 4 ,
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.Xr pci 4 ,
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.Xr wi 4 ,
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.Xr wlan 4 ,
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.Xr ifconfig 8 ,
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.Xr ipwcontrol 8
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.Rs
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.%T The IPW Web Page
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.%O http://damien.bergamini.free.fr/ipw/
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.Re
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.Sh AUTHORS
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The
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.Nm
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driver was written by
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.An Damien Bergamini Aq damien@freebsd.org .
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96
share/man/man4/iwi.4
Normal file
96
share/man/man4/iwi.4
Normal file
@ -0,0 +1,96 @@
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.\" $FreeBSD$
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.\"
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.\" Copyright (c) 2004, 2005
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.\" Damien Bergamini <damien.bergamini@free.fr>. All rights reserved.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
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||||
.\" notice unmodified, this list of conditions, and the following
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.\" disclaimer.
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.\" 2. Redistributions in binary form must reproduce the above copyright
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.\" notice, this list of conditions and the following disclaimer in the
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.\" documentation and/or other materials provided with the distribution.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
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.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
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.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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.\" SUCH DAMAGE.
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.\"
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.Dd May 02, 2005
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.Os
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.Dt IWI 4
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.Sh NAME
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.Nm iwi
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.Nd Intel PRO/Wireless 2200BG/2225BG/2915ABG IEEE 802.11 driver
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.Sh SYNOPSIS
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.Cd "device iwi"
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.Cd "device pci"
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.Cd "device wlan"
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.Sh DESCRIPTION
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The
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.Nm
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driver provides support for
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.Tn Intel
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PRO/Wireless 2200BG/2915ABG MiniPCI and 2225BG PCI network adapters.
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.Pp
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By default, the
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.Nm
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driver configures the adapter for BSS operation (aka infrastructure mode).
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This mode requires the use of an access point.
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.Pp
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For more information on configuring this device, see
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.Xr ifconfig 8 .
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.Sh EXAMPLES
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Join an existing BSS network (ie: connect to an access point):
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.Pp
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.Dl "ifconfig iwi0 inet 192.168.0.20 netmask 0xffffff00"
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.Pp
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Join a specific BSS network with network name
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.Dq Li my_net :
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.Pp
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.Dl "ifconfig iwi0 inet 192.168.0.20 netmask 0xffffff00 ssid my_net"
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.Pp
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Join a specific BSS network with 64 bits WEP encryption:
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.Bd -literal -offset indent
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ifconfig iwi0 inet 192.168.0.20 netmask 0xffffff00 ssid my_net \e
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wepmode on wepkey 0x1234567890
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.Ed
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.Pp
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Join a specific BSS network with 128bits WEP encryption:
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.Bd -literal -offset indent
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ifconfig iwi0 inet 192.168.0.20 netmask 0xffffff00 ssid my_net \e
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wepmode on wepkey 0x01020304050607080910111213
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.Ed
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.Sh DIAGNOSTICS
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.Bl -diag
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.It "iwi%d: device timeout"
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The driver will reset the hardware. This should not happen.
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.El
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.Sh SEE ALSO
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.Xr an 4 ,
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.Xr ath 4 ,
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.Xr ipw 4 ,
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.Xr pci 4 ,
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.Xr wi 4 ,
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.Xr wlan 4 ,
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.Xr ifconfig 8 ,
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.Xr iwicontrol 8,
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.Xr wicontrol 8
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.Rs
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.%T The IWI Web Page
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.%O http://damien.bergamini.free.fr/ipw/
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.Re
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.Sh AUTHORS
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The
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.Nm
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driver was written by
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.An Damien Bergamini Aq damien@freebsd.org .
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182
share/man/man4/ral.4
Normal file
182
share/man/man4/ral.4
Normal file
@ -0,0 +1,182 @@
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.\" $FreeBSD$
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.\"
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.\" Copyright (c) 2005
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.\" Damien Bergamini <damien.bergamini@free.fr>
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.\"
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.\" Permission to use, copy, modify, and distribute this software for any
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.\" purpose with or without fee is hereby granted, provided that the above
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.\" copyright notice and this permission notice appear in all copies.
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.\"
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.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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.\"
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.Dd May 02, 2005
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.Os
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.Dt RAL 4
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.Sh NAME
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.Nm ral
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.Nd Ralink Technology RT2500 IEEE 802.11 driver
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.Sh SYNOPSIS
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.Cd "device ral"
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.Cd "device wlan"
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.Sh DESCRIPTION
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The
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.Nm
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driver supports PCI/CardBus wireless adapters based on the Ralink RT2500
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chipset.
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.Pp
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The RT2500 chipset consists of two integrated chips, a RT2560 MAC/BBP and a
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radio transceiver (the model of which depends on the card revision).
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.Pp
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The RT2522, RT2523, RT2524, RT2525, RT2525e and RT2526 radio transceivers
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operate in the 2.4GHz band (802.11b/g) whereas the RT5222 is a dual-band radio
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transceiver that can operate in the 2.4GHz and 5.2GHz bands (802.11a).
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.Pp
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The transmit speed is user-selectable or can be adapted automatically by the
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driver depending on the received-signal strength.
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.Sh HARDWARE
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The following adapters should work:
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.Pp
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.Bl -column -compact "Atlantis Land A02-PCM-W54" "Bus"
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.It Em "Card Bus"
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.It Li "A-Link WL54H" Ta PCI
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.It Li "A-Link WL54PC" Ta CardBus
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.It Li "Amigo AWI-914W" Ta CardBus
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.It Li "Amigo AWI-922W" Ta mini-PCI
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.It Li "Amigo AWI-926W" Ta PCI
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.It Li "AMIT WL531C" Ta CardBus
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.It Li "AMIT WL531P" Ta PCI
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.It Li "AOpen AOI-831" Ta PCI
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.It Li "ASUS WL-107G" Ta CardBus
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.It Li "ASUS WL-130g" Ta PCI
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.It Li "Atlantis Land A02-PCI-W54" Ta PCI
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.It Li "Atlantis Land A02-PCM-W54" Ta CardBus
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.It Li "Belkin F5D7000 v3" Ta PCI
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.It Li "Belkin F5D7010 v2" Ta CardBus
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.It Li "Billionton MIWLGRL" Ta mini-PCI
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.It Li "Canyon CN-WF511" Ta PCI
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.It Li "Canyon CN-WF513" Ta CardBus
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.It Li "CC&C WL-2102" Ta CardBus
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.It Li "CNet CWC-854" Ta CardBus
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.It Li "CNet CWP-854" Ta PCI
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.It Li "Compex WL54G" Ta CardBus
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.It Li "Compex WLP54G" Ta PCI
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.It Li "Conceptronic C54RC" Ta CardBus
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.It Li "Conceptronic C54Ri" Ta PCI
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.It Li "Digitus DN-7001G-RA" Ta CardBus
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.It Li "Digitus DN-7006G-RA" Ta PCI
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.It Li "E-Tech WGPC02" Ta CardBus
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.It Li "E-Tech WGPI02" Ta PCI
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.It Li "Edimax EW-7108PCg" Ta CardBus
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.It Li "Edimax EW-7128g" Ta PCI
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.It Li "Eminent EM3036" Ta CardBus
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.It Li "Eminent EM3037" Ta PCI
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.It Li "Encore ENLWI-G-RLAM" Ta PCI
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.It Li "Encore ENPWI-G-RLAM" Ta CardBus
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.It Li "Fiberline WL-400P" Ta PCI
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.It Li "Fibreline WL-400X" Ta CardBus
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.It Li "Gigabyte GN-WIKG" Ta mini-PCI
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.It Li "Gigabyte GN-WMKG" Ta CardBus
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.It Li "Gigabyte GN-WPKG" Ta PCI
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.It Li "Hawking HWC54GR" Ta CardBus
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.It Li "Hawking HWP54GR" Ta PCI
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.It Li "iNexQ CR054g-009 (R03)" Ta PCI
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.It Li "JAHT WN-4054P" Ta CardBus
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.It Li "JAHT WN-4054PCI" Ta PCI
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.It Li "LevelOne WNC-0301 v2" Ta PCI
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.It Li "LevelOne WPC-0301 v2" Ta CardBus
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.It Li "Linksys WMP54G v4" Ta PCI
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.It Li "Micronet SP906GK" Ta PCI
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.It Li "Micronet SP908GK V3" Ta CardBus
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||||
.It Li "Minitar MN54GCB-R" Ta CardBus
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.It Li "Minitar MN54GPC-R" Ta PCI
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||||
.It Li "MSI CB54G2" Ta CardBus
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||||
.It Li "MSI MP54G2" Ta mini-PCI
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||||
.It Li "MSI PC54G2" Ta PCI
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||||
.It Li "OvisLink EVO-W54PCI" Ta PCI
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||||
.It Li "PheeNet HWL-PCIG/RA" Ta PCI
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||||
.It Li "Pro-Nets CB80211G" Ta CardBus
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||||
.It Li "Pro-Nets PC80211G" Ta PCI
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.It Li "Repotec RP-WB7108" Ta CardBus
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||||
.It Li "Repotec RP-WP0854" Ta PCI
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||||
.It Li "SATech SN-54C" Ta CardBus
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||||
.It Li "SATech SN-54P" Ta PCI
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||||
.It Li "Sitecom WL-112" Ta CardBus
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||||
.It Li "Sitecom WL-115" Ta PCI
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||||
.It Li "SparkLAN WL-685R" Ta CardBus
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||||
.It Li "Surecom EP-9321-g" Ta PCI
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||||
.It Li "Surecom EP-9321-g1" Ta PCI
|
||||
.It Li "Surecom EP-9428-g" Ta CardBus
|
||||
.It Li "Sweex LC500050" Ta CardBus
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||||
.It Li "Sweex LC700030" Ta PCI
|
||||
.It Li "TekComm NE-9321-g" Ta PCI
|
||||
.It Li "TekComm NE-9428-g" Ta CardBus
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||||
.It Li "Unex CR054g-R02" Ta PCI
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||||
.It Li "Unex MR054g-R02" Ta CardBus
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||||
.It Li "Zinwell ZWX-G160" Ta CardBus
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||||
.It Li "Zinwell ZWX-G360" Ta mini-PCI
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||||
.It Li "Zinwell ZWX-G361" Ta PCI
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||||
.It Li "Zonet ZEW1500" Ta CardBus
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.It Li "Zonet ZEW1600" Ta PCI
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.El
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.Pp
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An up to date list can be found at
|
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.Pa http://damien.bergamini.free.fr/ral/list.html
|
||||
.Sh EXAMPLES
|
||||
Join an existing BSS network (ie: connect to an access point):
|
||||
.Pp
|
||||
.Dl "ifconfig ral0 inet 192.168.0.20 netmask 0xffffff00"
|
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.Pp
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||||
Join a specific BSS network with network name
|
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.Dq Li my_net :
|
||||
.Pp
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.Dl "ifconfig ral0 inet 192.168.0.20 netmask 0xffffff00 ssid my_net"
|
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.Pp
|
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Join a specific BSS network with 40bit WEP encryption:
|
||||
.Bd -literal -offset indent
|
||||
ifconfig ral0 inet 192.168.0.20 netmask 0xffffff00 ssid my_net \e
|
||||
wepmode on wepkey 0x1234567890
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.Ed
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.Pp
|
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Join a specific BSS network with 104bit WEP encryption:
|
||||
.Bd -literal -offset indent
|
||||
ifconfig ral0 inet 192.168.0.20 netmask 0xffffff00 ssid my_net \e
|
||||
wepmode on wepkey 0x01020304050607080910111213
|
||||
.Ed
|
||||
.Sh DIAGNOSTICS
|
||||
.Bl -diag
|
||||
.It "ral%d: device timeout"
|
||||
The driver will reset the hardware.
|
||||
This should not happen.
|
||||
.El
|
||||
.Sh SEE ALSO
|
||||
.Xr arp 4 ,
|
||||
.Xr cardbus 4 ,
|
||||
.Xr netintro 4 ,
|
||||
.Xr pci 4 ,
|
||||
.Xr wlan 4 ,
|
||||
.Xr ifconfig 8
|
||||
.Rs
|
||||
.%T Ralink Technology
|
||||
.%O http://www.ralinktech.com
|
||||
.Re
|
||||
.Sh AUTHORS
|
||||
The
|
||||
.Nm
|
||||
driver was written by
|
||||
.An Damien Bergamini Aq damien@freebsd.org .
|
||||
.Sh HISTORY
|
||||
The
|
||||
.Nm
|
||||
driver first appeared in
|
||||
.Ox 3.7 .
|
||||
.Sh CAVEATS
|
||||
PCI
|
||||
.Nm
|
||||
adapters seem to require a PCI 2.2 compliant motherboard and will likely not
|
||||
work with PCI 2.1 only motherboard.
|
118
share/man/man4/ural.4
Normal file
118
share/man/man4/ural.4
Normal file
@ -0,0 +1,118 @@
|
||||
.\" $FreeBSD$
|
||||
.\"
|
||||
.\" Copyright (c) 2005
|
||||
.\" Damien Bergamini <damien.bergamini@free.fr>
|
||||
.\"
|
||||
.\" Permission to use, copy, modify, and distribute this software for any
|
||||
.\" purpose with or without fee is hereby granted, provided that the above
|
||||
.\" copyright notice and this permission notice appear in all copies.
|
||||
.\"
|
||||
.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
.\"
|
||||
.Dd May 02, 2005
|
||||
.Os
|
||||
.Dt URAL 4
|
||||
.Sh NAME
|
||||
.Nm ural
|
||||
.Nd Ralink Technology RT2500USB IEEE 802.11 driver
|
||||
.Sh SYNOPSIS
|
||||
.Cd "device ehci"
|
||||
.Cd "device uhci"
|
||||
.Cd "device ohci"
|
||||
.Cd "device usb"
|
||||
.Cd "device ural"
|
||||
.Cd "device wlan"
|
||||
.Sh DESCRIPTION
|
||||
The
|
||||
.Nm
|
||||
driver supports USB 2.0 wireless adapters based on the RT2500USB chipset.
|
||||
.Pp
|
||||
The RT2500USB chipset consists of two integrated chips, a RT2570 MAC/BBP
|
||||
and a radio transceiver (the model of which depends on the card revision).
|
||||
.Pp
|
||||
The RT2522, RT2523, RT2524, RT2525, RT2525e and RT2526 radio transceivers
|
||||
operate in the 2.4GHz band (802.11b/g) whereas the RT5222 is a dual-band radio
|
||||
transceiver that can operate in the 2.4GHz and 5.2GHz bands (802.11a).
|
||||
.Sh HARDWARE
|
||||
The following adapters should work:
|
||||
.Pp
|
||||
.Bl -column -compact "Atlantis Land A02-PCM-W54" "Bus"
|
||||
.It Em "Card Bus"
|
||||
.It Li "AMIT WL532U" Ta USB
|
||||
.It Li "ASUS WL-167g" Ta USB
|
||||
.It Li "Buffalo WLI-U2-KG54-AI" Ta USB
|
||||
.It Li "CNet CWD-854" Ta USB
|
||||
.It Li "Compex WLU54G" Ta USB
|
||||
.It Li "Conceptronic C54RU" Ta USB
|
||||
.It Li "D-Link DWL-G122 b1" Ta USB
|
||||
.It Li "E-Tech WGUS02" Ta USB
|
||||
.It Li "Gigabyte GN-WBKG" Ta USB
|
||||
.It Li "Linksys WUSB54G v4" Ta USB
|
||||
.It Li "Linksys WUSB54GP v4" Ta USB
|
||||
.It Li "MSI MS-6861" Ta USB
|
||||
.It Li "MSI MS-6865" Ta USB
|
||||
.It Li "MSI MS-6869" Ta USB
|
||||
.It Li "Repotec RP-WU0402" Ta USB
|
||||
.It Li "Surecom EP-9001-g" Ta USB
|
||||
.El
|
||||
.Pp
|
||||
An up to date list can be found at
|
||||
.Pa http://damien.bergamini.free.fr/ral/list.html
|
||||
.Sh EXAMPLES
|
||||
Join an existing BSS network (ie: connect to an access point):
|
||||
.Pp
|
||||
.Dl "ifconfig ural0 inet 192.168.0.20 netmask 0xffffff00"
|
||||
.Pp
|
||||
Join a specific BSS network with network name
|
||||
.Dq Li my_net :
|
||||
.Pp
|
||||
.Dl "ifconfig ural0 inet 192.168.0.20 netmask 0xffffff00 ssid my_net"
|
||||
.Pp
|
||||
Join a specific BSS network with 40bit WEP encryption:
|
||||
.Bd -literal -offset indent
|
||||
ifconfig ural0 inet 192.168.0.20 netmask 0xffffff00 ssid my_net \e
|
||||
wepmode on wepkey 0x1234567890
|
||||
.Ed
|
||||
.Pp
|
||||
Join a specific BSS network with 104bit WEP encryption:
|
||||
.Bd -literal -offset indent
|
||||
ifconfig ural0 inet 192.168.0.20 netmask 0xffffff00 ssid my_net \e
|
||||
wepmode on wepkey 0x01020304050607080910111213
|
||||
.Ed
|
||||
.Sh DIAGNOSTICS
|
||||
.Bl -diag
|
||||
.It "ural%d: device timeout"
|
||||
The driver will reset the hardware.
|
||||
This should not happen.
|
||||
.El
|
||||
.Sh SEE ALSO
|
||||
.Xr arp 4 ,
|
||||
.Xr netintro 4 ,
|
||||
.Xr usb 4 ,
|
||||
.Xr wlan 4 ,
|
||||
.Xr ifconfig 8
|
||||
.Rs
|
||||
.%T Ralink Technology
|
||||
.%O http://www.ralinktech.com
|
||||
.Re
|
||||
.Sh AUTHORS
|
||||
The
|
||||
.Nm
|
||||
driver was written by
|
||||
.An Damien Bergamini Aq damien@freebsd.org .
|
||||
.Sh HISTORY
|
||||
The
|
||||
.Nm
|
||||
driver first appeared in
|
||||
.Ox 3.7 .
|
||||
.Sh CAVEATS
|
||||
.Pp
|
||||
The
|
||||
.Nm
|
||||
driver does not support automatic adaptation of the transmit speed.
|
@ -585,12 +585,14 @@ dev/ips/ips_commands.c optional ips
|
||||
dev/ips/ips_disk.c optional ips
|
||||
dev/ips/ips_ioctl.c optional ips
|
||||
dev/ips/ips_pci.c optional ips pci
|
||||
dev/ipw/if_ipw.c optional ipw
|
||||
dev/isp/isp.c optional isp
|
||||
dev/isp/isp_freebsd.c optional isp
|
||||
dev/isp/isp_pci.c optional isp pci
|
||||
dev/isp/isp_sbus.c optional isp sbus
|
||||
dev/isp/isp_target.c optional isp
|
||||
dev/ispfw/ispfw.c optional ispfw
|
||||
dev/iwi/if_iwi.c optional iwi
|
||||
dev/ixgb/if_ixgb.c optional ixgb
|
||||
dev/ixgb/ixgb_ee.c optional ixgb
|
||||
dev/ixgb/ixgb_hw.c optional ixgb
|
||||
@ -707,6 +709,10 @@ dev/puc/puc_pci.c optional puc pci
|
||||
dev/puc/puc_sbus.c optional puc fhc
|
||||
dev/puc/puc_sbus.c optional puc sbus
|
||||
dev/puc/pucdata.c optional puc pci
|
||||
dev/ral/if_ral.c optional ral
|
||||
dev/ral/if_ralrate.c optional ral
|
||||
dev/ral/if_ral_pccard.c optional ral pccard
|
||||
dev/ral/if_ral_pci.c optional ral pci
|
||||
dev/random/harvest.c standard
|
||||
dev/random/hash.c optional random
|
||||
dev/random/probe.c optional random
|
||||
@ -857,6 +863,7 @@ dev/usb/if_axe.c optional axe
|
||||
dev/usb/if_cdce.c optional cdce
|
||||
dev/usb/if_cue.c optional cue
|
||||
dev/usb/if_kue.c optional kue
|
||||
dev/usb/if_ural.c optional ural
|
||||
dev/usb/if_rue.c optional rue
|
||||
dev/usb/if_udav.c optional udav
|
||||
dev/usb/ohci.c optional ohci
|
||||
|
2195
sys/dev/ipw/if_ipw.c
Normal file
2195
sys/dev/ipw/if_ipw.c
Normal file
File diff suppressed because it is too large
Load Diff
361
sys/dev/ipw/if_ipwreg.h
Normal file
361
sys/dev/ipw/if_ipwreg.h
Normal file
@ -0,0 +1,361 @@
|
||||
/* $FreeBSD$ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2004, 2005
|
||||
* Damien Bergamini <damien.bergamini@free.fr>. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice unmodified, this list of conditions, and the following
|
||||
* disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#define IPW_NTBD 128
|
||||
#define IPW_TBD_SZ (IPW_NTBD * sizeof (struct ipw_bd))
|
||||
#define IPW_NDATA (IPW_NTBD / 2)
|
||||
#define IPW_NRBD 128
|
||||
#define IPW_RBD_SZ (IPW_NRBD * sizeof (struct ipw_bd))
|
||||
#define IPW_STATUS_SZ (IPW_NRBD * sizeof (struct ipw_status))
|
||||
|
||||
#define IPW_CSR_INTR 0x0008
|
||||
#define IPW_CSR_INTR_MASK 0x000c
|
||||
#define IPW_CSR_INDIRECT_ADDR 0x0010
|
||||
#define IPW_CSR_INDIRECT_DATA 0x0014
|
||||
#define IPW_CSR_AUTOINC_ADDR 0x0018
|
||||
#define IPW_CSR_AUTOINC_DATA 0x001c
|
||||
#define IPW_CSR_RST 0x0020
|
||||
#define IPW_CSR_CTL 0x0024
|
||||
#define IPW_CSR_IO 0x0030
|
||||
#define IPW_CSR_TX_BASE 0x0200
|
||||
#define IPW_CSR_TX_SIZE 0x0204
|
||||
#define IPW_CSR_RX_BASE 0x0240
|
||||
#define IPW_CSR_STATUS_BASE 0x0244
|
||||
#define IPW_CSR_RX_SIZE 0x0248
|
||||
#define IPW_CSR_TX_READ 0x0280
|
||||
#define IPW_CSR_RX_READ 0x02a0
|
||||
#define IPW_CSR_TABLE1_BASE 0x0380
|
||||
#define IPW_CSR_TABLE2_BASE 0x0384
|
||||
#define IPW_CSR_TX_WRITE 0x0f80
|
||||
#define IPW_CSR_RX_WRITE 0x0fa0
|
||||
|
||||
/* possible flags for register IPW_CSR_INTR */
|
||||
#define IPW_INTR_TX_TRANSFER 0x00000001
|
||||
#define IPW_INTR_RX_TRANSFER 0x00000002
|
||||
#define IPW_INTR_STATUS_CHANGE 0x00000010
|
||||
#define IPW_INTR_COMMAND_DONE 0x00010000
|
||||
#define IPW_INTR_FW_INIT_DONE 0x01000000
|
||||
#define IPW_INTR_FATAL_ERROR 0x40000000
|
||||
#define IPW_INTR_PARITY_ERROR 0x80000000
|
||||
|
||||
#define IPW_INTR_MASK \
|
||||
(IPW_INTR_TX_TRANSFER | IPW_INTR_RX_TRANSFER | \
|
||||
IPW_INTR_STATUS_CHANGE | IPW_INTR_COMMAND_DONE | \
|
||||
IPW_INTR_FW_INIT_DONE | IPW_INTR_FATAL_ERROR | \
|
||||
IPW_INTR_PARITY_ERROR)
|
||||
|
||||
/* possible flags for register IPW_CSR_RST */
|
||||
#define IPW_RST_PRINCETON_RESET 0x00000001
|
||||
#define IPW_RST_SW_RESET 0x00000080
|
||||
#define IPW_RST_MASTER_DISABLED 0x00000100
|
||||
#define IPW_RST_STOP_MASTER 0x00000200
|
||||
|
||||
/* possible flags for register IPW_CSR_CTL */
|
||||
#define IPW_CTL_CLOCK_READY 0x00000001
|
||||
#define IPW_CTL_ALLOW_STANDBY 0x00000002
|
||||
#define IPW_CTL_INIT 0x00000004
|
||||
|
||||
/* possible flags for register IPW_CSR_IO */
|
||||
#define IPW_IO_GPIO1_ENABLE 0x00000008
|
||||
#define IPW_IO_GPIO1_MASK 0x0000000c
|
||||
#define IPW_IO_GPIO3_MASK 0x000000c0
|
||||
#define IPW_IO_LED_OFF 0x00002000
|
||||
#define IPW_IO_RADIO_DISABLED 0x00010000
|
||||
|
||||
#define IPW_STATE_ASSOCIATED 0x0004
|
||||
#define IPW_STATE_ASSOCIATION_LOST 0x0008
|
||||
#define IPW_STATE_SCAN_COMPLETE 0x0020
|
||||
#define IPW_STATE_RADIO_DISABLED 0x0100
|
||||
#define IPW_STATE_DISABLED 0x0200
|
||||
#define IPW_STATE_SCANNING 0x0800
|
||||
|
||||
/* table1 offsets */
|
||||
#define IPW_INFO_LOCK 480
|
||||
#define IPW_INFO_APS_CNT 604
|
||||
#define IPW_INFO_APS_BASE 608
|
||||
#define IPW_INFO_CARD_DISABLED 628
|
||||
#define IPW_INFO_CURRENT_CHANNEL 756
|
||||
#define IPW_INFO_CURRENT_TX_RATE 768
|
||||
|
||||
/* table2 offsets */
|
||||
#define IPW_INFO_CURRENT_SSID 48
|
||||
#define IPW_INFO_CURRENT_BSSID 112
|
||||
|
||||
/* supported rates */
|
||||
#define IPW_RATE_DS1 1
|
||||
#define IPW_RATE_DS2 2
|
||||
#define IPW_RATE_DS5 4
|
||||
#define IPW_RATE_DS11 8
|
||||
|
||||
/* firmware binary image header */
|
||||
struct ipw_firmware_hdr {
|
||||
u_int32_t version;
|
||||
u_int32_t main_size; /* firmware size */
|
||||
u_int32_t ucode_size; /* microcode size */
|
||||
} __packed;
|
||||
|
||||
/* buffer descriptor */
|
||||
struct ipw_bd {
|
||||
u_int32_t physaddr;
|
||||
u_int32_t len;
|
||||
u_int8_t flags;
|
||||
#define IPW_BD_FLAG_TX_FRAME_802_3 0x00
|
||||
#define IPW_BD_FLAG_TX_NOT_LAST_FRAGMENT 0x01
|
||||
#define IPW_BD_FLAG_TX_FRAME_COMMAND 0x02
|
||||
#define IPW_BD_FLAG_TX_FRAME_802_11 0x04
|
||||
#define IPW_BD_FLAG_TX_LAST_FRAGMENT 0x08
|
||||
u_int8_t nfrag; /* number of fragments */
|
||||
u_int8_t reserved[6];
|
||||
} __packed;
|
||||
|
||||
/* status */
|
||||
struct ipw_status {
|
||||
u_int32_t len;
|
||||
u_int16_t code;
|
||||
#define IPW_STATUS_CODE_COMMAND 0
|
||||
#define IPW_STATUS_CODE_NEWSTATE 1
|
||||
#define IPW_STATUS_CODE_DATA_802_11 2
|
||||
#define IPW_STATUS_CODE_DATA_802_3 3
|
||||
#define IPW_STATUS_CODE_NOTIFICATION 4
|
||||
u_int8_t flags;
|
||||
#define IPW_STATUS_FLAG_DECRYPTED 0x01
|
||||
#define IPW_STATUS_FLAG_WEP_ENCRYPTED 0x02
|
||||
u_int8_t rssi; /* received signal strength indicator */
|
||||
} __packed;
|
||||
|
||||
/* data header */
|
||||
struct ipw_hdr {
|
||||
u_int32_t type;
|
||||
#define IPW_HDR_TYPE_SEND 33
|
||||
u_int32_t subtype;
|
||||
u_int8_t encrypted;
|
||||
u_int8_t encrypt;
|
||||
u_int8_t keyidx;
|
||||
u_int8_t keysz;
|
||||
u_int8_t key[IEEE80211_KEYBUF_SIZE];
|
||||
u_int8_t reserved[10];
|
||||
u_int8_t src_addr[IEEE80211_ADDR_LEN];
|
||||
u_int8_t dst_addr[IEEE80211_ADDR_LEN];
|
||||
u_int16_t fragmentsz;
|
||||
} __packed;
|
||||
|
||||
/* command */
|
||||
struct ipw_cmd {
|
||||
u_int32_t type;
|
||||
#define IPW_CMD_ENABLE 2
|
||||
#define IPW_CMD_SET_CONFIGURATION 6
|
||||
#define IPW_CMD_SET_ESSID 8
|
||||
#define IPW_CMD_SET_MANDATORY_BSSID 9
|
||||
#define IPW_CMD_SET_MAC_ADDRESS 11
|
||||
#define IPW_CMD_SET_MODE 12
|
||||
#define IPW_CMD_SET_CHANNEL 14
|
||||
#define IPW_CMD_SET_RTS_THRESHOLD 15
|
||||
#define IPW_CMD_SET_FRAG_THRESHOLD 16
|
||||
#define IPW_CMD_SET_POWER_MODE 17
|
||||
#define IPW_CMD_SET_TX_RATES 18
|
||||
#define IPW_CMD_SET_BASIC_TX_RATES 19
|
||||
#define IPW_CMD_SET_WEP_KEY 20
|
||||
#define IPW_CMD_SET_WEP_KEY_INDEX 25
|
||||
#define IPW_CMD_SET_WEP_FLAGS 26
|
||||
#define IPW_CMD_ADD_MULTICAST 27
|
||||
#define IPW_CMD_SET_BEACON_INTERVAL 29
|
||||
#define IPW_CMD_SET_TX_POWER_INDEX 36
|
||||
#define IPW_CMD_BROADCAST_SCAN 43
|
||||
#define IPW_CMD_DISABLE 44
|
||||
#define IPW_CMD_SET_DESIRED_BSSID 45
|
||||
#define IPW_CMD_SET_SCAN_OPTIONS 46
|
||||
#define IPW_CMD_PREPARE_POWER_DOWN 58
|
||||
#define IPW_CMD_DISABLE_PHY 61
|
||||
#define IPW_CMD_SET_SECURITY_INFORMATION 67
|
||||
#define IPW_CMD_SET_WPA_IE 69
|
||||
u_int32_t subtype;
|
||||
u_int32_t seq;
|
||||
u_int32_t len;
|
||||
u_int8_t data[400];
|
||||
u_int32_t status;
|
||||
u_int8_t reserved[68];
|
||||
} __packed;
|
||||
|
||||
/* possible values for command IPW_CMD_SET_POWER_MODE */
|
||||
#define IPW_POWER_MODE_CAM 0
|
||||
#define IPW_POWER_AUTOMATIC 6
|
||||
|
||||
/* possible values for command IPW_CMD_SET_MODE */
|
||||
#define IPW_MODE_BSS 0
|
||||
#define IPW_MODE_IBSS 1
|
||||
#define IPW_MODE_MONITOR 2
|
||||
|
||||
/* possible flags for command IPW_CMD_SET_WEP_FLAGS */
|
||||
#define IPW_WEPON 0x8
|
||||
|
||||
/* structure for command IPW_CMD_SET_WEP_KEY */
|
||||
struct ipw_wep_key {
|
||||
u_int8_t idx;
|
||||
u_int8_t len;
|
||||
u_int8_t key[13];
|
||||
} __packed;
|
||||
|
||||
/* structure for command IPW_CMD_SET_SECURITY_INFORMATION */
|
||||
struct ipw_security {
|
||||
u_int32_t ciphers;
|
||||
#define IPW_CIPHER_NONE 0x00000001
|
||||
#define IPW_CIPHER_WEP40 0x00000002
|
||||
#define IPW_CIPHER_TKIP 0x00000004
|
||||
#define IPW_CIPHER_CCMP 0x00000010
|
||||
#define IPW_CIPHER_WEP104 0x00000020
|
||||
#define IPW_CIPHER_CKIP 0x00000040
|
||||
u_int16_t reserved1;
|
||||
u_int8_t authmode;
|
||||
#define IPW_AUTH_OPEN 0
|
||||
#define IPW_AUTH_SHARED 1
|
||||
u_int16_t reserved2;
|
||||
} __packed;
|
||||
|
||||
/* structure for command IPW_CMD_SET_SCAN_OPTIONS */
|
||||
struct ipw_scan_options {
|
||||
u_int32_t flags;
|
||||
#define IPW_SCAN_DO_NOT_ASSOCIATE 0x00000001
|
||||
#define IPW_SCAN_PASSIVE 0x00000008
|
||||
u_int32_t channels;
|
||||
} __packed;
|
||||
|
||||
/* structure for command IPW_CMD_SET_CONFIGURATION */
|
||||
struct ipw_configuration {
|
||||
u_int32_t flags;
|
||||
#define IPW_CFG_PROMISCUOUS 0x00000004
|
||||
#define IPW_CFG_PREAMBLE_AUTO 0x00000010
|
||||
#define IPW_CFG_IBSS_AUTO_START 0x00000020
|
||||
#define IPW_CFG_802_1x_ENABLE 0x00004000
|
||||
#define IPW_CFG_BSS_MASK 0x00008000
|
||||
#define IPW_CFG_IBSS_MASK 0x00010000
|
||||
u_int32_t bss_chan;
|
||||
u_int32_t ibss_chan;
|
||||
} __packed;
|
||||
|
||||
/* structure for command IPW_CMD_SET_WPA_IE */
|
||||
struct ipw_wpa_ie {
|
||||
u_int16_t mask;
|
||||
u_int16_t capinfo;
|
||||
u_int16_t lintval;
|
||||
u_int8_t bssid[IEEE80211_ADDR_LEN];
|
||||
u_int32_t len;
|
||||
struct ieee80211_ie_wpa ie;
|
||||
} __packed;
|
||||
|
||||
/* element in AP table */
|
||||
struct ipw_node {
|
||||
u_int32_t reserved1[2];
|
||||
u_int8_t bssid[IEEE80211_ADDR_LEN];
|
||||
u_int8_t chan;
|
||||
u_int8_t rates;
|
||||
u_int16_t reserved2;
|
||||
u_int16_t capinfo;
|
||||
u_int16_t reserved3;
|
||||
u_int16_t intval;
|
||||
u_int8_t reserved4[28];
|
||||
u_int8_t essid[IEEE80211_NWID_LEN];
|
||||
u_int16_t reserved5;
|
||||
u_int8_t esslen;
|
||||
u_int8_t reserved6[7];
|
||||
u_int8_t rssi;
|
||||
} __packed;
|
||||
|
||||
/* EEPROM = Electrically Erasable Programmable Read-Only Memory */
|
||||
|
||||
#define IPW_MEM_EEPROM_CTL 0x00300040
|
||||
|
||||
#define IPW_EEPROM_RADIO 0x11
|
||||
#define IPW_EEPROM_MAC 0x21
|
||||
#define IPW_EEPROM_CHANNEL_LIST 0x37
|
||||
|
||||
#define IPW_EEPROM_DELAY 1 /* minimum hold time (microsecond) */
|
||||
|
||||
#define IPW_EEPROM_C (1 << 0) /* Serial Clock */
|
||||
#define IPW_EEPROM_S (1 << 1) /* Chip Select */
|
||||
#define IPW_EEPROM_D (1 << 2) /* Serial data input */
|
||||
#define IPW_EEPROM_Q (1 << 4) /* Serial data output */
|
||||
|
||||
#define IPW_EEPROM_SHIFT_D 2
|
||||
#define IPW_EEPROM_SHIFT_Q 4
|
||||
|
||||
/*
|
||||
* control and status registers access macros
|
||||
*/
|
||||
#define CSR_READ_1(sc, reg) \
|
||||
bus_space_read_1((sc)->sc_st, (sc)->sc_sh, (reg))
|
||||
|
||||
#define CSR_READ_2(sc, reg) \
|
||||
bus_space_read_2((sc)->sc_st, (sc)->sc_sh, (reg))
|
||||
|
||||
#define CSR_READ_4(sc, reg) \
|
||||
bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg))
|
||||
|
||||
#define CSR_WRITE_1(sc, reg, val) \
|
||||
bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val))
|
||||
|
||||
#define CSR_WRITE_2(sc, reg, val) \
|
||||
bus_space_write_2((sc)->sc_st, (sc)->sc_sh, (reg), (val))
|
||||
|
||||
#define CSR_WRITE_4(sc, reg, val) \
|
||||
bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))
|
||||
|
||||
#define CSR_WRITE_MULTI_1(sc, reg, buf, len) \
|
||||
bus_space_write_multi_1((sc)->sc_st, (sc)->sc_sh, (reg), \
|
||||
(buf), (len))
|
||||
|
||||
/*
|
||||
* indirect memory space access macros
|
||||
*/
|
||||
#define MEM_WRITE_1(sc, addr, val) do { \
|
||||
CSR_WRITE_4((sc), IPW_CSR_INDIRECT_ADDR, (addr)); \
|
||||
CSR_WRITE_1((sc), IPW_CSR_INDIRECT_DATA, (val)); \
|
||||
} while (/* CONSTCOND */0)
|
||||
|
||||
#define MEM_WRITE_2(sc, addr, val) do { \
|
||||
CSR_WRITE_4((sc), IPW_CSR_INDIRECT_ADDR, (addr)); \
|
||||
CSR_WRITE_2((sc), IPW_CSR_INDIRECT_DATA, (val)); \
|
||||
} while (/* CONSTCOND */0)
|
||||
|
||||
#define MEM_WRITE_4(sc, addr, val) do { \
|
||||
CSR_WRITE_4((sc), IPW_CSR_INDIRECT_ADDR, (addr)); \
|
||||
CSR_WRITE_4((sc), IPW_CSR_INDIRECT_DATA, (val)); \
|
||||
} while (/* CONSTCOND */0)
|
||||
|
||||
#define MEM_WRITE_MULTI_1(sc, addr, buf, len) do { \
|
||||
CSR_WRITE_4((sc), IPW_CSR_INDIRECT_ADDR, (addr)); \
|
||||
CSR_WRITE_MULTI_1((sc), IPW_CSR_INDIRECT_DATA, (buf), (len)); \
|
||||
} while (/* CONSTCOND */0)
|
||||
|
||||
/*
|
||||
* EEPROM access macro
|
||||
*/
|
||||
#define IPW_EEPROM_CTL(sc, val) do { \
|
||||
MEM_WRITE_4((sc), IPW_MEM_EEPROM_CTL, (val)); \
|
||||
DELAY(IPW_EEPROM_DELAY); \
|
||||
} while (0)
|
173
sys/dev/ipw/if_ipwvar.h
Normal file
173
sys/dev/ipw/if_ipwvar.h
Normal file
@ -0,0 +1,173 @@
|
||||
/* $FreeBSD$ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2004, 2005
|
||||
* Damien Bergamini <damien.bergamini@free.fr>. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice unmodified, this list of conditions, and the following
|
||||
* disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
struct ipw_firmware {
|
||||
void *main;
|
||||
int main_size;
|
||||
void *ucode;
|
||||
int ucode_size;
|
||||
};
|
||||
|
||||
#define IPW_MAX_NSEG 1
|
||||
|
||||
struct ipw_soft_bd {
|
||||
struct ipw_bd *bd;
|
||||
int type;
|
||||
#define IPW_SBD_TYPE_NOASSOC 0
|
||||
#define IPW_SBD_TYPE_COMMAND 1
|
||||
#define IPW_SBD_TYPE_HEADER 2
|
||||
#define IPW_SBD_TYPE_DATA 3
|
||||
void *priv;
|
||||
};
|
||||
|
||||
struct ipw_soft_hdr {
|
||||
struct ipw_hdr hdr;
|
||||
bus_dmamap_t map;
|
||||
SLIST_ENTRY(ipw_soft_hdr) next;
|
||||
};
|
||||
|
||||
struct ipw_soft_buf {
|
||||
struct mbuf *m;
|
||||
struct ieee80211_node *ni;
|
||||
bus_dmamap_t map;
|
||||
SLIST_ENTRY(ipw_soft_buf) next;
|
||||
};
|
||||
|
||||
struct ipw_rx_radiotap_header {
|
||||
struct ieee80211_radiotap_header wr_ihdr;
|
||||
uint8_t wr_flags;
|
||||
uint16_t wr_chan_freq;
|
||||
uint16_t wr_chan_flags;
|
||||
uint8_t wr_antsignal;
|
||||
};
|
||||
|
||||
#define IPW_RX_RADIOTAP_PRESENT \
|
||||
((1 << IEEE80211_RADIOTAP_FLAGS) | \
|
||||
(1 << IEEE80211_RADIOTAP_CHANNEL) | \
|
||||
(1 << IEEE80211_RADIOTAP_DB_ANTSIGNAL))
|
||||
|
||||
struct ipw_tx_radiotap_header {
|
||||
struct ieee80211_radiotap_header wt_ihdr;
|
||||
uint8_t wt_flags;
|
||||
uint16_t wt_chan_freq;
|
||||
uint16_t wt_chan_flags;
|
||||
};
|
||||
|
||||
#define IPW_TX_RADIOTAP_PRESENT \
|
||||
((1 << IEEE80211_RADIOTAP_FLAGS) | \
|
||||
(1 << IEEE80211_RADIOTAP_CHANNEL))
|
||||
|
||||
struct ipw_softc {
|
||||
struct arpcom sc_arp;
|
||||
struct ieee80211com sc_ic;
|
||||
int (*sc_newstate)(struct ieee80211com *,
|
||||
enum ieee80211_state, int);
|
||||
device_t sc_dev;
|
||||
|
||||
struct mtx sc_mtx;
|
||||
|
||||
struct ipw_firmware fw;
|
||||
uint32_t flags;
|
||||
#define IPW_FLAG_FW_CACHED (1 << 0)
|
||||
#define IPW_FLAG_FW_INITED (1 << 1)
|
||||
#define IPW_FLAG_HAS_RADIO_SWITCH (1 << 2)
|
||||
|
||||
int irq_rid;
|
||||
int mem_rid;
|
||||
struct resource *irq;
|
||||
struct resource *mem;
|
||||
bus_space_tag_t sc_st;
|
||||
bus_space_handle_t sc_sh;
|
||||
void *sc_ih;
|
||||
|
||||
int sc_tx_timer;
|
||||
|
||||
bus_dma_tag_t tbd_dmat;
|
||||
bus_dma_tag_t rbd_dmat;
|
||||
bus_dma_tag_t status_dmat;
|
||||
bus_dma_tag_t cmd_dmat;
|
||||
bus_dma_tag_t hdr_dmat;
|
||||
bus_dma_tag_t txbuf_dmat;
|
||||
bus_dma_tag_t rxbuf_dmat;
|
||||
|
||||
bus_dmamap_t tbd_map;
|
||||
bus_dmamap_t rbd_map;
|
||||
bus_dmamap_t status_map;
|
||||
bus_dmamap_t cmd_map;
|
||||
|
||||
bus_addr_t tbd_phys;
|
||||
bus_addr_t rbd_phys;
|
||||
bus_addr_t status_phys;
|
||||
|
||||
struct ipw_bd *tbd_list;
|
||||
struct ipw_bd *rbd_list;
|
||||
struct ipw_status *status_list;
|
||||
|
||||
struct ipw_cmd cmd;
|
||||
struct ipw_soft_bd stbd_list[IPW_NTBD];
|
||||
struct ipw_soft_buf tx_sbuf_list[IPW_NDATA];
|
||||
struct ipw_soft_hdr shdr_list[IPW_NDATA];
|
||||
struct ipw_soft_bd srbd_list[IPW_NRBD];
|
||||
struct ipw_soft_buf rx_sbuf_list[IPW_NRBD];
|
||||
|
||||
SLIST_HEAD(, ipw_soft_hdr) free_shdr;
|
||||
SLIST_HEAD(, ipw_soft_buf) free_sbuf;
|
||||
|
||||
uint32_t table1_base;
|
||||
uint32_t table2_base;
|
||||
|
||||
uint32_t txcur;
|
||||
uint32_t txold;
|
||||
uint32_t rxcur;
|
||||
int txfree;
|
||||
|
||||
int dwelltime;
|
||||
|
||||
struct bpf_if *sc_drvbpf;
|
||||
|
||||
union {
|
||||
struct ipw_rx_radiotap_header th;
|
||||
uint8_t pad[64];
|
||||
} sc_rxtapu;
|
||||
#define sc_rxtap sc_rxtapu.th
|
||||
int sc_rxtap_len;
|
||||
|
||||
union {
|
||||
struct ipw_tx_radiotap_header th;
|
||||
uint8_t pad[64];
|
||||
} sc_txtapu;
|
||||
#define sc_txtap sc_txtapu.th
|
||||
int sc_txtap_len;
|
||||
};
|
||||
|
||||
#define SIOCSLOADFW _IOW('i', 137, struct ifreq)
|
||||
#define SIOCSKILLFW _IOW('i', 138, struct ifreq)
|
||||
|
||||
#define IPW_LOCK(sc) mtx_lock(&(sc)->sc_mtx)
|
||||
#define IPW_UNLOCK(sc) mtx_unlock(&(sc)->sc_mtx)
|
2223
sys/dev/iwi/if_iwi.c
Normal file
2223
sys/dev/iwi/if_iwi.c
Normal file
File diff suppressed because it is too large
Load Diff
439
sys/dev/iwi/if_iwireg.h
Normal file
439
sys/dev/iwi/if_iwireg.h
Normal file
@ -0,0 +1,439 @@
|
||||
/* $FreeBSD$ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2004, 2005
|
||||
* Damien Bergamini <damien.bergamini@free.fr>. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice unmodified, this list of conditions, and the following
|
||||
* disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#define IWI_CMD_RING_COUNT 16
|
||||
#define IWI_TX_RING_COUNT 64
|
||||
#define IWI_RX_RING_COUNT 32
|
||||
|
||||
#define IWI_TX_DESC_SIZE (sizeof (struct iwi_tx_desc))
|
||||
#define IWI_CMD_DESC_SIZE (sizeof (struct iwi_cmd_desc))
|
||||
|
||||
#define IWI_CSR_INTR 0x0008
|
||||
#define IWI_CSR_INTR_MASK 0x000c
|
||||
#define IWI_CSR_INDIRECT_ADDR 0x0010
|
||||
#define IWI_CSR_INDIRECT_DATA 0x0014
|
||||
#define IWI_CSR_AUTOINC_ADDR 0x0018
|
||||
#define IWI_CSR_AUTOINC_DATA 0x001c
|
||||
#define IWI_CSR_RST 0x0020
|
||||
#define IWI_CSR_CTL 0x0024
|
||||
#define IWI_CSR_IO 0x0030
|
||||
#define IWI_CSR_CMD_BASE 0x0200
|
||||
#define IWI_CSR_CMD_SIZE 0x0204
|
||||
#define IWI_CSR_TX1_BASE 0x0208
|
||||
#define IWI_CSR_TX1_SIZE 0x020c
|
||||
#define IWI_CSR_TX2_BASE 0x0210
|
||||
#define IWI_CSR_TX2_SIZE 0x0214
|
||||
#define IWI_CSR_TX3_BASE 0x0218
|
||||
#define IWI_CSR_TX3_SIZE 0x021c
|
||||
#define IWI_CSR_TX4_BASE 0x0220
|
||||
#define IWI_CSR_TX4_SIZE 0x0224
|
||||
#define IWI_CSR_CMD_RIDX 0x0280
|
||||
#define IWI_CSR_TX1_RIDX 0x0284
|
||||
#define IWI_CSR_TX2_RIDX 0x0288
|
||||
#define IWI_CSR_TX3_RIDX 0x028c
|
||||
#define IWI_CSR_TX4_RIDX 0x0290
|
||||
#define IWI_CSR_RX_RIDX 0x02a0
|
||||
#define IWI_CSR_RX_BASE 0x0500
|
||||
#define IWI_CSR_TABLE0_SIZE 0x0700
|
||||
#define IWI_CSR_TABLE0_BASE 0x0704
|
||||
#define IWI_CSR_CMD_WIDX 0x0f80
|
||||
#define IWI_CSR_TX1_WIDX 0x0f84
|
||||
#define IWI_CSR_TX2_WIDX 0x0f88
|
||||
#define IWI_CSR_TX3_WIDX 0x0f8c
|
||||
#define IWI_CSR_TX4_WIDX 0x0f90
|
||||
#define IWI_CSR_RX_WIDX 0x0fa0
|
||||
#define IWI_CSR_READ_INT 0x0ff4
|
||||
|
||||
/* aliases */
|
||||
#define IWI_CSR_CURRENT_TX_RATE IWI_CSR_TABLE0_BASE
|
||||
|
||||
/* flags for IWI_CSR_INTR */
|
||||
#define IWI_INTR_RX_DONE 0x00000002
|
||||
#define IWI_INTR_CMD_DONE 0x00000800
|
||||
#define IWI_INTR_TX1_DONE 0x00001000
|
||||
#define IWI_INTR_TX2_DONE 0x00002000
|
||||
#define IWI_INTR_TX3_DONE 0x00004000
|
||||
#define IWI_INTR_TX4_DONE 0x00008000
|
||||
#define IWI_INTR_FW_INITED 0x01000000
|
||||
#define IWI_INTR_RADIO_OFF 0x04000000
|
||||
#define IWI_INTR_FATAL_ERROR 0x40000000
|
||||
#define IWI_INTR_PARITY_ERROR 0x80000000
|
||||
|
||||
#define IWI_INTR_MASK \
|
||||
(IWI_INTR_RX_DONE | IWI_INTR_CMD_DONE | IWI_INTR_TX1_DONE | \
|
||||
IWI_INTR_TX2_DONE | IWI_INTR_TX3_DONE | IWI_INTR_TX4_DONE | \
|
||||
IWI_INTR_FW_INITED | IWI_INTR_RADIO_OFF | \
|
||||
IWI_INTR_FATAL_ERROR | IWI_INTR_PARITY_ERROR)
|
||||
|
||||
/* flags for IWI_CSR_RST */
|
||||
#define IWI_RST_PRINCETON_RESET 0x00000001
|
||||
#define IWI_RST_SOFT_RESET 0x00000080
|
||||
#define IWI_RST_MASTER_DISABLED 0x00000100
|
||||
#define IWI_RST_STOP_MASTER 0x00000200
|
||||
|
||||
/* flags for IWI_CSR_CTL */
|
||||
#define IWI_CTL_CLOCK_READY 0x00000001
|
||||
#define IWI_CTL_ALLOW_STANDBY 0x00000002
|
||||
#define IWI_CTL_INIT 0x00000004
|
||||
|
||||
/* flags for IWI_CSR_IO */
|
||||
#define IWI_IO_RADIO_ENABLED 0x00010000
|
||||
|
||||
/* flags for IWI_CSR_READ_INT */
|
||||
#define IWI_READ_INT_INIT_HOST 0x20000000
|
||||
|
||||
/* constants for command blocks */
|
||||
#define IWI_CB_DEFAULT_CTL 0x8cea0000
|
||||
#define IWI_CB_MAXDATALEN 8191
|
||||
|
||||
/* supported rates */
|
||||
#define IWI_RATE_DS1 10
|
||||
#define IWI_RATE_DS2 20
|
||||
#define IWI_RATE_DS5 55
|
||||
#define IWI_RATE_DS11 110
|
||||
#define IWI_RATE_OFDM6 13
|
||||
#define IWI_RATE_OFDM9 15
|
||||
#define IWI_RATE_OFDM12 5
|
||||
#define IWI_RATE_OFDM18 7
|
||||
#define IWI_RATE_OFDM24 9
|
||||
#define IWI_RATE_OFDM36 11
|
||||
#define IWI_RATE_OFDM48 1
|
||||
#define IWI_RATE_OFDM54 3
|
||||
|
||||
struct iwi_hdr {
|
||||
uint8_t type;
|
||||
#define IWI_HDR_TYPE_DATA 0
|
||||
#define IWI_HDR_TYPE_COMMAND 1
|
||||
#define IWI_HDR_TYPE_NOTIF 3
|
||||
#define IWI_HDR_TYPE_FRAME 9
|
||||
|
||||
uint8_t seq;
|
||||
uint8_t flags;
|
||||
#define IWI_HDR_FLAG_IRQ 0x04
|
||||
|
||||
uint8_t reserved;
|
||||
} __packed;
|
||||
|
||||
struct iwi_notif {
|
||||
uint32_t reserved[2];
|
||||
uint8_t type;
|
||||
#define IWI_NOTIF_TYPE_ASSOCIATION 10
|
||||
#define IWI_NOTIF_TYPE_AUTHENTICATION 11
|
||||
#define IWI_NOTIF_TYPE_SCAN_CHANNEL 12
|
||||
#define IWI_NOTIF_TYPE_SCAN_COMPLETE 13
|
||||
#define IWI_NOTIF_TYPE_BEACON 17
|
||||
#define IWI_NOTIF_TYPE_CALIBRATION 20
|
||||
#define IWI_NOTIF_TYPE_NOISE 25
|
||||
|
||||
uint8_t flags;
|
||||
uint16_t len;
|
||||
} __packed;
|
||||
|
||||
/* structure for notification IWI_NOTIF_TYPE_AUTHENTICATION */
|
||||
struct iwi_notif_authentication {
|
||||
uint8_t state;
|
||||
#define IWI_DEAUTHENTICATED 0
|
||||
#define IWI_AUTHENTICATED 9
|
||||
} __packed;
|
||||
|
||||
/* structure for notification IWI_NOTIF_TYPE_ASSOCIATION */
|
||||
struct iwi_notif_association {
|
||||
uint8_t state;
|
||||
#define IWI_DEASSOCIATED 0
|
||||
#define IWI_ASSOCIATED 12
|
||||
|
||||
struct ieee80211_frame frame;
|
||||
uint16_t capinfo;
|
||||
uint16_t status;
|
||||
uint16_t associd;
|
||||
} __packed;
|
||||
|
||||
/* structure for notification IWI_NOTIF_TYPE_SCAN_CHANNEL */
|
||||
struct iwi_notif_scan_channel {
|
||||
uint8_t nchan;
|
||||
uint8_t reserved[47];
|
||||
} __packed;
|
||||
|
||||
/* structure for notification IWI_NOTIF_TYPE_SCAN_COMPLETE */
|
||||
struct iwi_notif_scan_complete {
|
||||
uint8_t type;
|
||||
uint8_t nchan;
|
||||
uint8_t status;
|
||||
uint8_t reserved;
|
||||
} __packed;
|
||||
|
||||
/* received frame header */
|
||||
struct iwi_frame {
|
||||
uint32_t reserved1[2];
|
||||
uint8_t chan;
|
||||
uint8_t status;
|
||||
uint8_t rate;
|
||||
uint8_t rssi;
|
||||
uint8_t agc;
|
||||
uint8_t rssi_dbm;
|
||||
uint16_t signal;
|
||||
uint16_t noise;
|
||||
uint8_t antenna;
|
||||
uint8_t control;
|
||||
uint8_t reserved2[2];
|
||||
uint16_t len;
|
||||
} __packed;
|
||||
|
||||
/* header for transmission */
|
||||
struct iwi_tx_desc {
|
||||
struct iwi_hdr hdr;
|
||||
uint32_t reserved1;
|
||||
uint8_t station;
|
||||
uint8_t reserved2[3];
|
||||
uint8_t cmd;
|
||||
#define IWI_DATA_CMD_TX 0x0b
|
||||
|
||||
uint8_t seq;
|
||||
uint16_t len;
|
||||
uint8_t priority;
|
||||
uint8_t flags;
|
||||
#define IWI_DATA_FLAG_SHPREAMBLE 0x04
|
||||
#define IWI_DATA_FLAG_NO_WEP 0x20
|
||||
#define IWI_DATA_FLAG_NEED_ACK 0x80
|
||||
|
||||
uint8_t xflags;
|
||||
uint8_t wep_txkey;
|
||||
uint8_t wepkey[IEEE80211_KEYBUF_SIZE];
|
||||
uint8_t rate;
|
||||
uint8_t antenna;
|
||||
uint8_t reserved3[10];
|
||||
struct ieee80211_qosframe_addr4 wh;
|
||||
uint32_t iv;
|
||||
uint32_t eiv;
|
||||
uint32_t nseg;
|
||||
#define IWI_MAX_NSEG 6
|
||||
|
||||
uint32_t seg_addr[IWI_MAX_NSEG];
|
||||
uint16_t seg_len[IWI_MAX_NSEG];
|
||||
} __packed;
|
||||
|
||||
/* command */
|
||||
struct iwi_cmd_desc {
|
||||
struct iwi_hdr hdr;
|
||||
uint8_t type;
|
||||
#define IWI_CMD_ENABLE 2
|
||||
#define IWI_CMD_SET_CONFIG 6
|
||||
#define IWI_CMD_SET_ESSID 8
|
||||
#define IWI_CMD_SET_MAC_ADDRESS 11
|
||||
#define IWI_CMD_SET_RTS_THRESHOLD 15
|
||||
#define IWI_CMD_SET_POWER_MODE 17
|
||||
#define IWI_CMD_SET_WEP_KEY 18
|
||||
#define IWI_CMD_SCAN 20
|
||||
#define IWI_CMD_ASSOCIATE 21
|
||||
#define IWI_CMD_SET_RATES 22
|
||||
#define IWI_CMD_DISABLE 33
|
||||
#define IWI_CMD_SET_IV 34
|
||||
#define IWI_CMD_SET_TX_POWER 35
|
||||
#define IWI_CMD_SET_SENSITIVITY 42
|
||||
|
||||
uint8_t len;
|
||||
uint16_t reserved;
|
||||
uint8_t data[120];
|
||||
} __packed;
|
||||
|
||||
/* constants for 'mode' fields */
|
||||
#define IWI_MODE_11A 0
|
||||
#define IWI_MODE_11B 1
|
||||
#define IWI_MODE_11G 2
|
||||
|
||||
/* macro for command IWI_CMD_SET_SENSITIVITY */
|
||||
#define IWI_RSSIDBM2RAW(rssi) ((rssi) - 112)
|
||||
|
||||
/* possible values for command IWI_CMD_SET_POWER_MODE */
|
||||
#define IWI_POWER_MODE_CAM 0
|
||||
|
||||
/* structure for command IWI_CMD_SET_RATES */
|
||||
struct iwi_rateset {
|
||||
uint8_t mode;
|
||||
uint8_t nrates;
|
||||
uint8_t type;
|
||||
#define IWI_RATESET_TYPE_NEGOCIATED 0
|
||||
#define IWI_RATESET_TYPE_SUPPORTED 1
|
||||
|
||||
uint8_t reserved;
|
||||
uint8_t rates[12];
|
||||
} __packed;
|
||||
|
||||
/* structure for command IWI_CMD_SET_TX_POWER */
|
||||
struct iwi_txpower {
|
||||
uint8_t nchan;
|
||||
uint8_t mode;
|
||||
struct {
|
||||
uint8_t chan;
|
||||
uint8_t power;
|
||||
#define IWI_TXPOWER_MAX 20
|
||||
#define IWI_TXPOWER_RATIO (IEEE80211_TXPOWER_MAX / IWI_TXPOWER_MAX)
|
||||
} __packed chan[37];
|
||||
} __packed;
|
||||
|
||||
/* structure for command IWI_CMD_ASSOCIATE */
|
||||
struct iwi_associate {
|
||||
uint8_t chan;
|
||||
uint8_t auth;
|
||||
#define IWI_AUTH_OPEN 0
|
||||
#define IWI_AUTH_SHARED 1
|
||||
#define IWI_AUTH_NONE 3
|
||||
|
||||
uint8_t type;
|
||||
uint8_t reserved1;
|
||||
uint16_t reserved2;
|
||||
uint8_t plen;
|
||||
uint8_t mode;
|
||||
uint8_t bssid[IEEE80211_ADDR_LEN];
|
||||
uint8_t tstamp[8];
|
||||
uint16_t capinfo;
|
||||
uint16_t lintval;
|
||||
uint16_t intval;
|
||||
uint8_t dst[IEEE80211_ADDR_LEN];
|
||||
uint32_t reserved3;
|
||||
uint16_t reserved4;
|
||||
} __packed;
|
||||
|
||||
/* structure for command IWI_CMD_SCAN */
|
||||
struct iwi_scan {
|
||||
uint8_t type;
|
||||
#define IWI_SCAN_TYPE_BROADCAST 3
|
||||
|
||||
uint16_t intval;
|
||||
uint8_t channels[54];
|
||||
#define IWI_CHAN_5GHZ (0 << 6)
|
||||
#define IWI_CHAN_2GHZ (1 << 6)
|
||||
|
||||
uint8_t reserved[3];
|
||||
} __packed;
|
||||
|
||||
/* structure for command IWI_CMD_SET_CONFIG */
|
||||
struct iwi_configuration {
|
||||
uint8_t bluetooth_coexistence;
|
||||
uint8_t reserved1;
|
||||
uint8_t answer_broadcast_probe_req;
|
||||
uint8_t allow_invalid_frames;
|
||||
uint8_t multicast_enabled;
|
||||
uint8_t exclude_unicast_unencrypted;
|
||||
uint8_t disable_unicast_decryption;
|
||||
uint8_t exclude_multicast_unencrypted;
|
||||
uint8_t disable_multicast_decryption;
|
||||
uint8_t antenna;
|
||||
uint8_t reserved2;
|
||||
uint8_t use_protection;
|
||||
uint8_t protection_ctsonly;
|
||||
uint8_t enable_multicast_filtering;
|
||||
uint8_t bluetooth_threshold;
|
||||
uint8_t reserved4;
|
||||
uint8_t allow_beacon_and_probe_resp;
|
||||
uint8_t allow_mgt;
|
||||
uint8_t noise_reported;
|
||||
uint8_t reserved5;
|
||||
} __packed;
|
||||
|
||||
/* structure for command IWI_CMD_SET_WEP_KEY */
|
||||
struct iwi_wep_key {
|
||||
uint8_t cmd;
|
||||
#define IWI_WEP_KEY_CMD_SETKEY 0x08
|
||||
|
||||
uint8_t seq;
|
||||
uint8_t idx;
|
||||
uint8_t len;
|
||||
uint8_t key[IEEE80211_KEYBUF_SIZE];
|
||||
} __packed;
|
||||
|
||||
#define IWI_MEM_EEPROM_CTL 0x00300040
|
||||
|
||||
#define IWI_EEPROM_MAC 0x21
|
||||
|
||||
#define IWI_EEPROM_DELAY 1 /* minimum hold time (microsecond) */
|
||||
|
||||
#define IWI_EEPROM_C (1 << 0) /* Serial Clock */
|
||||
#define IWI_EEPROM_S (1 << 1) /* Chip Select */
|
||||
#define IWI_EEPROM_D (1 << 2) /* Serial data input */
|
||||
#define IWI_EEPROM_Q (1 << 4) /* Serial data output */
|
||||
|
||||
#define IWI_EEPROM_SHIFT_D 2
|
||||
#define IWI_EEPROM_SHIFT_Q 4
|
||||
|
||||
/*
|
||||
* control and status registers access macros
|
||||
*/
|
||||
#define CSR_READ_1(sc, reg) \
|
||||
bus_space_read_1((sc)->sc_st, (sc)->sc_sh, (reg))
|
||||
|
||||
#define CSR_READ_2(sc, reg) \
|
||||
bus_space_read_2((sc)->sc_st, (sc)->sc_sh, (reg))
|
||||
|
||||
#define CSR_READ_4(sc, reg) \
|
||||
bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg))
|
||||
|
||||
#define CSR_READ_REGION_4(sc, offset, datap, count) \
|
||||
bus_space_read_region_4((sc)->sc_st, (sc)->sc_sh, (offset), \
|
||||
(datap), (count))
|
||||
|
||||
#define CSR_WRITE_1(sc, reg, val) \
|
||||
bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val))
|
||||
|
||||
#define CSR_WRITE_2(sc, reg, val) \
|
||||
bus_space_write_2((sc)->sc_st, (sc)->sc_sh, (reg), (val))
|
||||
|
||||
#define CSR_WRITE_4(sc, reg, val) \
|
||||
bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))
|
||||
|
||||
/*
|
||||
* indirect memory space access macros
|
||||
*/
|
||||
#define MEM_WRITE_1(sc, addr, val) do { \
|
||||
CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \
|
||||
CSR_WRITE_1((sc), IWI_CSR_INDIRECT_DATA, (val)); \
|
||||
} while (/* CONSTCOND */0)
|
||||
|
||||
#define MEM_WRITE_2(sc, addr, val) do { \
|
||||
CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \
|
||||
CSR_WRITE_2((sc), IWI_CSR_INDIRECT_DATA, (val)); \
|
||||
} while (/* CONSTCOND */0)
|
||||
|
||||
#define MEM_WRITE_4(sc, addr, val) do { \
|
||||
CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \
|
||||
CSR_WRITE_4((sc), IWI_CSR_INDIRECT_DATA, (val)); \
|
||||
} while (/* CONSTCOND */0)
|
||||
|
||||
#define MEM_WRITE_MULTI_1(sc, addr, buf, len) do { \
|
||||
CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \
|
||||
CSR_WRITE_MULTI_1((sc), IWI_CSR_INDIRECT_DATA, (buf), (len)); \
|
||||
} while (/* CONSTCOND */0)
|
||||
|
||||
/*
|
||||
* EEPROM access macro
|
||||
*/
|
||||
#define IWI_EEPROM_CTL(sc, val) do { \
|
||||
MEM_WRITE_4((sc), IWI_MEM_EEPROM_CTL, (val)); \
|
||||
DELAY(IWI_EEPROM_DELAY); \
|
||||
} while (/* CONSTCOND */0)
|
163
sys/dev/iwi/if_iwivar.h
Normal file
163
sys/dev/iwi/if_iwivar.h
Normal file
@ -0,0 +1,163 @@
|
||||
/* $FreeBSD$ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2004, 2005
|
||||
* Damien Bergamini <damien.bergamini@free.fr>. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice unmodified, this list of conditions, and the following
|
||||
* disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
struct iwi_firmware {
|
||||
void *boot;
|
||||
int boot_size;
|
||||
void *ucode;
|
||||
int ucode_size;
|
||||
void *main;
|
||||
int main_size;
|
||||
};
|
||||
|
||||
struct iwi_rx_radiotap_header {
|
||||
struct ieee80211_radiotap_header wr_ihdr;
|
||||
uint8_t wr_flags;
|
||||
uint8_t wr_rate;
|
||||
uint16_t wr_chan_freq;
|
||||
uint16_t wr_chan_flags;
|
||||
uint8_t wr_antsignal;
|
||||
uint8_t wr_antenna;
|
||||
};
|
||||
|
||||
#define IWI_RX_RADIOTAP_PRESENT \
|
||||
((1 << IEEE80211_RADIOTAP_FLAGS) | \
|
||||
(1 << IEEE80211_RADIOTAP_RATE) | \
|
||||
(1 << IEEE80211_RADIOTAP_CHANNEL) | \
|
||||
(1 << IEEE80211_RADIOTAP_DB_ANTSIGNAL) | \
|
||||
(1 << IEEE80211_RADIOTAP_ANTENNA))
|
||||
|
||||
struct iwi_tx_radiotap_header {
|
||||
struct ieee80211_radiotap_header wt_ihdr;
|
||||
uint8_t wt_flags;
|
||||
uint16_t wt_chan_freq;
|
||||
uint16_t wt_chan_flags;
|
||||
};
|
||||
|
||||
#define IWI_TX_RADIOTAP_PRESENT \
|
||||
((1 << IEEE80211_RADIOTAP_FLAGS) | \
|
||||
(1 << IEEE80211_RADIOTAP_CHANNEL))
|
||||
|
||||
struct iwi_cmd_ring {
|
||||
bus_dma_tag_t desc_dmat;
|
||||
bus_dmamap_t desc_map;
|
||||
bus_addr_t physaddr;
|
||||
struct iwi_cmd_desc *desc;
|
||||
int count;
|
||||
int queued;
|
||||
int cur;
|
||||
int next;
|
||||
};
|
||||
|
||||
struct iwi_tx_data {
|
||||
bus_dmamap_t map;
|
||||
struct mbuf *m;
|
||||
struct ieee80211_node *ni;
|
||||
};
|
||||
|
||||
struct iwi_tx_ring {
|
||||
bus_dma_tag_t desc_dmat;
|
||||
bus_dma_tag_t data_dmat;
|
||||
bus_dmamap_t desc_map;
|
||||
bus_addr_t physaddr;
|
||||
struct iwi_tx_desc *desc;
|
||||
struct iwi_tx_data *data;
|
||||
int count;
|
||||
int queued;
|
||||
int cur;
|
||||
int next;
|
||||
};
|
||||
|
||||
struct iwi_rx_data {
|
||||
bus_dmamap_t map;
|
||||
bus_addr_t physaddr;
|
||||
uint32_t reg;
|
||||
struct mbuf *m;
|
||||
};
|
||||
|
||||
struct iwi_rx_ring {
|
||||
bus_dma_tag_t data_dmat;
|
||||
struct iwi_rx_data *data;
|
||||
int count;
|
||||
int cur;
|
||||
};
|
||||
|
||||
struct iwi_softc {
|
||||
struct arpcom sc_arp;
|
||||
struct ieee80211com sc_ic;
|
||||
int (*sc_newstate)(struct ieee80211com *,
|
||||
enum ieee80211_state, int);
|
||||
device_t sc_dev;
|
||||
|
||||
struct mtx sc_mtx;
|
||||
|
||||
struct iwi_firmware fw;
|
||||
uint32_t flags;
|
||||
#define IWI_FLAG_FW_CACHED (1 << 0)
|
||||
#define IWI_FLAG_FW_INITED (1 << 1)
|
||||
|
||||
struct iwi_cmd_ring cmdq;
|
||||
struct iwi_tx_ring txq;
|
||||
struct iwi_rx_ring rxq;
|
||||
|
||||
struct resource *irq;
|
||||
struct resource *mem;
|
||||
bus_space_tag_t sc_st;
|
||||
bus_space_handle_t sc_sh;
|
||||
void *sc_ih;
|
||||
int mem_rid;
|
||||
int irq_rid;
|
||||
|
||||
int dwelltime;
|
||||
int bluetooth;
|
||||
|
||||
int sc_tx_timer;
|
||||
|
||||
struct bpf_if *sc_drvbpf;
|
||||
|
||||
union {
|
||||
struct iwi_rx_radiotap_header th;
|
||||
uint8_t pad[64];
|
||||
} sc_rxtapu;
|
||||
#define sc_rxtap sc_rxtapu.th
|
||||
int sc_rxtap_len;
|
||||
|
||||
union {
|
||||
struct iwi_tx_radiotap_header th;
|
||||
uint8_t pad[64];
|
||||
} sc_txtapu;
|
||||
#define sc_txtap sc_txtapu.th
|
||||
int sc_txtap_len;
|
||||
};
|
||||
|
||||
#define SIOCSLOADFW _IOW('i', 137, struct ifreq)
|
||||
#define SIOCSKILLFW _IOW('i', 138, struct ifreq)
|
||||
|
||||
#define IWI_LOCK(sc) mtx_lock(&(sc)->sc_mtx)
|
||||
#define IWI_UNLOCK(sc) mtx_unlock(&(sc)->sc_mtx)
|
@ -154,6 +154,7 @@ vendor ELSA 0xd601 Elsa
|
||||
vendor NEWMEDIA2 0x10cd NewMedia
|
||||
vendor PLANEX 0x14ea PLANEX
|
||||
vendor ACTIONTEC 0x1668 ACTIONTEC
|
||||
vendor RALINK 0x1814 Ralink Technology
|
||||
|
||||
/*
|
||||
* The following vendor IDs are not, as far as I can tell, actually
|
||||
@ -455,6 +456,9 @@ product RATOC REX_R280_9530 0x0001 RATOC REX-R280/REX-9530
|
||||
product RACORE ETHERNET 0x2216 Racore PC Card Ethernet
|
||||
product RACORE FASTENET 0x2328 Racore PC Card Fast Ethernet
|
||||
|
||||
/* Ralink Technology products */
|
||||
product RALINK RT2560 0x0201 RT2500 wireless adapter
|
||||
|
||||
/* Raylink/WebGear */
|
||||
product RAYTHEON WLAN 0x0000 WLAN Adapter
|
||||
|
||||
|
2781
sys/dev/ral/if_ral.c
Normal file
2781
sys/dev/ral/if_ral.c
Normal file
File diff suppressed because it is too large
Load Diff
141
sys/dev/ral/if_ral_pccard.c
Normal file
141
sys/dev/ral/if_ral_pccard.c
Normal file
@ -0,0 +1,141 @@
|
||||
/* $FreeBSD$ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2005
|
||||
* Damien Bergamini <damien.bergamini@free.fr>
|
||||
*
|
||||
* Permission to use, copy, modify, and distribute this software for any
|
||||
* purpose with or without fee is hereby granted, provided that the above
|
||||
* copyright notice and this permission notice appear in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__FBSDID("$FreeBSD$");
|
||||
|
||||
/*
|
||||
* CardBus front-end for the Ralink RT2500 driver.
|
||||
*/
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/sysctl.h>
|
||||
#include <sys/sockio.h>
|
||||
#include <sys/mbuf.h>
|
||||
#include <sys/kernel.h>
|
||||
#include <sys/socket.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/malloc.h>
|
||||
#include <sys/module.h>
|
||||
#include <sys/bus.h>
|
||||
#include <sys/endian.h>
|
||||
|
||||
#include <machine/bus.h>
|
||||
#include <machine/resource.h>
|
||||
#include <sys/rman.h>
|
||||
|
||||
#include <net/if.h>
|
||||
#include <net/if_arp.h>
|
||||
#include <net/ethernet.h>
|
||||
#include <net/if_dl.h>
|
||||
#include <net/if_media.h>
|
||||
#include <net/if_types.h>
|
||||
|
||||
#include <net80211/ieee80211_var.h>
|
||||
#include <net80211/ieee80211_radiotap.h>
|
||||
|
||||
#include <dev/pccard/pccardvar.h>
|
||||
#include <dev/pccard/pccard_cis.h>
|
||||
|
||||
#include <dev/ral/if_ralrate.h>
|
||||
#include <dev/ral/if_ralreg.h>
|
||||
#include <dev/ral/if_ralvar.h>
|
||||
|
||||
#include "card_if.h"
|
||||
#include "pccarddevs.h"
|
||||
|
||||
MODULE_DEPEND(ral, pccard, 1, 1, 1);
|
||||
MODULE_DEPEND(ral, wlan, 1, 1, 1);
|
||||
|
||||
static const struct pccard_product ral_pccard_products[] = {
|
||||
PCMCIA_CARD(RALINK, RT2560, 0),
|
||||
|
||||
{ NULL }
|
||||
};
|
||||
|
||||
static int ral_pccard_match(device_t);
|
||||
static int ral_pccard_probe(device_t);
|
||||
static int ral_pccard_attach(device_t);
|
||||
|
||||
static device_method_t ral_pccard_methods[] = {
|
||||
/* Device interface */
|
||||
DEVMETHOD(device_probe, pccard_compat_probe),
|
||||
DEVMETHOD(device_attach, pccard_compat_attach),
|
||||
DEVMETHOD(device_detach, ral_detach),
|
||||
DEVMETHOD(device_shutdown, ral_shutdown),
|
||||
|
||||
/* Card interface */
|
||||
DEVMETHOD(card_compat_match, ral_pccard_match),
|
||||
DEVMETHOD(card_compat_probe, ral_pccard_probe),
|
||||
DEVMETHOD(card_compat_attach, ral_pccard_attach),
|
||||
|
||||
{ 0, 0 }
|
||||
};
|
||||
|
||||
static driver_t ral_pccard_driver = {
|
||||
"ral",
|
||||
ral_pccard_methods,
|
||||
sizeof (struct ral_softc)
|
||||
};
|
||||
|
||||
DRIVER_MODULE(ral, pccard, ral_pccard_driver, ral_devclass, 0, 0);
|
||||
|
||||
static int
|
||||
ral_pccard_match(device_t dev)
|
||||
{
|
||||
const struct pccard_product *pp;
|
||||
|
||||
if ((pp = pccard_product_lookup(dev, ral_pccard_products,
|
||||
sizeof (struct pccard_product), NULL)) != NULL) {
|
||||
if (pp->pp_name != NULL)
|
||||
device_set_desc(dev, pp->pp_name);
|
||||
return 0;
|
||||
}
|
||||
return ENXIO;
|
||||
}
|
||||
|
||||
static int
|
||||
ral_pccard_probe(device_t dev)
|
||||
{
|
||||
int error;
|
||||
|
||||
error = ral_alloc(dev, 0);
|
||||
if (error != 0)
|
||||
return error;
|
||||
|
||||
ral_free(dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
ral_pccard_attach(device_t dev)
|
||||
{
|
||||
int error;
|
||||
|
||||
error = ral_alloc(dev, 0);
|
||||
if (error != 0)
|
||||
return error;
|
||||
|
||||
error = ral_attach(dev);
|
||||
if (error != 0)
|
||||
ral_free(dev);
|
||||
|
||||
return error;
|
||||
}
|
168
sys/dev/ral/if_ral_pci.c
Normal file
168
sys/dev/ral/if_ral_pci.c
Normal file
@ -0,0 +1,168 @@
|
||||
/* $FreeBSD$ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2005
|
||||
* Damien Bergamini <damien.bergamini@free.fr>
|
||||
*
|
||||
* Permission to use, copy, modify, and distribute this software for any
|
||||
* purpose with or without fee is hereby granted, provided that the above
|
||||
* copyright notice and this permission notice appear in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__FBSDID("$FreeBSD$");
|
||||
|
||||
/*
|
||||
* PCI front-end for the Ralink RT2500 driver.
|
||||
*/
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/sysctl.h>
|
||||
#include <sys/sockio.h>
|
||||
#include <sys/mbuf.h>
|
||||
#include <sys/kernel.h>
|
||||
#include <sys/socket.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/malloc.h>
|
||||
#include <sys/module.h>
|
||||
#include <sys/bus.h>
|
||||
#include <sys/endian.h>
|
||||
|
||||
#include <machine/bus.h>
|
||||
#include <machine/resource.h>
|
||||
#include <machine/clock.h>
|
||||
#include <sys/rman.h>
|
||||
|
||||
#include <net/bpf.h>
|
||||
#include <net/if.h>
|
||||
#include <net/if_arp.h>
|
||||
#include <net/ethernet.h>
|
||||
#include <net/if_dl.h>
|
||||
#include <net/if_media.h>
|
||||
#include <net/if_types.h>
|
||||
|
||||
#include <net80211/ieee80211_var.h>
|
||||
#include <net80211/ieee80211_radiotap.h>
|
||||
|
||||
#include <dev/pci/pcireg.h>
|
||||
#include <dev/pci/pcivar.h>
|
||||
|
||||
#include <dev/ral/if_ralrate.h>
|
||||
#include <dev/ral/if_ralreg.h>
|
||||
#include <dev/ral/if_ralvar.h>
|
||||
|
||||
MODULE_DEPEND(ral, pci, 1, 1, 1);
|
||||
MODULE_DEPEND(ral, wlan, 1, 1, 1);
|
||||
|
||||
struct ral_pci_ident {
|
||||
uint16_t vendor;
|
||||
uint16_t device;
|
||||
const char *name;
|
||||
};
|
||||
|
||||
static const struct ral_pci_ident ral_pci_ids[] = {
|
||||
{ 0x1814, 0x0201, "Ralink Technology RT2500" },
|
||||
|
||||
{ 0, 0, NULL }
|
||||
};
|
||||
|
||||
static int ral_pci_probe(device_t);
|
||||
static int ral_pci_attach(device_t);
|
||||
static int ral_pci_suspend(device_t);
|
||||
static int ral_pci_resume(device_t);
|
||||
|
||||
static device_method_t ral_pci_methods[] = {
|
||||
/* Device interface */
|
||||
DEVMETHOD(device_probe, ral_pci_probe),
|
||||
DEVMETHOD(device_attach, ral_pci_attach),
|
||||
DEVMETHOD(device_detach, ral_detach),
|
||||
DEVMETHOD(device_suspend, ral_pci_suspend),
|
||||
DEVMETHOD(device_resume, ral_pci_resume),
|
||||
|
||||
{ 0, 0 }
|
||||
};
|
||||
|
||||
static driver_t ral_pci_driver = {
|
||||
"ral",
|
||||
ral_pci_methods,
|
||||
sizeof (struct ral_softc)
|
||||
};
|
||||
|
||||
DRIVER_MODULE(ral, pci, ral_pci_driver, ral_devclass, 0, 0);
|
||||
DRIVER_MODULE(ral, cardbus, ral_pci_driver, ral_devclass, 0, 0);
|
||||
|
||||
static int
|
||||
ral_pci_probe(device_t dev)
|
||||
{
|
||||
const struct ral_pci_ident *ident;
|
||||
|
||||
for (ident = ral_pci_ids; ident->name != NULL; ident++) {
|
||||
if (pci_get_vendor(dev) == ident->vendor &&
|
||||
pci_get_device(dev) == ident->device) {
|
||||
device_set_desc(dev, ident->name);
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return ENXIO;
|
||||
}
|
||||
|
||||
/* Base Address Register */
|
||||
#define RAL_PCI_BAR0 0x10
|
||||
|
||||
static int
|
||||
ral_pci_attach(device_t dev)
|
||||
{
|
||||
int error;
|
||||
|
||||
if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) {
|
||||
device_printf(dev, "chip is in D%d power mode "
|
||||
"-- setting to D0\n", pci_get_powerstate(dev));
|
||||
pci_set_powerstate(dev, PCI_POWERSTATE_D0);
|
||||
}
|
||||
|
||||
/* enable bus-mastering */
|
||||
pci_enable_busmaster(dev);
|
||||
|
||||
error = ral_alloc(dev, RAL_PCI_BAR0);
|
||||
if (error != 0)
|
||||
return error;
|
||||
|
||||
error = ral_attach(dev);
|
||||
if (error != 0)
|
||||
ral_free(dev);
|
||||
|
||||
return error;
|
||||
}
|
||||
|
||||
static int
|
||||
ral_pci_suspend(device_t dev)
|
||||
{
|
||||
struct ral_softc *sc = device_get_softc(dev);
|
||||
|
||||
ral_stop(sc);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
ral_pci_resume(device_t dev)
|
||||
{
|
||||
struct ral_softc *sc = device_get_softc(dev);
|
||||
struct ifnet *ifp = sc->sc_ic.ic_ifp;
|
||||
|
||||
if (ifp->if_flags & IFF_UP) {
|
||||
ifp->if_init(ifp->if_softc);
|
||||
if (ifp->if_flags & IFF_RUNNING)
|
||||
ifp->if_start(ifp);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
192
sys/dev/ral/if_ralrate.c
Normal file
192
sys/dev/ral/if_ralrate.c
Normal file
@ -0,0 +1,192 @@
|
||||
/* $FreeBSD$ */
|
||||
/* $NetBSD: ieee80211_rssadapt.c,v 1.9 2005/02/26 22:45:09 perry Exp $ */
|
||||
/*-
|
||||
* Copyright (c) 2003, 2004 David Young. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or
|
||||
* without modification, are permitted provided that the following
|
||||
* conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above
|
||||
* copyright notice, this list of conditions and the following
|
||||
* disclaimer in the documentation and/or other materials provided
|
||||
* with the distribution.
|
||||
* 3. The name of David Young may not be used to endorse or promote
|
||||
* products derived from this software without specific prior
|
||||
* written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
|
||||
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL David
|
||||
* Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
|
||||
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
|
||||
* OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/sockio.h>
|
||||
#include <sys/mbuf.h>
|
||||
#include <sys/kernel.h>
|
||||
#include <sys/socket.h>
|
||||
|
||||
#include <net/if.h>
|
||||
#include <net/if_arp.h>
|
||||
#include <net/ethernet.h>
|
||||
#include <net/if_dl.h>
|
||||
#include <net/if_media.h>
|
||||
#include <net/if_types.h>
|
||||
|
||||
#include <net80211/ieee80211_var.h>
|
||||
|
||||
#include <dev/ral/if_ralrate.h>
|
||||
|
||||
#ifdef interpolate
|
||||
#undef interpolate
|
||||
#endif
|
||||
#define interpolate(parm, old, new) ((parm##_old * (old) + \
|
||||
(parm##_denom - parm##_old) * (new)) / \
|
||||
parm##_denom)
|
||||
|
||||
static struct ral_rssadapt_expavgctl master_expavgctl = {
|
||||
rc_decay_denom : 16,
|
||||
rc_decay_old : 15,
|
||||
rc_thresh_denom : 8,
|
||||
rc_thresh_old : 4,
|
||||
rc_avgrssi_denom : 8,
|
||||
rc_avgrssi_old : 4
|
||||
};
|
||||
|
||||
int
|
||||
ral_rssadapt_choose(struct ral_rssadapt *ra, struct ieee80211_rateset *rs,
|
||||
struct ieee80211_frame *wh, u_int len, const char *dvname, int do_not_adapt)
|
||||
{
|
||||
u_int16_t (*thrs)[IEEE80211_RATE_SIZE];
|
||||
int flags = 0, i, rateidx = 0, thridx, top;
|
||||
|
||||
if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_CTL)
|
||||
flags |= IEEE80211_RATE_BASIC;
|
||||
|
||||
for (i = 0, top = RAL_RSSADAPT_BKT0;
|
||||
i < RAL_RSSADAPT_BKTS;
|
||||
i++, top <<= RAL_RSSADAPT_BKTPOWER) {
|
||||
thridx = i;
|
||||
if (len <= top)
|
||||
break;
|
||||
}
|
||||
|
||||
thrs = &ra->ra_rate_thresh[thridx];
|
||||
|
||||
i = rs->rs_nrates;
|
||||
while (--i >= 0) {
|
||||
rateidx = i;
|
||||
if ((rs->rs_rates[i] & flags) != flags)
|
||||
continue;
|
||||
if (do_not_adapt)
|
||||
break;
|
||||
if ((*thrs)[i] < ra->ra_avg_rssi)
|
||||
break;
|
||||
}
|
||||
|
||||
return rateidx;
|
||||
}
|
||||
|
||||
void
|
||||
ral_rssadapt_updatestats(struct ral_rssadapt *ra)
|
||||
{
|
||||
long interval;
|
||||
|
||||
ra->ra_pktrate =
|
||||
(ra->ra_pktrate + 10 * (ra->ra_nfail + ra->ra_nok)) / 2;
|
||||
ra->ra_nfail = ra->ra_nok = 0;
|
||||
|
||||
/* a node is eligible for its rate to be raised every 1/10 to 10
|
||||
* seconds, more eligible in proportion to recent packet rates.
|
||||
*/
|
||||
interval = MAX(100000, 10000000 / MAX(1, 10 * ra->ra_pktrate));
|
||||
ra->ra_raise_interval.tv_sec = interval / (1000 * 1000);
|
||||
ra->ra_raise_interval.tv_usec = interval % (1000 * 1000);
|
||||
}
|
||||
|
||||
void
|
||||
ral_rssadapt_input(struct ieee80211com *ic, struct ieee80211_node *ni,
|
||||
struct ral_rssadapt *ra, int rssi)
|
||||
{
|
||||
ra->ra_avg_rssi = interpolate(master_expavgctl.rc_avgrssi,
|
||||
ra->ra_avg_rssi, (rssi << 8));
|
||||
}
|
||||
|
||||
/*
|
||||
* Adapt the data rate to suit the conditions. When a transmitted
|
||||
* packet is dropped after RAL_RSSADAPT_RETRY_LIMIT retransmissions,
|
||||
* raise the RSS threshold for transmitting packets of similar length at
|
||||
* the same data rate.
|
||||
*/
|
||||
void
|
||||
ral_rssadapt_lower_rate(struct ieee80211com *ic, struct ieee80211_node *ni,
|
||||
struct ral_rssadapt *ra, struct ral_rssdesc *id)
|
||||
{
|
||||
struct ieee80211_rateset *rs = &ni->ni_rates;
|
||||
u_int16_t last_thr;
|
||||
u_int i, thridx, top;
|
||||
|
||||
ra->ra_nfail++;
|
||||
|
||||
if (id->id_rateidx >= rs->rs_nrates)
|
||||
return;
|
||||
|
||||
for (i = 0, top = RAL_RSSADAPT_BKT0;
|
||||
i < RAL_RSSADAPT_BKTS;
|
||||
i++, top <<= RAL_RSSADAPT_BKTPOWER) {
|
||||
thridx = i;
|
||||
if (id->id_len <= top)
|
||||
break;
|
||||
}
|
||||
|
||||
last_thr = ra->ra_rate_thresh[thridx][id->id_rateidx];
|
||||
ra->ra_rate_thresh[thridx][id->id_rateidx] =
|
||||
interpolate(master_expavgctl.rc_thresh, last_thr,
|
||||
(id->id_rssi << 8));
|
||||
}
|
||||
|
||||
void
|
||||
ral_rssadapt_raise_rate(struct ieee80211com *ic, struct ral_rssadapt *ra,
|
||||
struct ral_rssdesc *id)
|
||||
{
|
||||
u_int16_t (*thrs)[IEEE80211_RATE_SIZE], newthr, oldthr;
|
||||
struct ieee80211_node *ni = id->id_node;
|
||||
struct ieee80211_rateset *rs = &ni->ni_rates;
|
||||
int i, rate, top;
|
||||
|
||||
ra->ra_nok++;
|
||||
|
||||
if (!ratecheck(&ra->ra_last_raise, &ra->ra_raise_interval))
|
||||
return;
|
||||
|
||||
for (i = 0, top = RAL_RSSADAPT_BKT0;
|
||||
i < RAL_RSSADAPT_BKTS;
|
||||
i++, top <<= RAL_RSSADAPT_BKTPOWER) {
|
||||
thrs = &ra->ra_rate_thresh[i];
|
||||
if (id->id_len <= top)
|
||||
break;
|
||||
}
|
||||
|
||||
if (id->id_rateidx + 1 < rs->rs_nrates &&
|
||||
(*thrs)[id->id_rateidx + 1] > (*thrs)[id->id_rateidx]) {
|
||||
rate = (rs->rs_rates[id->id_rateidx + 1] & IEEE80211_RATE_VAL);
|
||||
|
||||
oldthr = (*thrs)[id->id_rateidx + 1];
|
||||
if ((*thrs)[id->id_rateidx] == 0)
|
||||
newthr = ra->ra_avg_rssi;
|
||||
else
|
||||
newthr = (*thrs)[id->id_rateidx];
|
||||
(*thrs)[id->id_rateidx + 1] =
|
||||
interpolate(master_expavgctl.rc_decay, oldthr, newthr);
|
||||
}
|
||||
}
|
98
sys/dev/ral/if_ralrate.h
Normal file
98
sys/dev/ral/if_ralrate.h
Normal file
@ -0,0 +1,98 @@
|
||||
/* $FreeBSD$ */
|
||||
/* $NetBSD: ieee80211_rssadapt.h,v 1.4 2005/02/26 22:45:09 perry Exp $ */
|
||||
/*-
|
||||
* Copyright (c) 2003, 2004 David Young. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or
|
||||
* without modification, are permitted provided that the following
|
||||
* conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above
|
||||
* copyright notice, this list of conditions and the following
|
||||
* disclaimer in the documentation and/or other materials provided
|
||||
* with the distribution.
|
||||
* 3. The name of David Young may not be used to endorse or promote
|
||||
* products derived from this software without specific prior
|
||||
* written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
|
||||
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL David
|
||||
* Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
|
||||
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
|
||||
* OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/* Data-rate adaptation loosely based on "Link Adaptation Strategy
|
||||
* for IEEE 802.11 WLAN via Received Signal Strength Measurement"
|
||||
* by Javier del Prado Pavon and Sunghyun Choi.
|
||||
*/
|
||||
|
||||
/* Buckets for frames 0-128 bytes long, 129-1024, 1025-maximum. */
|
||||
#define RAL_RSSADAPT_BKTS 3
|
||||
#define RAL_RSSADAPT_BKT0 128
|
||||
#define RAL_RSSADAPT_BKTPOWER 3 /* 2**_BKTPOWER */
|
||||
|
||||
#define ral_rssadapt_thresh_new \
|
||||
(ral_rssadapt_thresh_denom - ral_rssadapt_thresh_old)
|
||||
#define ral_rssadapt_decay_new \
|
||||
(ral_rssadapt_decay_denom - ral_rssadapt_decay_old)
|
||||
#define ral_rssadapt_avgrssi_new \
|
||||
(ral_rssadapt_avgrssi_denom - ral_rssadapt_avgrssi_old)
|
||||
|
||||
struct ral_rssadapt_expavgctl {
|
||||
/* RSS threshold decay. */
|
||||
u_int rc_decay_denom;
|
||||
u_int rc_decay_old;
|
||||
/* RSS threshold update. */
|
||||
u_int rc_thresh_denom;
|
||||
u_int rc_thresh_old;
|
||||
/* RSS average update. */
|
||||
u_int rc_avgrssi_denom;
|
||||
u_int rc_avgrssi_old;
|
||||
};
|
||||
|
||||
struct ral_rssadapt {
|
||||
/* exponential average RSSI << 8 */
|
||||
u_int16_t ra_avg_rssi;
|
||||
/* Tx failures in this update interval */
|
||||
u_int32_t ra_nfail;
|
||||
/* Tx successes in this update interval */
|
||||
u_int32_t ra_nok;
|
||||
/* exponential average packets/second */
|
||||
u_int32_t ra_pktrate;
|
||||
/* RSSI threshold for each Tx rate */
|
||||
u_int16_t ra_rate_thresh[RAL_RSSADAPT_BKTS]
|
||||
[IEEE80211_RATE_SIZE];
|
||||
struct timeval ra_last_raise;
|
||||
struct timeval ra_raise_interval;
|
||||
};
|
||||
|
||||
/* Properties of a Tx packet, for link adaptation. */
|
||||
struct ral_rssdesc {
|
||||
u_int id_len; /* Tx packet length */
|
||||
u_int id_rateidx; /* index into ni->ni_rates */
|
||||
struct ieee80211_node *id_node; /* destination STA MAC */
|
||||
u_int8_t id_rssi; /* destination STA avg RSS @
|
||||
* Tx time
|
||||
*/
|
||||
};
|
||||
|
||||
void ral_rssadapt_updatestats(struct ral_rssadapt *);
|
||||
void ral_rssadapt_input(struct ieee80211com *, struct ieee80211_node *,
|
||||
struct ral_rssadapt *, int);
|
||||
void ral_rssadapt_lower_rate(struct ieee80211com *,
|
||||
struct ieee80211_node *, struct ral_rssadapt *,
|
||||
struct ral_rssdesc *);
|
||||
void ral_rssadapt_raise_rate(struct ieee80211com *,
|
||||
struct ral_rssadapt *, struct ral_rssdesc *);
|
||||
int ral_rssadapt_choose(struct ral_rssadapt *,
|
||||
struct ieee80211_rateset *, struct ieee80211_frame *, u_int,
|
||||
const char *, int);
|
313
sys/dev/ral/if_ralreg.h
Normal file
313
sys/dev/ral/if_ralreg.h
Normal file
@ -0,0 +1,313 @@
|
||||
/* $FreeBSD$ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2005
|
||||
* Damien Bergamini <damien.bergamini@free.fr>
|
||||
*
|
||||
* Permission to use, copy, modify, and distribute this software for any
|
||||
* purpose with or without fee is hereby granted, provided that the above
|
||||
* copyright notice and this permission notice appear in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
#define RAL_TX_RING_COUNT 48
|
||||
#define RAL_ATIM_RING_COUNT 4
|
||||
#define RAL_PRIO_RING_COUNT 16
|
||||
#define RAL_BEACON_RING_COUNT 1
|
||||
#define RAL_RX_RING_COUNT 32
|
||||
|
||||
#define RAL_TX_DESC_SIZE (sizeof (struct ral_tx_desc))
|
||||
#define RAL_RX_DESC_SIZE (sizeof (struct ral_rx_desc))
|
||||
|
||||
#define RAL_MAX_SCATTER 1
|
||||
|
||||
/*
|
||||
* Control and status registers.
|
||||
*/
|
||||
#define RAL_CSR0 0x0000 /* ASIC version number */
|
||||
#define RAL_CSR1 0x0004 /* System control */
|
||||
#define RAL_CSR3 0x000c /* STA MAC address 0 */
|
||||
#define RAL_CSR4 0x0010 /* STA MAC address 1 */
|
||||
#define RAL_CSR5 0x0014 /* BSSID 0 */
|
||||
#define RAL_CSR6 0x0018 /* BSSID 1 */
|
||||
#define RAL_CSR7 0x001c /* Interrupt source */
|
||||
#define RAL_CSR8 0x0020 /* Interrupt mask */
|
||||
#define RAL_CSR9 0x0024 /* Maximum frame length */
|
||||
#define RAL_SECCSR0 0x0028 /* WEP control */
|
||||
#define RAL_CSR11 0x002c /* Back-off control */
|
||||
#define RAL_CSR12 0x0030 /* Synchronization configuration 0 */
|
||||
#define RAL_CSR13 0x0034 /* Synchronization configuration 1 */
|
||||
#define RAL_CSR14 0x0038 /* Synchronization control */
|
||||
#define RAL_CSR15 0x003c /* Synchronization status */
|
||||
#define RAL_CSR16 0x0040 /* TSF timer 0 */
|
||||
#define RAL_CSR17 0x0044 /* TSF timer 1 */
|
||||
#define RAL_CSR18 0x0048 /* IFS timer 0 */
|
||||
#define RAL_CSR19 0x004c /* IFS timer 1 */
|
||||
#define RAL_CSR20 0x0050 /* WAKEUP timer */
|
||||
#define RAL_CSR21 0x0054 /* EEPROM control */
|
||||
#define RAL_CSR22 0x0058 /* CFP control */
|
||||
#define RAL_TXCSR0 0x0060 /* TX control */
|
||||
#define RAL_TXCSR1 0x0064 /* TX configuration */
|
||||
#define RAL_TXCSR2 0x0068 /* TX descriptor configuration */
|
||||
#define RAL_TXCSR3 0x006c /* TX ring base address */
|
||||
#define RAL_TXCSR4 0x0070 /* TX ATIM ring base address */
|
||||
#define RAL_TXCSR5 0x0074 /* TX PRIO ring base address */
|
||||
#define RAL_TXCSR6 0x0078 /* Beacon base address */
|
||||
#define RAL_TXCSR7 0x007c /* AutoResponder control */
|
||||
#define RAL_RXCSR0 0x0080 /* RX control */
|
||||
#define RAL_RXCSR1 0x0084 /* RX descriptor configuration */
|
||||
#define RAL_RXCSR2 0x0088 /* RX ring base address */
|
||||
#define RAL_PCICSR 0x008c /* PCI control */
|
||||
#define RAL_RXCSR3 0x0090 /* BBP ID 0 */
|
||||
#define RAL_TXCSR9 0x0094 /* OFDM TX BBP */
|
||||
#define RAL_ARSP_PLCP_0 0x0098 /* Auto Responder PLCP address */
|
||||
#define RAL_ARSP_PLCP_1 0x009c /* Auto Responder PLCP Basic Rate bit mask */
|
||||
#define RAL_CNT0 0x00a0 /* FCS error counter */
|
||||
#define RAL_CNT1 0x00ac /* PLCP error counter */
|
||||
#define RAL_CNT2 0x00b0 /* Long error counter */
|
||||
#define RAL_CNT3 0x00b8 /* CCA false alarm counter */
|
||||
#define RAL_CNT4 0x00bc /* RX FIFO Overflow counter */
|
||||
#define RAL_CNT5 0x00c0 /* Tx FIFO Underrun counter */
|
||||
#define RAL_PWRCSR0 0x00c4 /* Power mode configuration */
|
||||
#define RAL_PSCSR0 0x00c8 /* Power state transition time */
|
||||
#define RAL_PSCSR1 0x00cc /* Power state transition time */
|
||||
#define RAL_PSCSR2 0x00d0 /* Power state transition time */
|
||||
#define RAL_PSCSR3 0x00d4 /* Power state transition time */
|
||||
#define RAL_PWRCSR1 0x00d8 /* Manual power control/status */
|
||||
#define RAL_TIMECSR 0x00dc /* Timer control */
|
||||
#define RAL_MACCSR0 0x00e0 /* MAC configuration */
|
||||
#define RAL_MACCSR1 0x00e4 /* MAC configuration */
|
||||
#define RAL_RALINKCSR 0x00e8 /* Ralink RX auto-reset BBCR */
|
||||
#define RAL_BCNCSR 0x00ec /* Beacon interval control */
|
||||
#define RAL_BBPCSR 0x00f0 /* BBP serial control */
|
||||
#define RAL_RFCSR 0x00f4 /* RF serial control */
|
||||
#define RAL_LEDCSR 0x00f8 /* LED control */
|
||||
#define RAL_SECCSR3 0x00fc /* XXX not documented */
|
||||
#define RAL_DMACSR0 0x0100 /* Current RX ring address */
|
||||
#define RAL_DMACSR1 0x0104 /* Current Tx ring address */
|
||||
#define RAL_DMACSR2 0x0104 /* Current Priority ring address */
|
||||
#define RAL_DMACSR3 0x0104 /* Current ATIM ring address */
|
||||
#define RAL_TXACKCSR0 0x0110 /* XXX not documented */
|
||||
#define RAL_GPIOCSR 0x0120 /* */
|
||||
#define RAL_BBBPPCSR 0x0124 /* BBP Pin Control */
|
||||
#define RAL_FIFOCSR0 0x0128 /* TX FIFO pointer */
|
||||
#define RAL_FIFOCSR1 0x012c /* RX FIFO pointer */
|
||||
#define RAL_BCNOCSR 0x0130 /* Beacon time offset */
|
||||
#define RAL_RLPWCSR 0x0134 /* RX_PE Low Width */
|
||||
#define RAL_TESTCSR 0x0138 /* Test Mode Select */
|
||||
#define RAL_PLCP1MCSR 0x013c /* Signal/Service/Length of ACK/CTS @1M */
|
||||
#define RAL_PLCP2MCSR 0x0140 /* Signal/Service/Length of ACK/CTS @2M */
|
||||
#define RAL_PLCP5p5MCSR 0x0144 /* Signal/Service/Length of ACK/CTS @5.5M */
|
||||
#define RAL_PLCP11MCSR 0x0148 /* Signal/Service/Length of ACK/CTS @11M */
|
||||
#define RAL_ACKPCTCSR 0x014c /* ACK/CTS padload consume time */
|
||||
#define RAL_ARTCSR1 0x0150 /* ACK/CTS padload consume time */
|
||||
#define RAL_ARTCSR2 0x0154 /* ACK/CTS padload consume time */
|
||||
#define RAL_SECCSR1 0x0158 /* WEP control */
|
||||
#define RAL_BBPCSR1 0x015c /* BBP TX Configuration */
|
||||
|
||||
|
||||
/* possible flags for register RXCSR0 */
|
||||
#define RAL_DISABLE_RX (1 << 0)
|
||||
#define RAL_DROP_CRC_ERROR (1 << 1)
|
||||
#define RAL_DROP_PHY_ERROR (1 << 2)
|
||||
#define RAL_DROP_CTL (1 << 3)
|
||||
#define RAL_DROP_NOT_TO_ME (1 << 4)
|
||||
#define RAL_DROP_TODS (1 << 5)
|
||||
#define RAL_DROP_VERSION_ERROR (1 << 6)
|
||||
|
||||
/* possible flags for register CSR1 */
|
||||
#define RAL_RESET_ASIC (1 << 0)
|
||||
#define RAL_RESET_BBP (1 << 1)
|
||||
#define RAL_HOST_READY (1 << 2)
|
||||
|
||||
/* possible flags for register CSR14 */
|
||||
#define RAL_ENABLE_TSF (1 << 0)
|
||||
#define RAL_ENABLE_TSF_SYNC(x) (((x) & 0x3) << 1)
|
||||
#define RAL_ENABLE_TBCN (1 << 3)
|
||||
#define RAL_ENABLE_BEACON_GENERATOR (1 << 6)
|
||||
|
||||
/* possible flags for register CSR21 */
|
||||
#define RAL_EEPROM_C (1 << 1)
|
||||
#define RAL_EEPROM_S (1 << 2)
|
||||
#define RAL_EEPROM_D (1 << 3)
|
||||
#define RAL_EEPROM_Q (1 << 4)
|
||||
#define RAL_EEPROM_93C46 (1 << 5)
|
||||
|
||||
#define RAL_EEPROM_SHIFT_D 3
|
||||
#define RAL_EEPROM_SHIFT_Q 4
|
||||
|
||||
/* possible flags for register TXCSR0 */
|
||||
#define RAL_KICK_TX (1 << 0)
|
||||
#define RAL_KICK_ATIM (1 << 1)
|
||||
#define RAL_KICK_PRIO (1 << 2)
|
||||
#define RAL_ABORT_TX (1 << 3)
|
||||
|
||||
/* possible flags for register SECCSR0 */
|
||||
#define RAL_KICK_DECRYPT (1 << 0)
|
||||
|
||||
/* possible flags for register SECCSR1 */
|
||||
#define RAL_KICK_ENCRYPT (1 << 0)
|
||||
|
||||
/* possible flags for register CSR7 */
|
||||
#define RAL_BEACON_EXPIRE 0x00000001
|
||||
#define RAL_WAKEUP_EXPIRE 0x00000002
|
||||
#define RAL_ATIM_EXPIRE 0x00000004
|
||||
#define RAL_TX_DONE 0x00000008
|
||||
#define RAL_ATIM_DONE 0x00000010
|
||||
#define RAL_PRIO_DONE 0x00000020
|
||||
#define RAL_RX_DONE 0x00000040
|
||||
#define RAL_DECRYPTION_DONE 0x00000080
|
||||
#define RAL_ENCRYPTION_DONE 0x00000100
|
||||
|
||||
#define RAL_INTR_MASK \
|
||||
(~(RAL_BEACON_EXPIRE | RAL_WAKEUP_EXPIRE | RAL_TX_DONE | \
|
||||
RAL_PRIO_DONE | RAL_RX_DONE | RAL_DECRYPTION_DONE | \
|
||||
RAL_ENCRYPTION_DONE))
|
||||
|
||||
/* Tx descriptor */
|
||||
struct ral_tx_desc {
|
||||
uint32_t flags;
|
||||
#define RAL_TX_BUSY (1 << 0)
|
||||
#define RAL_TX_VALID (1 << 1)
|
||||
|
||||
#define RAL_TX_RESULT_MASK 0x0000001c
|
||||
#define RAL_TX_SUCCESS (0 << 2)
|
||||
#define RAL_TX_SUCCESS_RETRY (1 << 2)
|
||||
#define RAL_TX_FAIL_RETRY (2 << 2)
|
||||
#define RAL_TX_FAIL_INVALID (3 << 2)
|
||||
#define RAL_TX_FAIL_OTHER (4 << 2)
|
||||
|
||||
#define RAL_TX_MORE_FRAG (1 << 8)
|
||||
#define RAL_TX_ACK (1 << 9)
|
||||
#define RAL_TX_TIMESTAMP (1 << 10)
|
||||
#define RAL_TX_OFDM (1 << 11)
|
||||
#define RAL_TX_CIPHER_BUSY (1 << 12)
|
||||
|
||||
#define RAL_TX_IFS_MASK 0x00006000
|
||||
#define RAL_TX_IFS_BACKOFF (0 << 13)
|
||||
#define RAL_TX_IFS_SIFS (1 << 13)
|
||||
#define RAL_TX_IFS_NEWBACKOFF (2 << 13)
|
||||
#define RAL_TX_IFS_NONE (3 << 13)
|
||||
|
||||
#define RAL_TX_LONG_RETRY (1 << 15)
|
||||
|
||||
#define RAL_TX_CIPHER_MASK 0xe0000000
|
||||
#define RAL_TX_CIPHER_NONE (0 << 29)
|
||||
#define RAL_TX_CIPHER_WEP40 (1 << 29)
|
||||
#define RAL_TX_CIPHER_WEP104 (2 << 29)
|
||||
#define RAL_TX_CIPHER_TKIP (3 << 29)
|
||||
#define RAL_TX_CIPHER_AES (4 << 29)
|
||||
|
||||
uint32_t physaddr;
|
||||
uint16_t wme;
|
||||
#define RAL_LOGCWMAX(x) (((x) & 0xf) << 12)
|
||||
#define RAL_LOGCWMIN(x) (((x) & 0xf) << 8)
|
||||
#define RAL_AIFSN(x) (((x) & 0x3) << 6)
|
||||
#define RAL_IVOFFSET(x) (((x) & 0x3f))
|
||||
|
||||
uint16_t reserved1;
|
||||
uint8_t plcp_signal;
|
||||
uint8_t plcp_service;
|
||||
#define RAL_PLCP_LENGEXT 0x80
|
||||
|
||||
uint16_t plcp_length;
|
||||
uint32_t iv;
|
||||
uint32_t eiv;
|
||||
uint8_t key[IEEE80211_KEYBUF_SIZE];
|
||||
uint32_t reserved2[2];
|
||||
} __packed;
|
||||
|
||||
/* Rx descriptor */
|
||||
struct ral_rx_desc {
|
||||
uint32_t flags;
|
||||
#define RAL_RX_BUSY (1 << 0)
|
||||
#define RAL_RX_CRC_ERROR (1 << 5)
|
||||
#define RAL_RX_PHY_ERROR (1 << 7)
|
||||
#define RAL_RX_CIPHER_BUSY (1 << 8)
|
||||
#define RAL_RX_ICV_ERROR (1 << 9)
|
||||
|
||||
#define RAL_RX_CIPHER_MASK 0xe0000000
|
||||
#define RAL_RX_CIPHER_NONE (0 << 29)
|
||||
#define RAL_RX_CIPHER_WEP40 (1 << 29)
|
||||
#define RAL_RX_CIPHER_WEP104 (2 << 29)
|
||||
#define RAL_RX_CIPHER_TKIP (3 << 29)
|
||||
#define RAL_RX_CIPHER_AES (4 << 29)
|
||||
|
||||
uint32_t physaddr;
|
||||
uint8_t rate;
|
||||
uint8_t rssi;
|
||||
uint8_t ta[IEEE80211_ADDR_LEN];
|
||||
uint32_t iv;
|
||||
uint32_t eiv;
|
||||
uint8_t key[IEEE80211_KEYBUF_SIZE];
|
||||
uint32_t reserved[2];
|
||||
} __packed;
|
||||
|
||||
#define RAL_RF1 0
|
||||
#define RAL_RF2 2
|
||||
#define RAL_RF3 1
|
||||
#define RAL_RF4 3
|
||||
|
||||
#define RAL_RF1_AUTOTUNE 0x08000
|
||||
#define RAL_RF3_AUTOTUNE 0x00040
|
||||
|
||||
#define RAL_BBP_BUSY (1 << 15)
|
||||
#define RAL_BBP_WRITE (1 << 16)
|
||||
#define RAL_RF_20BIT (20 << 24)
|
||||
#define RAL_RF_BUSY (1 << 31)
|
||||
|
||||
#define RAL_RF_2522 0x00
|
||||
#define RAL_RF_2523 0x01
|
||||
#define RAL_RF_2524 0x02
|
||||
#define RAL_RF_2525 0x03
|
||||
#define RAL_RF_2525E 0x04
|
||||
#define RAL_RF_2526 0x05
|
||||
/* dual-band RF */
|
||||
#define RAL_RF_5222 0x10
|
||||
|
||||
#define RAL_BBP_VERSION 0
|
||||
#define RAL_BBP_TX 2
|
||||
#define RAL_BBP_RX 14
|
||||
|
||||
#define RAL_BBP_ANTA 0x00
|
||||
#define RAL_BBP_DIVERSITY 0x01
|
||||
#define RAL_BBP_ANTB 0x02
|
||||
#define RAL_BBP_ANTMASK 0x03
|
||||
#define RAL_BBP_FLIPIQ 0x04
|
||||
|
||||
#define RAL_LED_MODE_DEFAULT 0
|
||||
#define RAL_LED_MODE_TXRX_ACTIVITY 1
|
||||
#define RAL_LED_MODE_SINGLE 2
|
||||
#define RAL_LED_MODE_ASUS 3
|
||||
|
||||
#define RAL_JAPAN_FILTER 0x8
|
||||
|
||||
#define RAL_EEPROM_DELAY 1 /* minimum hold time (microsecond) */
|
||||
|
||||
#define RAL_EEPROM_CONFIG0 16
|
||||
#define RAL_EEPROM_BBP_BASE 19
|
||||
#define RAL_EEPROM_TXPOWER 35
|
||||
|
||||
/*
|
||||
* control and status registers access macros
|
||||
*/
|
||||
#define RAL_READ(sc, reg) \
|
||||
bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg))
|
||||
|
||||
#define RAL_WRITE(sc, reg, val) \
|
||||
bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))
|
||||
|
||||
/*
|
||||
* EEPROM access macro
|
||||
*/
|
||||
#define RAL_EEPROM_CTL(sc, val) do { \
|
||||
RAL_WRITE((sc), RAL_CSR21, (val)); \
|
||||
DELAY(RAL_EEPROM_DELAY); \
|
||||
} while (/* CONSTCOND */0)
|
175
sys/dev/ral/if_ralvar.h
Normal file
175
sys/dev/ral/if_ralvar.h
Normal file
@ -0,0 +1,175 @@
|
||||
/* $FreeBSD$ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2005
|
||||
* Damien Bergamini <damien.bergamini@free.fr>
|
||||
*
|
||||
* Permission to use, copy, modify, and distribute this software for any
|
||||
* purpose with or without fee is hereby granted, provided that the above
|
||||
* copyright notice and this permission notice appear in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
struct ral_rx_radiotap_header {
|
||||
struct ieee80211_radiotap_header wr_ihdr;
|
||||
uint64_t wr_tsf;
|
||||
uint8_t wr_flags;
|
||||
uint16_t wr_chan_freq;
|
||||
uint16_t wr_chan_flags;
|
||||
uint8_t wr_antenna;
|
||||
uint8_t wr_antsignal;
|
||||
};
|
||||
|
||||
#define RAL_RX_RADIOTAP_PRESENT \
|
||||
((1 << IEEE80211_RADIOTAP_TSFT) | \
|
||||
(1 << IEEE80211_RADIOTAP_FLAGS) | \
|
||||
(1 << IEEE80211_RADIOTAP_CHANNEL) | \
|
||||
(1 << IEEE80211_RADIOTAP_ANTENNA) | \
|
||||
(1 << IEEE80211_RADIOTAP_DB_ANTSIGNAL))
|
||||
|
||||
struct ral_tx_radiotap_header {
|
||||
struct ieee80211_radiotap_header wt_ihdr;
|
||||
uint8_t wt_flags;
|
||||
uint8_t wt_rate;
|
||||
uint16_t wt_chan_freq;
|
||||
uint16_t wt_chan_flags;
|
||||
uint8_t wt_antenna;
|
||||
};
|
||||
|
||||
#define RAL_TX_RADIOTAP_PRESENT \
|
||||
((1 << IEEE80211_RADIOTAP_FLAGS) | \
|
||||
(1 << IEEE80211_RADIOTAP_RATE) | \
|
||||
(1 << IEEE80211_RADIOTAP_CHANNEL) | \
|
||||
(1 << IEEE80211_RADIOTAP_ANTENNA))
|
||||
|
||||
struct ral_tx_data {
|
||||
bus_dmamap_t map;
|
||||
struct mbuf *m;
|
||||
struct ieee80211_node *ni;
|
||||
struct ral_rssdesc id;
|
||||
};
|
||||
|
||||
struct ral_tx_ring {
|
||||
bus_dma_tag_t desc_dmat;
|
||||
bus_dma_tag_t data_dmat;
|
||||
bus_dmamap_t desc_map;
|
||||
bus_addr_t physaddr;
|
||||
struct ral_tx_desc *desc;
|
||||
struct ral_tx_data *data;
|
||||
int count;
|
||||
int queued;
|
||||
int cur;
|
||||
int next;
|
||||
int cur_encrypt;
|
||||
int next_encrypt;
|
||||
};
|
||||
|
||||
struct ral_rx_data {
|
||||
bus_dmamap_t map;
|
||||
struct mbuf *m;
|
||||
int drop;
|
||||
};
|
||||
|
||||
struct ral_rx_ring {
|
||||
bus_dma_tag_t desc_dmat;
|
||||
bus_dma_tag_t data_dmat;
|
||||
bus_dmamap_t desc_map;
|
||||
bus_addr_t physaddr;
|
||||
struct ral_rx_desc *desc;
|
||||
struct ral_rx_data *data;
|
||||
int count;
|
||||
int cur;
|
||||
int next;
|
||||
int cur_decrypt;
|
||||
};
|
||||
|
||||
struct ral_node {
|
||||
struct ieee80211_node ni;
|
||||
struct ral_rssadapt rssadapt;
|
||||
};
|
||||
|
||||
struct ral_softc {
|
||||
struct arpcom sc_arp;
|
||||
struct ieee80211com sc_ic;
|
||||
int (*sc_newstate)(struct ieee80211com *,
|
||||
enum ieee80211_state, int);
|
||||
device_t sc_dev;
|
||||
|
||||
struct mtx sc_mtx;
|
||||
|
||||
struct callout scan_ch;
|
||||
struct callout rssadapt_ch;
|
||||
|
||||
int irq_rid;
|
||||
int mem_rid;
|
||||
struct resource *irq;
|
||||
struct resource *mem;
|
||||
bus_space_tag_t sc_st;
|
||||
bus_space_handle_t sc_sh;
|
||||
void *sc_ih;
|
||||
|
||||
int sc_tx_timer;
|
||||
|
||||
uint32_t asic_rev;
|
||||
uint32_t eeprom_rev;
|
||||
uint8_t rf_rev;
|
||||
|
||||
struct ral_tx_ring txq;
|
||||
struct ral_tx_ring prioq;
|
||||
struct ral_tx_ring atimq;
|
||||
struct ral_tx_ring bcnq;
|
||||
struct ral_rx_ring rxq;
|
||||
|
||||
struct ieee80211_beacon_offsets sc_bo;
|
||||
|
||||
uint32_t rf_regs[4];
|
||||
uint8_t txpow[14];
|
||||
|
||||
struct {
|
||||
uint8_t reg;
|
||||
uint8_t val;
|
||||
} bbp_prom[16];
|
||||
|
||||
int led_mode;
|
||||
int hw_radio;
|
||||
int rx_ant;
|
||||
int tx_ant;
|
||||
int nb_ant;
|
||||
|
||||
int dwelltime;
|
||||
|
||||
struct bpf_if *sc_drvbpf;
|
||||
|
||||
union {
|
||||
struct ral_rx_radiotap_header th;
|
||||
uint8_t pad[64];
|
||||
} sc_rxtapu;
|
||||
#define sc_rxtap sc_rxtapu.th
|
||||
int sc_rxtap_len;
|
||||
|
||||
union {
|
||||
struct ral_tx_radiotap_header th;
|
||||
uint8_t pad[64];
|
||||
} sc_txtapu;
|
||||
#define sc_txtap sc_txtapu.th
|
||||
int sc_txtap_len;
|
||||
};
|
||||
|
||||
extern devclass_t ral_devclass;
|
||||
|
||||
int ral_attach(device_t);
|
||||
int ral_detach(device_t);
|
||||
void ral_shutdown(device_t);
|
||||
int ral_alloc(device_t, int);
|
||||
void ral_free(device_t);
|
||||
void ral_stop(void *);
|
||||
|
||||
#define RAL_LOCK(sc) mtx_lock(&(sc)->sc_mtx)
|
||||
#define RAL_UNLOCK(sc) mtx_unlock(&(sc)->sc_mtx)
|
2060
sys/dev/usb/if_ural.c
Normal file
2060
sys/dev/usb/if_ural.c
Normal file
File diff suppressed because it is too large
Load Diff
200
sys/dev/usb/if_uralreg.h
Normal file
200
sys/dev/usb/if_uralreg.h
Normal file
@ -0,0 +1,200 @@
|
||||
/* $FreeBSD$ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2005
|
||||
* Damien Bergamini <damien.bergamini@free.fr>
|
||||
*
|
||||
* Permission to use, copy, modify, and distribute this software for any
|
||||
* purpose with or without fee is hereby granted, provided that the above
|
||||
* copyright notice and this permission notice appear in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
#define RAL_RX_DESC_SIZE (sizeof (struct ural_rx_desc))
|
||||
#define RAL_TX_DESC_SIZE (sizeof (struct ural_tx_desc))
|
||||
|
||||
#define RAL_CONFIG_NO 1
|
||||
#define RAL_IFACE_INDEX 0
|
||||
|
||||
#define RAL_WRITE_MAC 0x02
|
||||
#define RAL_READ_MAC 0x03
|
||||
#define RAL_WRITE_MULTI_MAC 0x06
|
||||
#define RAL_READ_MULTI_MAC 0x07
|
||||
#define RAL_READ_EEPROM 0x09
|
||||
|
||||
/*
|
||||
* MAC registers.
|
||||
*/
|
||||
#define RAL_MAC_CSR0 0x0400 /* ASIC Version */
|
||||
#define RAL_MAC_CSR1 0x0402 /* System control */
|
||||
#define RAL_MAC_CSR2 0x0404 /* MAC addr0 */
|
||||
#define RAL_MAC_CSR3 0x0406 /* MAC addr1 */
|
||||
#define RAL_MAC_CSR4 0x0408 /* MAC addr2 */
|
||||
#define RAL_MAC_CSR5 0x040a /* BSSID0 */
|
||||
#define RAL_MAC_CSR6 0x040c /* BSSID1 */
|
||||
#define RAL_MAC_CSR7 0x040e /* BSSID2 */
|
||||
#define RAL_MAC_CSR8 0x0410 /* Max frame length */
|
||||
#define RAL_MAC_CSR9 0x0412 /* Timer control */
|
||||
#define RAL_MAC_CSR11 0x0416 /* IFS */
|
||||
#define RAL_MAC_CSR12 0x0418 /* EIFS */
|
||||
#define RAL_MAC_CSR13 0x041a /* Power mode0 */
|
||||
#define RAL_MAC_CSR14 0x041c /* Power mode1 */
|
||||
#define RAL_MAC_CSR15 0x041e /* Power saving transition0 */
|
||||
#define RAL_MAC_CSR16 0x0420 /* Power saving transition1 */
|
||||
#define RAL_MAC_CSR17 0x0422 /* Power state control */
|
||||
#define RAL_MAC_CSR18 0x0424 /* Auto wake-up control */
|
||||
#define RAL_MAC_CSR19 0x0426 /* GPIO control */
|
||||
#define RAL_MAC_CSR20 0x0428 /* LED control0 */
|
||||
#define RAL_MAC_CSR22 0x042c /* XXX not documented */
|
||||
|
||||
/*
|
||||
* Tx/Rx Registers.
|
||||
*/
|
||||
#define RAL_TXRX_CSR0 0x0440 /* Security control */
|
||||
#define RAL_TXRX_CSR2 0x0444 /* Rx control */
|
||||
#define RAL_TXRX_CSR5 0x044a /* CCK Tx BBP ID0 */
|
||||
#define RAL_TXRX_CSR6 0x044c /* CCK Tx BBP ID1 */
|
||||
#define RAL_TXRX_CSR7 0x044e /* OFDM Tx BBP ID0 */
|
||||
#define RAL_TXRX_CSR8 0x0450 /* OFDM Tx BBP ID1 */
|
||||
#define RAL_TXRX_CSR11 0x0456 /* Auto responder basic rate */
|
||||
#define RAL_TXRX_CSR18 0x0464 /* Beacon interval */
|
||||
#define RAL_TXRX_CSR19 0x0466 /* Beacon/sync control */
|
||||
#define RAL_TXRX_CSR20 0x0468 /* Beacon alignment */
|
||||
#define RAL_TXRX_CSR21 0x046a /* XXX not documented */
|
||||
|
||||
/*
|
||||
* Security registers.
|
||||
*/
|
||||
#define RAL_SEC_CSR0 0x0480 /* Shared key 0, word 0 */
|
||||
|
||||
/*
|
||||
* PHY registers.
|
||||
*/
|
||||
#define RAL_PHY_CSR2 0x04c4 /* Tx MAC configuration */
|
||||
#define RAL_PHY_CSR4 0x04c8 /* Interface configuration */
|
||||
#define RAL_PHY_CSR5 0x04ca /* BBP Pre-Tx CCK */
|
||||
#define RAL_PHY_CSR6 0x04cc /* BBP Pre-Tx OFDM */
|
||||
#define RAL_PHY_CSR7 0x04ce /* BBP serial control */
|
||||
#define RAL_PHY_CSR8 0x04d0 /* BBP serial status */
|
||||
#define RAL_PHY_CSR9 0x04d2 /* RF serial control0 */
|
||||
#define RAL_PHY_CSR10 0x04d4 /* RF serial control1 */
|
||||
|
||||
/*
|
||||
* Statistics registers.
|
||||
*/
|
||||
#define RAL_STA_CSR0 0x04e0 /* FCS error */
|
||||
|
||||
|
||||
#define RAL_DISABLE_RX (1 << 0)
|
||||
#define RAL_DROP_CRC (1 << 1)
|
||||
#define RAL_DROP_PHY (1 << 2)
|
||||
#define RAL_DROP_CTL (1 << 3)
|
||||
#define RAL_DROP_NOT_TO_ME (1 << 4)
|
||||
#define RAL_DROP_TODS (1 << 5)
|
||||
#define RAL_DROP_BAD_VERSION (1 << 6)
|
||||
#define RAL_DROP_MULTICAST (1 << 9)
|
||||
#define RAL_DROP_BROADCAST (1 << 10)
|
||||
|
||||
#define RAL_RESET_ASIC (1 << 0)
|
||||
#define RAL_RESET_BBP (1 << 1)
|
||||
#define RAL_HOST_READY (1 << 2)
|
||||
|
||||
#define RAL_ENABLE_TSF (1 << 0)
|
||||
#define RAL_ENABLE_TSF_SYNC(x) (((x) & 0x3) << 1)
|
||||
#define RAL_ENABLE_TBCN (1 << 3)
|
||||
#define RAL_ENABLE_BEACON_GENERATOR (1 << 4)
|
||||
|
||||
#define RAL_RF_AWAKE (3 << 7)
|
||||
#define RAL_BBP_AWAKE (3 << 5)
|
||||
|
||||
#define RAL_BBP_WRITE (1 << 15)
|
||||
#define RAL_BBP_BUSY (1 << 0)
|
||||
|
||||
#define RAL_RF1_AUTOTUNE 0x08000
|
||||
#define RAL_RF3_AUTOTUNE 0x00040
|
||||
|
||||
#define RAL_RF_2522 0x00
|
||||
#define RAL_RF_2523 0x01
|
||||
#define RAL_RF_2524 0x02
|
||||
#define RAL_RF_2525 0x03
|
||||
#define RAL_RF_2525E 0x04
|
||||
#define RAL_RF_2526 0x05
|
||||
/* dual-band RF */
|
||||
#define RAL_RF_5222 0x10
|
||||
|
||||
#define RAL_BBP_VERSION 0
|
||||
#define RAL_BBP_TX 2
|
||||
#define RAL_BBP_RX 14
|
||||
|
||||
#define RAL_BBP_ANTA 0x00
|
||||
#define RAL_BBP_DIVERSITY 0x01
|
||||
#define RAL_BBP_ANTB 0x02
|
||||
#define RAL_BBP_ANTMASK 0x03
|
||||
#define RAL_BBP_FLIPIQ 0x04
|
||||
|
||||
#define RAL_JAPAN_FILTER 0x08
|
||||
|
||||
struct ural_tx_desc {
|
||||
uint32_t flags;
|
||||
#define RAL_TX_RETRY(x) ((x) << 4)
|
||||
#define RAL_TX_MORE_FRAG (1 << 8)
|
||||
#define RAL_TX_ACK (1 << 9)
|
||||
#define RAL_TX_TIMESTAMP (1 << 10)
|
||||
#define RAL_TX_OFDM (1 << 11)
|
||||
#define RAL_TX_NEWSEQ (1 << 12)
|
||||
|
||||
#define RAL_TX_IFS_MASK 0x00006000
|
||||
#define RAL_TX_IFS_BACKOFF (0 << 13)
|
||||
#define RAL_TX_IFS_SIFS (1 << 13)
|
||||
#define RAL_TX_IFS_NEWBACKOFF (2 << 13)
|
||||
#define RAL_TX_IFS_NONE (3 << 13)
|
||||
|
||||
uint16_t wme;
|
||||
#define RAL_LOGCWMAX(x) (((x) & 0xf) << 12)
|
||||
#define RAL_LOGCWMIN(x) (((x) & 0xf) << 8)
|
||||
#define RAL_AIFSN(x) (((x) & 0x3) << 6)
|
||||
#define RAL_IVOFFSET(x) (((x) & 0x3f))
|
||||
|
||||
uint16_t reserved1;
|
||||
uint8_t plcp_signal;
|
||||
uint8_t plcp_service;
|
||||
#define RAL_PLCP_LENGEXT 0x80
|
||||
|
||||
uint16_t plcp_length;
|
||||
uint32_t iv;
|
||||
uint32_t eiv;
|
||||
} __packed;
|
||||
|
||||
struct ural_rx_desc {
|
||||
uint32_t flags;
|
||||
#define RAL_RX_CRC_ERROR (1 << 5)
|
||||
#define RAL_RX_PHY_ERROR (1 << 7)
|
||||
|
||||
uint8_t rate;
|
||||
uint8_t rssi;
|
||||
uint16_t reserved;
|
||||
|
||||
uint32_t iv;
|
||||
uint32_t eiv;
|
||||
} __packed;
|
||||
|
||||
#define RAL_RF_LOBUSY (1 << 15)
|
||||
#define RAL_RF_BUSY (1 << 31)
|
||||
#define RAL_RF_20BIT (20 << 24)
|
||||
|
||||
#define RAL_RF1 0
|
||||
#define RAL_RF2 2
|
||||
#define RAL_RF3 1
|
||||
#define RAL_RF4 3
|
||||
|
||||
#define RAL_EEPROM_ADDRESS 0x0004
|
||||
#define RAL_EEPROM_TXPOWER 0x003c
|
||||
#define RAL_EEPROM_CONFIG0 0x0016
|
||||
#define RAL_EEPROM_BBP_BASE 0x001c
|
140
sys/dev/usb/if_uralvar.h
Normal file
140
sys/dev/usb/if_uralvar.h
Normal file
@ -0,0 +1,140 @@
|
||||
/* $FreeBSD$ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2005
|
||||
* Damien Bergamini <damien.bergamini@free.fr>
|
||||
*
|
||||
* Permission to use, copy, modify, and distribute this software for any
|
||||
* purpose with or without fee is hereby granted, provided that the above
|
||||
* copyright notice and this permission notice appear in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
#define RAL_RX_LIST_COUNT 1
|
||||
#define RAL_TX_LIST_COUNT 1
|
||||
|
||||
struct ural_rx_radiotap_header {
|
||||
struct ieee80211_radiotap_header wr_ihdr;
|
||||
uint8_t wr_flags;
|
||||
uint16_t wr_chan_freq;
|
||||
uint16_t wr_chan_flags;
|
||||
uint8_t wr_antenna;
|
||||
uint8_t wr_antsignal;
|
||||
};
|
||||
|
||||
#define RAL_RX_RADIOTAP_PRESENT \
|
||||
((1 << IEEE80211_RADIOTAP_FLAGS) | \
|
||||
(1 << IEEE80211_RADIOTAP_CHANNEL) | \
|
||||
(1 << IEEE80211_RADIOTAP_ANTENNA) | \
|
||||
(1 << IEEE80211_RADIOTAP_DB_ANTSIGNAL))
|
||||
|
||||
struct ural_tx_radiotap_header {
|
||||
struct ieee80211_radiotap_header wt_ihdr;
|
||||
uint8_t wt_flags;
|
||||
uint8_t wt_rate;
|
||||
uint16_t wt_chan_freq;
|
||||
uint16_t wt_chan_flags;
|
||||
uint8_t wt_antenna;
|
||||
};
|
||||
|
||||
#define RAL_TX_RADIOTAP_PRESENT \
|
||||
((1 << IEEE80211_RADIOTAP_FLAGS) | \
|
||||
(1 << IEEE80211_RADIOTAP_RATE) | \
|
||||
(1 << IEEE80211_RADIOTAP_CHANNEL) | \
|
||||
(1 << IEEE80211_RADIOTAP_ANTENNA))
|
||||
|
||||
struct ural_softc;
|
||||
|
||||
struct ural_tx_data {
|
||||
struct ural_softc *sc;
|
||||
usbd_xfer_handle xfer;
|
||||
uint8_t *buf;
|
||||
struct mbuf *m;
|
||||
struct ieee80211_node *ni;
|
||||
};
|
||||
|
||||
struct ural_rx_data {
|
||||
struct ural_softc *sc;
|
||||
usbd_xfer_handle xfer;
|
||||
uint8_t *buf;
|
||||
struct mbuf *m;
|
||||
};
|
||||
|
||||
struct ural_softc {
|
||||
struct arpcom sc_arp;
|
||||
struct ieee80211com sc_ic;
|
||||
int (*sc_newstate)(struct ieee80211com *,
|
||||
enum ieee80211_state, int);
|
||||
USBBASEDEVICE sc_dev;
|
||||
usbd_device_handle sc_udev;
|
||||
usbd_interface_handle sc_iface;
|
||||
|
||||
uint8_t sc_rx_no;
|
||||
uint8_t sc_tx_no;
|
||||
|
||||
uint32_t asic_rev;
|
||||
uint8_t rf_rev;
|
||||
|
||||
usbd_pipe_handle sc_rx_pipeh;
|
||||
usbd_pipe_handle sc_tx_pipeh;
|
||||
|
||||
enum ieee80211_state sc_state;
|
||||
struct usb_task sc_task;
|
||||
|
||||
struct ural_rx_data rx_data[RAL_RX_LIST_COUNT];
|
||||
struct ural_tx_data tx_data[RAL_TX_LIST_COUNT];
|
||||
int tx_queued;
|
||||
|
||||
struct ieee80211_beacon_offsets sc_bo;
|
||||
|
||||
struct mtx sc_mtx;
|
||||
|
||||
struct callout scan_ch;
|
||||
|
||||
int sc_tx_timer;
|
||||
|
||||
uint32_t rf_regs[4];
|
||||
uint8_t txpow[14];
|
||||
|
||||
struct {
|
||||
uint8_t val;
|
||||
uint8_t reg;
|
||||
} __packed bbp_prom[16];
|
||||
|
||||
int led_mode;
|
||||
int hw_radio;
|
||||
int rx_ant;
|
||||
int tx_ant;
|
||||
int nb_ant;
|
||||
|
||||
struct bpf_if *sc_drvbpf;
|
||||
|
||||
union {
|
||||
struct ural_rx_radiotap_header th;
|
||||
uint8_t pad[64];
|
||||
} sc_rxtapu;
|
||||
#define sc_rxtap sc_rxtapu.th
|
||||
int sc_rxtap_len;
|
||||
|
||||
union {
|
||||
struct ural_tx_radiotap_header th;
|
||||
uint8_t pad[64];
|
||||
} sc_txtapu;
|
||||
#define sc_txtap sc_txtapu.th
|
||||
int sc_txtap_len;
|
||||
};
|
||||
|
||||
#if 0
|
||||
#define RAL_LOCK(sc) mtx_lock(&(sc)->sc_mtx)
|
||||
#define RAL_UNLOCK(sc) mtx_unlock(&(sc)->sc_mtx)
|
||||
#else
|
||||
#define RAL_LOCK(sc) do { ((sc) = (sc)); mtx_lock(&Giant); } while (0)
|
||||
#define RAL_UNLOCK(sc) mtx_unlock(&Giant)
|
||||
#endif
|
@ -452,6 +452,7 @@ vendor GREENHOUSE 0x0a6b GREENHOUSE
|
||||
vendor GEOCAST 0x0a79 Geocast
|
||||
vendor NEODIO 0x0aec Neodio
|
||||
vendor VODAFONE 0x0af0 Vodafone
|
||||
vendor ASUS 0x0b05 ASUS
|
||||
vendor TODOS 0x0b0c Todos Data System
|
||||
vendor SIIG2 0x0b39 SIIG
|
||||
vendor TEKRAM 0x0b3b Tekram
|
||||
@ -499,8 +500,11 @@ vendor CREATIVE2 0x1292 Creative Labs
|
||||
vendor BELKIN2 0x1293 Belkin
|
||||
vendor AINCOMM 0x12fd Aincomm
|
||||
vendor MOBILITY 0x1342 Mobility
|
||||
vendor LINKSYS4 0x13b1 Linksys
|
||||
vendor SHARK 0x13d2 Shark
|
||||
vendor SILICOM 0x1485 Silicom
|
||||
vendor RALINK 0x148f Ralink Technology
|
||||
vendor CONCEPTRONIC 0x14b2 Conceptronic
|
||||
vendor SILICONPORTALS 0x1527 Silicon Portals
|
||||
vendor SOHOWARE 0x15e8 SOHOware
|
||||
vendor UMAX 0x1606 UMAX
|
||||
@ -643,6 +647,9 @@ product ASAHIOPTICAL OPTIO330 0x0006 Digital camera
|
||||
/* ASIX Electronics products */
|
||||
product ASIX AX88172 0x1720 10/100 ethernet
|
||||
|
||||
/* ASUS products */
|
||||
product ASUS WL167G 0x1707 WL-167g wireless adapter
|
||||
|
||||
/* ATen products */
|
||||
product ATEN UC1284 0x2001 Parallel printer
|
||||
product ATEN UC10T 0x2002 10Mbps ethernet
|
||||
@ -742,6 +749,9 @@ product FTDI SEMC_DSS20 0xfc82 SEMC DSS-20 SyncStation
|
||||
product CSR BT_DONGLE 0x0001 Bluetooth USB dongle
|
||||
product CSR CSRDFU 0xffff USB Bluetooth Device in DFU State
|
||||
|
||||
/* Conceptronic products */
|
||||
product CONCEPTRONIC C54U 0x3c02 C54U wireless adapter
|
||||
|
||||
/* CTX products */
|
||||
product CTX EX1300 0x9999 Ex1300 hub
|
||||
|
||||
@ -776,6 +786,7 @@ product DIGI ACCELEPORT8 0x0008 AccelePort USB 8
|
||||
/*product DLINK DSBS25 0x0100 DSB-S25 serial*/
|
||||
product DLINK DUBE100 0x1a00 10/100 ethernet
|
||||
product DLINK DSB650TX4 0x200c 10/100 ethernet
|
||||
product DLINK DWLG122 0x3c00 DWL-G122 b1 wireless adapter
|
||||
product DLINK DSB650C 0x4000 10Mbps ethernet
|
||||
product DLINK DSB650TX1 0x4001 10/100 ethernet
|
||||
product DLINK DSB650TX 0x4002 10/100 ethernet
|
||||
@ -1061,6 +1072,8 @@ product LINKSYS USB10TX2 0x400b USB10TX
|
||||
product LINKSYS2 WUSB11 0x2219 WUSB11 Wireless adapter
|
||||
product LINKSYS2 USB200M 0x2226 USB 2.0 10/100 ethernet
|
||||
product LINKSYS3 WUSB11v28 0x2233 WUSB11 v2.8 wireless adapter
|
||||
product LINKSYS4 WUSB54G 0x000d WUSB54G wireless adapter
|
||||
product LINKSYS4 WUSB54GP 0x0011 WUSB54GP wireless adapter
|
||||
|
||||
/* Logitech products */
|
||||
product LOGITECH M2452 0x0203 M2452 keyboard
|
||||
@ -1118,6 +1131,7 @@ product MELCO LUA2TX5 0x0009 LUA2-TX Ethernet
|
||||
product MELCO LUAKTX 0x0012 LUA-KTX Ethernet
|
||||
product MELCO DUBPXXG 0x001c USB-IDE Bridge: DUB-PxxG
|
||||
product MELCO LUAU2KTX 0x003d LUA-U2-KTX Ethernet
|
||||
product MELCO KG54 0x0066 KG54 wireless adapter
|
||||
|
||||
/* Metricom products */
|
||||
product METRICOM RICOCHET_GS 0x0001 Ricochet GS
|
||||
@ -1317,6 +1331,10 @@ product QUICKSHOT STRIKEPAD 0x6238 USB StrikePad
|
||||
/* Rainbow Technologies products */
|
||||
product RAINBOW IKEY2000 0x1200 i-Key 2000
|
||||
|
||||
/* Ralink Technology products */
|
||||
product RALINK RT2570 0x1706 RT2500USB wireless adapter
|
||||
product RALINK RT2570_2 0x2570 RT2500USB wireless adapter
|
||||
|
||||
/* ReakTek products */
|
||||
product REALTEK USBKR100 0x8150 USBKR100 USB Ethernet (GREEN HOUSE)
|
||||
|
||||
@ -1400,6 +1418,7 @@ product SMARTBRIDGES SMARTNIC 0x0003 smartNIC 2 PnP ethernet
|
||||
product SMC 2102USB 0x0100 10Mbps ethernet
|
||||
product SMC 2202USB 0x0200 10/100 ethernet
|
||||
product SMC 2206USB 0x0201 EZ Connect USB Ethernet
|
||||
product SMC 2862WG 0xee13 EZ Connect wireless adapter
|
||||
product SMC2 2020HUB 0x2020 USB Hub
|
||||
product SMC3 2662WUSB 0xa002 2662W-AR Wireless
|
||||
|
||||
|
@ -116,8 +116,10 @@ SUBDIR= ${_3dfx} \
|
||||
ipfw \
|
||||
ip_mroute_mod \
|
||||
${_ips} \
|
||||
ipw \
|
||||
isp \
|
||||
ispfw \
|
||||
iwi \
|
||||
joy \
|
||||
kue \
|
||||
lge \
|
||||
@ -181,6 +183,7 @@ SUBDIR= ${_3dfx} \
|
||||
procfs \
|
||||
pseudofs \
|
||||
${_pst} \
|
||||
ral \
|
||||
${_random} \
|
||||
${_ray} \
|
||||
rc \
|
||||
@ -243,6 +246,7 @@ SUBDIR= ${_3dfx} \
|
||||
ums \
|
||||
unionfs \
|
||||
uplcom \
|
||||
ural \
|
||||
urio \
|
||||
usb \
|
||||
uscanner \
|
||||
|
8
sys/modules/ipw/Makefile
Normal file
8
sys/modules/ipw/Makefile
Normal file
@ -0,0 +1,8 @@
|
||||
# $FreeBSD$
|
||||
|
||||
.PATH: ${.CURDIR}/../../dev/ipw
|
||||
|
||||
KMOD = if_ipw
|
||||
SRCS = if_ipw.c opt_bdg.h device_if.h bus_if.h pci_if.h
|
||||
|
||||
.include <bsd.kmod.mk>
|
8
sys/modules/iwi/Makefile
Normal file
8
sys/modules/iwi/Makefile
Normal file
@ -0,0 +1,8 @@
|
||||
# $FreeBSD$
|
||||
|
||||
.PATH: ${.CURDIR}/../../dev/iwi
|
||||
|
||||
KMOD = if_iwi
|
||||
SRCS = if_iwi.c opt_bdg.h device_if.h bus_if.h pci_if.h
|
||||
|
||||
.include <bsd.kmod.mk>
|
9
sys/modules/ral/Makefile
Normal file
9
sys/modules/ral/Makefile
Normal file
@ -0,0 +1,9 @@
|
||||
# $FreeBSD$
|
||||
|
||||
.PATH: ${.CURDIR}/../../dev/ral
|
||||
|
||||
KMOD = if_ral
|
||||
SRCS = if_ral.c if_ralrate.c if_ral_pccard.c if_ral_pci.c \
|
||||
opt_bdg.h device_if.h bus_if.h pci_if.h card_if.h pccarddevs.h
|
||||
|
||||
.include <bsd.kmod.mk>
|
8
sys/modules/ural/Makefile
Normal file
8
sys/modules/ural/Makefile
Normal file
@ -0,0 +1,8 @@
|
||||
# $FreeBSD$
|
||||
|
||||
.PATH: ${.CURDIR}/../../dev/usb
|
||||
|
||||
KMOD = if_ural
|
||||
SRCS = if_ural.c opt_bdg.h opt_usb.h device_if.h bus_if.h usbdevs.h
|
||||
|
||||
.include <bsd.kmod.mk>
|
Loading…
Reference in New Issue
Block a user