o Switch to physical addressing before dereferencing the VHPT
bucket pointer. The virtual mapping may not be present in the translation cache. This will result in a nested TLB fault at a place we don't handle (and don't want to handle). o Make sure there's a stop after the rfi instruction, otherwise its behaviour is undefined. o Make sure we switch back to virtual addressing before doing a rfi. Behaviour is undefined otherwise. Approved by: re (blanket)
This commit is contained in:
Marcel Moolenaar
parent
ea5e2a02af
commit
cf681ceef5
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=171666
@ -416,19 +416,20 @@ END(exception_save)
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ENTRY_NOPROFILE(exception_restore, 0)
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{ .mmi
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rsm psr.i
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add sp=16,sp
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nop 0
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add r3=SIZEOF_TRAPFRAME-16,sp
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add r2=SIZEOF_TRAPFRAME,sp
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;;
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}
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{ .mmi
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add r3=SIZEOF_TRAPFRAME-32,sp
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add r2=SIZEOF_TRAPFRAME-16,sp
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add r8=SIZEOF_SPECIAL+16,sp
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srlz.d
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add r8=SIZEOF_SPECIAL+32,sp
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nop 0
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;;
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}
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// The next load can trap. Let it be...
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ldf.fill f15=[r2],-32 // f15
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ldf.fill f14=[r3],-32 // f14
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add sp=16,sp
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;;
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ldf.fill f13=[r2],-32 // f13
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ldf.fill f12=[r3],-32 // f12
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@ -611,7 +612,7 @@ exception_restore_restart:
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{ .mmi
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mov cr.ipsr=r24
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mov cr.ifs=r26
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mov pr=r18,0x1fffe
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mov pr=r18,0x1ffff
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;;
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}
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{ .mmb
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@ -708,15 +709,15 @@ IVT_ENTRY(Instruction_TLB, 0x0400)
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ld8 r21=[r18] // read pte
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;;
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itc.i r21 // insert pte
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;;
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mov pr=r17,0x1ffff
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;;
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rfi // done
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;;
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1: ld8 r20=[r20] // first entry
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;;
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rsm psr.dt // turn off data translations
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1: rsm psr.dt // turn off data translations
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dep r20=0,r20,61,3 // convert vhpt ptr to physical
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;;
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srlz.d // serialize
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ld8 r20=[r20] // first entry
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;;
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2: cmp.eq p15,p0=r0,r20 // done?
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(p15) br.cond.spnt.few 9f // bail if done
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@ -751,17 +752,19 @@ IVT_ENTRY(Instruction_TLB, 0x0400)
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st8.rel [r18]=r19 // store new tag
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;;
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itc.i r21 // and place in TLB
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ssm psr.dt
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;;
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srlz.d
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mov pr=r17,0x1ffff // restore predicates
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rfi
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;;
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3: add r20=24,r20 // next in chain
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;;
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ld8 r20=[r20] // read chain
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br.cond.sptk.few 2b // loop
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9: mov pr=r17,0x1ffff // restore predicates
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ssm psr.dt
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;;
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9: ssm psr.dt
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mov pr=r17,0x1ffff // restore predicates
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;;
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srlz.d
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;;
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@ -787,15 +790,15 @@ IVT_ENTRY(Data_TLB, 0x0800)
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ld8 r21=[r18] // read pte
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;;
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itc.d r21 // insert pte
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;;
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mov pr=r17,0x1ffff
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;;
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rfi // done
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;;
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1: ld8 r20=[r20] // first entry
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1: rsm psr.dt // turn off data translations
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dep r20=0,r20,61,3 // convert vhpt ptr to physical
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;;
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rsm psr.dt // turn off data translations
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;;
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srlz.d // serialize
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ld8 r20=[r20] // first entry
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;;
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2: cmp.eq p15,p0=r0,r20 // done?
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(p15) br.cond.spnt.few 9f // bail if done
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@ -830,17 +833,19 @@ IVT_ENTRY(Data_TLB, 0x0800)
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st8.rel [r18]=r19 // store new tag
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;;
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itc.d r21 // and place in TLB
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ssm psr.dt
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;;
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srlz.d
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mov pr=r17,0x1ffff // restore predicates
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rfi
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;;
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3: add r20=24,r20 // next in chain
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;;
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ld8 r20=[r20] // read chain
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br.cond.sptk.few 2b // loop
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9: mov pr=r17,0x1ffff // restore predicates
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ssm psr.dt
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;;
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9: ssm psr.dt
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mov pr=r17,0x1ffff // restore predicates
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;;
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srlz.d
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;;
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@ -870,6 +875,7 @@ IVT_ENTRY(Alternate_Instruction_TLB, 0x0c00)
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mov pr=r18,0x1ffff // restore predicates
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;;
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rfi
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;;
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9: mov pr=r18,0x1ffff // restore predicates
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CALL(trap, 3, cr.ifa)
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IVT_END(Alternate_Instruction_TLB)
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@ -897,6 +903,7 @@ IVT_ENTRY(Alternate_Data_TLB, 0x1000)
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mov pr=r18,0x1ffff // restore predicates
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;;
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rfi
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;;
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9: mov pr=r18,0x1ffff // restore predicates
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CALL(trap, 4, cr.ifa)
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IVT_END(Alternate_Data_TLB)
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@ -1005,11 +1012,11 @@ IVT_ENTRY(Dirty_Bit, 0x2000)
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;;
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ld8 r20=[r20] // bucket head
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;;
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ld8 r20=[r20] // first entry
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;;
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rsm psr.dt // turn off data translations
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dep r20=0,r20,61,3 // convert vhpt ptr to physical
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;;
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srlz.d // serialize
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ld8 r20=[r20] // first entry
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;;
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1: cmp.eq p15,p0=r0,r20 // done?
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(p15) br.cond.spnt.few 9f // bail if done
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@ -1049,16 +1056,22 @@ IVT_ENTRY(Dirty_Bit, 0x2000)
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st8.rel [r18]=r19 // store new tag
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;;
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itc.d r21 // and place in TLB
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ssm psr.dt
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;;
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srlz.d
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mov pr=r17,0x1ffff // restore predicates
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rfi
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;;
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2: add r20=24,r20 // next in chain
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;;
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ld8 r20=[r20] // read chain
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br.cond.sptk.few 1b // loop
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9: mov pr=r17,0x1ffff // restore predicates
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;;
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9: ssm psr.dt
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mov pr=r17,0x1ffff // restore predicates
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;;
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srlz.d
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;;
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CALL(trap, 8, cr.ifa) // die horribly
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IVT_END(Dirty_Bit)
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@ -1073,11 +1086,11 @@ IVT_ENTRY(Instruction_Access_Bit, 0x2400)
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;;
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ld8 r20=[r20] // bucket head
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;;
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ld8 r20=[r20] // first entry
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;;
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rsm psr.dt // turn off data translations
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dep r20=0,r20,61,3 // convert vhpt ptr to physical
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;;
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srlz.d // serialize
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ld8 r20=[r20] // first entry
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;;
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1: cmp.eq p15,p0=r0,r20 // done?
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(p15) br.cond.spnt.few 9f // bail if done
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@ -1117,16 +1130,22 @@ IVT_ENTRY(Instruction_Access_Bit, 0x2400)
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st8.rel [r18]=r19 // store new tag
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;;
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itc.i r21 // and place in TLB
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ssm psr.dt
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;;
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srlz.d
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mov pr=r17,0x1ffff // restore predicates
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rfi // walker will retry the access
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;;
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2: add r20=24,r20 // next in chain
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;;
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ld8 r20=[r20] // read chain
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br.cond.sptk.few 1b // loop
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9: mov pr=r17,0x1ffff // restore predicates
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;;
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9: ssm psr.dt
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mov pr=r17,0x1ffff // restore predicates
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;;
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srlz.d
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;;
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CALL(trap, 9, cr.ifa)
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IVT_END(Instruction_Access_Bit)
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@ -1141,11 +1160,11 @@ IVT_ENTRY(Data_Access_Bit, 0x2800)
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;;
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ld8 r20=[r20] // bucket head
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;;
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ld8 r20=[r20] // first entry
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;;
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rsm psr.dt // turn off data translations
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dep r20=0,r20,61,3 // convert vhpt ptr to physical
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;;
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srlz.d // serialize
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ld8 r20=[r20] // first entry
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;;
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1: cmp.eq p15,p0=r0,r20 // done?
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(p15) br.cond.spnt.few 9f // bail if done
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@ -1185,16 +1204,22 @@ IVT_ENTRY(Data_Access_Bit, 0x2800)
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st8.rel [r18]=r19 // store new tag
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;;
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itc.d r21 // and place in TLB
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ssm psr.dt
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;;
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srlz.d
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mov pr=r17,0x1ffff // restore predicates
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rfi // walker will retry the access
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;;
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2: add r20=24,r20 // next in chain
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;;
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ld8 r20=[r20] // read chain
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br.cond.sptk.few 1b // loop
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9: mov pr=r17,0x1ffff // restore predicates
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;;
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9: ssm psr.dt
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mov pr=r17,0x1ffff // restore predicates
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;;
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srlz.d
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;;
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CALL(trap, 10, cr.ifa)
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IVT_END(Data_Access_Bit)
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