Remove support for legacy PCI devices. These haven't been needed since
support for LPC uart devices was added and it conflicts with upcoming patches to add PCI INTx support. Reviewed by: neel
This commit is contained in:
parent
d53497cc2b
commit
d2bc4816c5
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=261217
@ -24,7 +24,7 @@
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.\"
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.\" $FreeBSD$
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.\"
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.Dd December 12, 2013
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.Dd January 27, 2014
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.Dt BHYVE 8
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.Os
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.Sh NAME
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@ -37,7 +37,6 @@
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.Op Fl g Ar gdbport
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.Op Fl p Ar pinnedcpu
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.Op Fl s Ar slot,emulation Ns Op , Ns Ar conf
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.Op Fl S Ar slot,emulation Ns Op , Ns Ar conf
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.Op Fl l Ar lpcdev Ns Op , Ns Ar conf
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.Ar vmname
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.Sh DESCRIPTION
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@ -202,13 +201,6 @@ The host device must have been reserved at boot-time using the
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loader variable as described in
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.Xr vmm 4 .
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.El
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.It Fl S Ar slot , Ns Ar emulation Ns Op , Ns Ar conf
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Identical to the -s option except the device is instructed to use legacy
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ISA addresses if possible.
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Currently this only has an effect with the
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.Li uart
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device emulation.
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This option will be deprecated in a future version.
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.It Fl l Ar lpcdev Ns Op , Ns Ar conf
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Allow devices behind the LPC PCI-ISA bridge to be configured.
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The only supported devices are the TTY-class devices,
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@ -124,7 +124,7 @@ usage(int code)
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{
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fprintf(stderr,
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"Usage: %s [-aehwAHIPW] [-g <gdb port>] [-s <pci>] [-S <pci>]\n"
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"Usage: %s [-aehwAHIPW] [-g <gdb port>] [-s <pci>]\n"
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" %*s [-c vcpus] [-p pincpu] [-m mem] [-l <lpc>] <vm>\n"
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" -a: local apic is in XAPIC mode (default is X2APIC)\n"
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" -A: create an ACPI table\n"
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@ -137,7 +137,6 @@ usage(int code)
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" -e: exit on unhandled I/O access\n"
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" -h: help\n"
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" -s: <slot,driver,configinfo> PCI slot config\n"
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" -S: <slot,driver,configinfo> legacy PCI slot config\n"
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" -l: LPC device configuration\n"
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" -m: memory size in MB\n"
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" -w: ignore unimplemented MSRs\n",
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@ -599,7 +598,7 @@ main(int argc, char *argv[])
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guest_ncpus = 1;
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memsize = 256 * MB;
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while ((c = getopt(argc, argv, "abehwAHIPWp:g:c:s:S:m:l:")) != -1) {
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while ((c = getopt(argc, argv, "abehwAHIPWp:g:c:s:m:l:")) != -1) {
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switch (c) {
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case 'a':
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disable_x2apic = 1;
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@ -626,12 +625,7 @@ main(int argc, char *argv[])
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}
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break;
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case 's':
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if (pci_parse_slot(optarg, 0) != 0)
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exit(1);
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else
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break;
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case 'S':
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if (pci_parse_slot(optarg, 1) != 0)
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if (pci_parse_slot(optarg) != 0)
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exit(1);
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else
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break;
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@ -75,7 +75,6 @@ static struct slotinfo {
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char *si_name;
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char *si_param;
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struct pci_devinst *si_devi;
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int si_legacy;
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} pci_slotinfo[MAXSLOTS][MAXFUNCS];
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SET_DECLARE(pci_devemu_set, struct pci_devemu);
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@ -123,7 +122,7 @@ pci_parse_slot_usage(char *aopt)
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}
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int
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pci_parse_slot(char *opt, int legacy)
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pci_parse_slot(char *opt)
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{
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char *slot, *func, *emul, *config;
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char *str, *cpy;
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@ -170,7 +169,6 @@ pci_parse_slot(char *opt, int legacy)
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error = 0;
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pci_slotinfo[snum][fnum].si_name = emul;
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pci_slotinfo[snum][fnum].si_param = config;
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pci_slotinfo[snum][fnum].si_legacy = legacy;
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done:
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if (error)
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@ -521,13 +519,7 @@ pci_emul_alloc_pbar(struct pci_devinst *pdi, int idx, uint64_t hostbase,
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addr = mask = lobits = 0;
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break;
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case PCIBAR_IO:
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if (hostbase &&
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pci_slotinfo[pdi->pi_slot][pdi->pi_func].si_legacy) {
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assert(hostbase < PCI_EMUL_IOBASE);
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baseptr = &hostbase;
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} else {
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baseptr = &pci_emul_iobase;
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}
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baseptr = &pci_emul_iobase;
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limit = PCI_EMUL_IOLIMIT;
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mask = PCIM_BAR_IO_BASE;
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lobits = PCIM_BAR_IO_SPACE;
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@ -1184,13 +1176,6 @@ pci_generate_msi(struct pci_devinst *pi, int index)
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}
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}
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int
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pci_is_legacy(struct pci_devinst *pi)
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{
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return (pci_slotinfo[pi->pi_slot][pi->pi_func].si_legacy);
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}
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int
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pci_lintr_request(struct pci_devinst *pi, int req)
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{
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@ -199,7 +199,6 @@ int pci_emul_alloc_pbar(struct pci_devinst *pdi, int idx,
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uint64_t hostbase, enum pcibar_type type, uint64_t size);
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int pci_emul_add_msicap(struct pci_devinst *pi, int msgnum);
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int pci_emul_add_pciecap(struct pci_devinst *pi, int pcie_device_type);
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int pci_is_legacy(struct pci_devinst *pi);
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void pci_generate_msi(struct pci_devinst *pi, int msgnum);
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void pci_generate_msix(struct pci_devinst *pi, int msgnum);
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void pci_lintr_assert(struct pci_devinst *pi);
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@ -210,7 +209,7 @@ int pci_msix_enabled(struct pci_devinst *pi);
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int pci_msix_table_bar(struct pci_devinst *pi);
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int pci_msix_pba_bar(struct pci_devinst *pi);
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int pci_msi_msgnum(struct pci_devinst *pi);
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int pci_parse_slot(char *opt, int legacy);
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int pci_parse_slot(char *opt);
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void pci_populate_msicap(struct msicap *cap, int msgs, int nextptr);
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int pci_emul_add_msixcap(struct pci_devinst *pi, int msgnum, int barnum);
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int pci_emul_msix_twrite(struct pci_devinst *pi, uint64_t offset, int size,
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@ -85,28 +85,13 @@ pci_uart_read(struct vmctx *ctx, int vcpu, struct pci_devinst *pi,
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return (val);
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}
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static int pci_uart_nldevs; /* number of legacy uart ports allocated */
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static int
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pci_uart_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts)
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{
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struct uart_softc *sc;
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int ioaddr, ivec;
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if (pci_is_legacy(pi)) {
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if (uart_legacy_alloc(pci_uart_nldevs, &ioaddr, &ivec) != 0) {
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fprintf(stderr, "Unable to allocate resources for "
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"legacy COM%d port at pci device %d:%d\n",
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pci_uart_nldevs + 1, pi->pi_slot, pi->pi_func);
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return (-1);
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}
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pci_uart_nldevs++;
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pci_emul_alloc_pbar(pi, 0, ioaddr, PCIBAR_IO, UART_IO_BAR_SIZE);
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} else {
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ivec = -1;
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pci_emul_alloc_bar(pi, 0, PCIBAR_IO, UART_IO_BAR_SIZE);
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}
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pci_lintr_request(pi, ivec);
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pci_emul_alloc_bar(pi, 0, PCIBAR_IO, UART_IO_BAR_SIZE);
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pci_lintr_request(pi, -1);
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/* initialize config space */
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pci_set_cfgdata16(pi, PCIR_DEVICE, COM_DEV);
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