Move all of the hptmv files to /sys/dev/hptmv so that they won't be mistaken
for being on a CVS vendor branch. The files were moved via a repo-copy.
This commit is contained in:
parent
da57b1caf8
commit
d38d9c9e5e
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=142988
@ -62,8 +62,8 @@ opt_ah.h optional ath_hal \
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clean "opt_ah.h"
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#
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hptmvraid.o optional hptmv \
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dependency "$S/contrib/dev/hptmv/i386-elf.raid.o.uu" \
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compile-with "uudecode < $S/contrib/dev/hptmv/i386-elf.raid.o.uu" \
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dependency "$S/dev/hptmv/i386-elf.raid.o.uu" \
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compile-with "uudecode < $S/dev/hptmv/i386-elf.raid.o.uu" \
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no-implicit-rule
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#
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#
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@ -104,9 +104,6 @@ compat/svr4/svr4_sysent.c optional compat_svr4
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compat/svr4/svr4_sysvec.c optional compat_svr4
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compat/svr4/svr4_termios.c optional compat_svr4
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compat/svr4/svr4_ttold.c optional compat_svr4
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contrib/dev/hptmv/gui_lib.c optional hptmv
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contrib/dev/hptmv/hptproc.c optional hptmv
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contrib/dev/hptmv/ioctl.c optional hptmv
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contrib/dev/oltr/if_oltr.c optional oltr
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contrib/dev/oltr/if_oltr_isa.c optional oltr isa
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contrib/dev/oltr/if_oltr_pci.c optional oltr pci
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@ -160,6 +157,9 @@ dev/fdc/fdc_pccard.c optional fdc pccard
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dev/fe/if_fe_isa.c optional fe isa
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dev/hptmv/entry.c optional hptmv
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dev/hptmv/mv.c optional hptmv
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dev/hptmv/gui_lib.c optional hptmv
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dev/hptmv/hptproc.c optional hptmv
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dev/hptmv/ioctl.c optional hptmv
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dev/ichwd/ichwd.c optional ichwd
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dev/if_ndis/if_ndis.c optional ndis
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dev/if_ndis/if_ndis_pccard.c optional ndis pccard
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@ -1,41 +0,0 @@
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/*
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* Copyright (c) 2003-2004 HighPoint Technologies, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef _ACCESS601_H_
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#define _ACCESS601_H_
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void HPTLIBAPI BeepOn(MV_BUS_ADDR_T BaseAddr);
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void HPTLIBAPI BeepOff(MV_BUS_ADDR_T BaseAddr);
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UCHAR HPTLIBAPI check_protect_circuit(MV_BUS_ADDR_T BaseAddr);
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#ifdef SUPPORT_FAIL_LED
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void HPTLIBAPI set_fail_led(MV_SATA_ADAPTER *pAdapter, UCHAR channel, UCHAR state);
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void HPTLIBAPI set_fail_leds(MV_SATA_ADAPTER *pAdapter, UCHAR mask);
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#else
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#define set_fail_led(pAdapter, channel, state)
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#define set_fail_leds(pAdapter, mask)
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#endif
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#endif
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@ -1,265 +0,0 @@
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/*
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* Copyright (c) 2003-2004 HighPoint Technologies, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef _ARRAY_H_
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#define _ARRAY_H_
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/*
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* time represented in DWORD format
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*/
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#pragma pack(1)
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#ifdef __BIG_ENDIAN_BITFIELD
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typedef DWORD TIME_RECORD;
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#else
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typedef struct _TIME_RECORD {
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UINT seconds:6; /* 0 - 59 */
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UINT minutes:6; /* 0 - 59 */
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UINT month:4; /* 1 - 12 */
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UINT hours:6; /* 0 - 59 */
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UINT day:5; /* 1 - 31 */
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UINT year:5; /* 0=2000, 31=2031 */
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} TIME_RECORD;
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#endif
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#pragma pack()
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/***************************************************************************
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* Description: Virtual Device Table
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***************************************************************************/
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typedef struct _RaidArray
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{
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/*
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* basic information
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*/
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UCHAR bArnMember; /* the number of members in array */
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UCHAR bArRealnMember; /* real member count */
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UCHAR bArBlockSizeShift; /* the number of shift bit for a block */
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UCHAR reserve1;
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ULONG dArStamp; /* array ID. all disks in a array has same ID */
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USHORT bStripeWitch; /* = (1 << BlockSizeShift) */
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USHORT rf_broken: 1;
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USHORT rf_need_rebuild: 1; /* one member's data are incorrect.
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for R5, if CriticalMembers==0, it means
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parity needs to be constructed */
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USHORT rf_need_sync: 1; /* need write array info to disk */
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/* ioctl flags */
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USHORT rf_auto_rebuild: 1;
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USHORT rf_newly_created: 1;
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USHORT rf_rebuilding: 1;
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USHORT rf_verifying: 1;
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USHORT rf_initializing: 1;
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USHORT rf_abort_rebuild: 1;
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USHORT rf_duplicate_and_create: 1;
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USHORT rf_duplicate_and_created: 1;
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USHORT rf_duplicate_must_done: 1;
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USHORT rf_raid15: 1;
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USHORT CriticalMembers; /* tell which member is critial */
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UCHAR last_read; /* for RAID 1 load banlancing */
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UCHAR pad1;
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LBA_T RebuildSectors; /* how many sectors is OK (LBA on member disk) */
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PVDevice pMember[MAX_MEMBERS];
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/*
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* utility working data
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*/
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UCHAR ArrayName[MAX_ARRAY_NAME]; /* The Name of the array */
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TIME_RECORD CreateTime; /* when created it */
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UCHAR Description[64]; /* array description */
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UCHAR CreateManager[16]; /* who created it */
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} RaidArray;
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/***************************************************************************
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* Array Descripton on disk
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***************************************************************************/
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#pragma pack(1)
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typedef struct _ArrayDescript
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{
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ULONG Signature; /* This block is vaild array info block */
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ULONG dArStamp; /* array ID. all disks in a array has same ID */
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UCHAR bCheckSum; /* check sum of ArrayDescript_3_0_size bytes */
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#ifdef __BIG_ENDIAN_BITFIELD
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UCHAR df_reservedbits: 6; /* put more flags here */
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UCHAR df_user_mode_set: 1;/* user select device mode */
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UCHAR df_bootmark:1; /* user set boot mark on the disk */
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#else
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UCHAR df_bootmark:1; /* user set boot mark on the disk */
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UCHAR df_user_mode_set: 1;/* user select device mode */
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UCHAR df_reservedbits: 6; /* put more flags here */
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#endif
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UCHAR bUserDeviceMode; /* see device.h */
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UCHAR ArrayLevel; /* how many level[] is valid */
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struct {
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ULONG Capacity; /* capacity for the array */
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UCHAR VDeviceType; /* see above & arrayType in array.h */
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UCHAR bMemberCount; /* all disk in the array */
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UCHAR bSerialNumber; /* Serial Number */
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UCHAR bArBlockSizeShift; /* the number of shift bit for a block */
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#ifdef __BIG_ENDIAN_BITFIELD
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USHORT rf_reserved: 14;
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USHORT rf_raid15: 1; /* don't remove even you don't use it */
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USHORT rf_need_rebuild:1; /* array is critical */
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#else
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USHORT rf_need_rebuild:1; /* array is critical */
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USHORT rf_raid15: 1; /* don't remove even you don't use it */
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USHORT rf_reserved: 14;
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#endif
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USHORT CriticalMembers; /* record critical members */
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ULONG RebuildSectors; /* how many sectors is OK (LBA on member disk) */
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} level[2];
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UCHAR ArrayName[MAX_ARRAY_NAME]; /* The Name of the array */
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TIME_RECORD CreateTime; /* when created it */
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UCHAR Description[64]; /* array description */
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UCHAR CreateManager[16]; /* who created it */
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#define ArrayDescript_3_0_size ((unsigned)(ULONG_PTR)&((struct _ArrayDescript *)0)->bCheckSum31)
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#define ArrayDescript_3_1_size 512
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UCHAR bCheckSum31; /* new check sum */
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UCHAR reserve2[2];
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#ifdef __BIG_ENDIAN_BITFIELD
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UCHAR df_read_ahead: 1; /* enable read ahead */
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UCHAR df_read_ahead_set: 1;
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UCHAR df_write_cache: 1; /* enable write cache */
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UCHAR df_write_cache_set: 1;
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UCHAR df_ncq: 1; /* enable NCQ */
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UCHAR df_ncq_set: 1;
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UCHAR df_tcq: 1; /* enable TCQ */
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UCHAR df_tcq_set: 1;
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#else
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UCHAR df_tcq_set: 1;
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UCHAR df_tcq: 1; /* enable TCQ */
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UCHAR df_ncq_set: 1;
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UCHAR df_ncq: 1; /* enable NCQ */
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UCHAR df_write_cache_set: 1;
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UCHAR df_write_cache: 1; /* enable write cache */
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UCHAR df_read_ahead_set: 1;
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UCHAR df_read_ahead: 1; /* enable read ahead */
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#endif
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struct {
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ULONG CapacityHi32;
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ULONG RebuildSectorsHi32;
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}
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levelex[2];
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} ArrayDescript;
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#pragma pack()
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/* Signature */
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#define HPT_ARRAY_V3 0x5a7816f3
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#ifdef ARRAY_V2_ONLY
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#define SAVE_FOR_RAID_INFO 0
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#else
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#define SAVE_FOR_RAID_INFO 10
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#endif
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/***************************************************************************
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* Function protocol for array layer
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***************************************************************************/
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/*
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* array.c
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*/
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ULONG FASTCALL GetStamp(void);
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void HPTLIBAPI SyncArrayInfo(PVDevice pVDev);
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void HPTLIBAPI fDeleteArray(_VBUS_ARG PVDevice pVArray, BOOLEAN del_block0);
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/*
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* iArray.c
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*/
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void HPTLIBAPI fCheckArray(PDevice pDevice);
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void HPTLIBAPI CheckArrayCritical(_VBUS_ARG0);
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PVDevice HPTLIBAPI GetSpareDisk(_VBUS_ARG PVDevice pArray);
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#ifdef SUPPORT_OLD_ARRAY
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void HPTLIBAPI fFixRAID01Stripe(_VBUS_ARG PVDevice pStripe);
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#endif
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/***************************************************************************
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* Macro defination
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***************************************************************************/
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#ifndef MAX_ARRAY_PER_VBUS
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#define MAX_ARRAY_PER_VBUS (MAX_VDEVICE_PER_VBUS*2) /* worst case */
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#endif
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#if defined(MAX_ARRAY_DEVICE)
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#if MAX_ARRAY_DEVICE!=MAX_ARRAY_PER_VBUS
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#error "remove MAX_ARRAY_DEVICE and use MAX_ARRAY_PER_VBUS instead"
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#endif
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#endif
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#define _SET_ARRAY_BUS_(pArray) pArray->pVBus = _vbus_p;
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#ifdef ARRAY_V2_ONLY
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#define _SET_ARRAY_VER_(pArray) pArray->vf_format_v2 = 1;
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#else
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#define _SET_ARRAY_VER_(pArray)
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#endif
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#define mArGetArrayTable(pVArray) \
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if((pVArray = _vbus_(pFreeArrayLink)) != 0) { \
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_vbus_(pFreeArrayLink) = (PVDevice)_vbus_(pFreeArrayLink)->pVBus; \
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ZeroMemory(pVArray, ARRAY_VDEV_SIZE); \
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_SET_ARRAY_BUS_(pVArray) \
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_SET_ARRAY_VER_(pVArray) \
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} else
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#define mArFreeArrayTable(pVArray) \
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do { \
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pVArray->pVBus = (PVBus)_vbus_(pFreeArrayLink);\
|
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_vbus_(pFreeArrayLink) = pVArray; \
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pVArray->u.array.dArStamp = 0; \
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} while(0)
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UCHAR CheckSum(UCHAR *p, int size);
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|
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void HPTLIBAPI fRAID0SendCommand(_VBUS_ARG PCommand pCmd);
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void HPTLIBAPI fRAID1SendCommand(_VBUS_ARG PCommand pCmd);
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void HPTLIBAPI fJBODSendCommand(_VBUS_ARG PCommand pCmd);
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void HPTLIBAPI fRAID0MemberFailed(_VBUS_ARG PVDevice pVDev);
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void HPTLIBAPI fRAID1MemberFailed(_VBUS_ARG PVDevice pVDev);
|
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void HPTLIBAPI fJBODMemberFailed(_VBUS_ARG PVDevice pVDev);
|
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#if SUPPORT_RAID5
|
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void HPTLIBAPI fRAID5SendCommand(_VBUS_ARG PCommand pCmd);
|
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void HPTLIBAPI fRAID5MemberFailed(_VBUS_ARG PVDevice pVDev);
|
||||
#else
|
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#define fRAID5SendCommand 0
|
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#define fRAID5MemberFailed 0
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#endif
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||||
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#endif
|
@ -1,556 +0,0 @@
|
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/*
|
||||
* Copyright (c) 2003-2004 HighPoint Technologies, Inc.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef _ATAPI_H_
|
||||
#define _ATAPI_H_
|
||||
|
||||
#pragma pack(1)
|
||||
|
||||
/***************************************************************************
|
||||
* IDE IO Register File
|
||||
***************************************************************************/
|
||||
|
||||
/*
|
||||
* IDE IO Port definition
|
||||
*/
|
||||
typedef struct _IDE_REGISTERS_1 {
|
||||
USHORT Data; /* RW: Data port feature register */
|
||||
UCHAR BlockCount; /* RW: Sector count */
|
||||
UCHAR BlockNumber; /* RW: Sector number & LBA 0-7 */
|
||||
UCHAR CylinderLow; /* RW: Cylinder low & LBA 8-15 */
|
||||
UCHAR CylinderHigh; /* RW: Cylinder hign & LBA 16-23 */
|
||||
UCHAR DriveSelect; /* RW: Drive/head & LBA 24-27 */
|
||||
UCHAR Command; /* RO: Status WR:Command */
|
||||
} IDE_REGISTERS_1, *PIDE_REGISTERS_1;
|
||||
|
||||
|
||||
/*
|
||||
* IDE status definitions
|
||||
*/
|
||||
#define IDE_STATUS_ERROR 0x01 /* Error Occurred in Execution */
|
||||
#define IDE_STATUS_INDEX 0x02 /* is vendor specific */
|
||||
#define IDE_STATUS_CORRECTED_ERROR 0x04 /* Corrected Data */
|
||||
#define IDE_STATUS_DRQ 0x08 /* Ready to transfer data */
|
||||
#define IDE_STATUS_DSC 0x10 /* not defined in ATA-2 */
|
||||
#define IDE_STATUS_DWF 0x20 /* Device Fault has been detected */
|
||||
#define IDE_STATUS_DRDY 0x40 /* Device Ready to accept command */
|
||||
#define IDE_STATUS_IDLE 0x50 /* Device is OK */
|
||||
#define IDE_STATUS_BUSY 0x80 /* Device Busy, must wait */
|
||||
|
||||
|
||||
#define IDE_ERROR_BAD_BLOCK 0x80 /* Reserved now */
|
||||
#define IDE_ERROR_DATA_ERROR 0x40 /* Uncorreectable Data Error */
|
||||
#define IDE_ERROR_MEDIA_CHANGE 0x20 /* Media Changed */
|
||||
#define IDE_ERROR_ID_NOT_FOUND 0x10 /* ID Not Found */
|
||||
#define IDE_ERROR_MEDIA_CHANGE_REQ 0x08 /* Media Change Requested */
|
||||
#define IDE_ERROR_COMMAND_ABORTED 0x04 /* Aborted Command */
|
||||
#define IDE_ERROR_TRACK0_NOT_FOUND 0x02 /* Track 0 Not Found */
|
||||
#define IDE_ERROR_ADDRESS_NOT_FOUND 0x01 /* Address Mark Not Found */
|
||||
|
||||
|
||||
#define LBA_MODE 0x40
|
||||
|
||||
/*
|
||||
* IDE command definitions
|
||||
*/
|
||||
|
||||
#define IDE_COMMAND_RECALIBRATE 0x10 /* Recalibrate */
|
||||
#define IDE_COMMAND_READ 0x20 /* Read Sectors with retry */
|
||||
#define IDE_COMMAND_WRITE 0x30 /* Write Sectors with retry */
|
||||
#define IDE_COMMAND_VERIFY 0x40 /* Read Verify Sectors with Retry */
|
||||
#define IDE_COMMAND_SEEK 0x70 /* Seek */
|
||||
#define IDE_COMMAND_SET_DRIVE_PARAMETER 0x91 /* Initialize Device Parmeters */
|
||||
#define IDE_COMMAND_GET_MEDIA_STATUS 0xDA
|
||||
#define IDE_COMMAND_DOOR_LOCK 0xDE /* Door Lock */
|
||||
#define IDE_COMMAND_DOOR_UNLOCK 0xDF /* Door Unlock */
|
||||
#define IDE_COMMAND_ENABLE_MEDIA_STATUS 0xEF /* Set Features */
|
||||
#define IDE_COMMAND_IDENTIFY 0xEC /* Identify Device */
|
||||
#define IDE_COMMAND_MEDIA_EJECT 0xED
|
||||
#define IDE_COMMAND_SET_FEATURES 0xEF /* IDE set features command */
|
||||
|
||||
#define IDE_COMMAND_FLUSH_CACHE 0xE7
|
||||
#define IDE_COMMAND_STANDBY_IMMEDIATE 0xE0
|
||||
|
||||
#ifndef NOT_SUPPORT_MULTIPLE
|
||||
#define IDE_COMMAND_READ_MULTIPLE 0xC4 /* Read Multiple */
|
||||
#define IDE_COMMAND_WRITE_MULTIPLE 0xC5 /* Write Multiple */
|
||||
#define IDE_COMMAND_SET_MULTIPLE 0xC6 /* Set Multiple Mode */
|
||||
#endif
|
||||
|
||||
#ifndef NOT_SUPPORT_DMA
|
||||
#define IDE_COMMAND_DMA_READ 0xc8 /* IDE DMA read command */
|
||||
#define IDE_COMMAND_DMA_WRITE 0xca /* IDE DMA write command */
|
||||
#endif
|
||||
|
||||
#define IDE_COMMAND_READ_DMA_QUEUE 0xc7 /* IDE read DMA queue command */
|
||||
#define IDE_COMMAND_WRITE_DMA_QUEUE 0xcc /* IDE write DMA queue command */
|
||||
#define IDE_COMMAND_SERVICE 0xA2 /* IDE service command command */
|
||||
#define IDE_COMMAND_NOP 0x00 /* IDE NOP command */
|
||||
#define IDE_STATUS_SRV 0x10
|
||||
#define IDE_RELEASE_BUS 4
|
||||
|
||||
/*#define IDE_COMMAND_FLUSH_CACHE_EXT */
|
||||
#define IDE_COMMAND_READ_DMA_EXT 0x25
|
||||
#define IDE_COMMAND_READ_QUEUE_EXT 0x26
|
||||
#define IDE_COMMAND_READ_MULTIPLE_EXT 0x29
|
||||
#define IDE_COMMAND_READ_MAX_ADDR 0x27
|
||||
#define IDE_COMMAND_READ_EXT 0x24
|
||||
#define IDE_COMMAND_VERIFY_EXT 0x42
|
||||
#define IDE_COMMAND_SET_MULTIPLE_EXT 0x37
|
||||
#define IDE_COMMAND_WRITE_DMA_EXT 0x35
|
||||
#define IDE_COMMAND_WRITE_QUEUE_EXT 0x36
|
||||
#define IDE_COMMAND_WRITE_EXT 0x34
|
||||
#define IDE_COMMAND_WRITE_MULTIPLE_EXT 0x39
|
||||
|
||||
/*
|
||||
* IDE_COMMAND_SET_FEATURES
|
||||
*/
|
||||
#define FT_USE_ULTRA 0x40 /* Set feature for Ultra DMA */
|
||||
#define FT_USE_MWDMA 0x20 /* Set feature for MW DMA */
|
||||
#define FT_USE_SWDMA 0x10 /* Set feature for SW DMA */
|
||||
#define FT_USE_PIO 0x8 /* Set feature for PIO */
|
||||
#define FT_DISABLE_IORDY 0x10 /* Set feature for disabling IORDY */
|
||||
|
||||
/*
|
||||
* S.M.A.R.T. commands
|
||||
*/
|
||||
#define IDE_COMMAND_SMART 0xB0
|
||||
#define SMART_READ_VALUES 0xd0
|
||||
#define SMART_READ_THRESHOLDS 0xd1
|
||||
#define SMART_AUTOSAVE 0xd2
|
||||
#define SMART_SAVE 0xd3
|
||||
#define SMART_IMMEDIATE_OFFLINE 0xd4
|
||||
#define SMART_READ_LOG_SECTOR 0xd5
|
||||
#define SMART_WRITE_LOG_SECTOR 0xd6
|
||||
#define SMART_ENABLE 0xd8
|
||||
#define SMART_DISABLE 0xd9
|
||||
#define SMART_STATUS 0xda
|
||||
#define SMART_AUTO_OFFLINE 0xdb
|
||||
|
||||
/***************************************************************************
|
||||
* IDE Control Register File
|
||||
***************************************************************************/
|
||||
|
||||
typedef struct _IDE_REGISTERS_2 {
|
||||
UCHAR AlternateStatus; /* RW: device control port */
|
||||
} IDE_REGISTERS_2, *PIDE_REGISTERS_2;
|
||||
|
||||
|
||||
/*
|
||||
* IDE drive control definitions
|
||||
*/
|
||||
#define IDE_DC_DISABLE_INTERRUPTS 0x02
|
||||
#define IDE_DC_RESET_CONTROLLER 0x04
|
||||
#define IDE_DC_REENABLE_CONTROLLER 0x00
|
||||
|
||||
/***************************************************************************
|
||||
* MSNS: Removable device
|
||||
***************************************************************************/
|
||||
/*
|
||||
* Media syatus
|
||||
*/
|
||||
#define MSNS_NO_MEDIA 2
|
||||
#define MSNS_MEDIA_CHANGE_REQUEST 8
|
||||
#define MSNS_MIDIA_CHANGE 0x20
|
||||
#define MSNS_WRITE_PROTECT 0x40
|
||||
#define MSNS_READ_PROTECT 0x80
|
||||
|
||||
/***************************************************************************
|
||||
* ATAPI IO Register File
|
||||
***************************************************************************/
|
||||
|
||||
/*
|
||||
* ATAPI register definition
|
||||
*/
|
||||
|
||||
typedef struct _ATAPI_REGISTERS_1 {
|
||||
USHORT Data;
|
||||
UCHAR InterruptReason; /* Atapi Phase Port */
|
||||
UCHAR Unused1;
|
||||
UCHAR ByteCountLow; /* Byte Count LSB */
|
||||
UCHAR ByteCountHigh; /* Byte Count MSB */
|
||||
UCHAR DriveSelect;
|
||||
UCHAR Command;
|
||||
} ATAPI_REGISTERS_1, *PATAPI_REGISTERS_1;
|
||||
|
||||
/*
|
||||
* Atapi Error Status
|
||||
*/
|
||||
#define IDE_ERROR_END_OF_MEDIA IDE_ERROR_TRACK0_NOT_FOUND
|
||||
#define IDE_ERROR_ILLEGAL_LENGTH IDE_ERROR_ADDRESS_NOT_FOUND
|
||||
|
||||
/*
|
||||
* ATAPI interrupt reasons
|
||||
*/
|
||||
#define ATAPI_IR_COD 0x01
|
||||
#define ATAPI_IR_IO 0x02
|
||||
|
||||
/* sense key */
|
||||
#define ATAPI_SENSE_NO_SENSE 0x00
|
||||
#define ATAPI_SENSE_RECOVERED_ERROR 0x01
|
||||
#define ATAPI_SENSE_NOT_READY 0x02
|
||||
#define ATAPI_SENSE_MEDIUM_ERROR 0x03
|
||||
#define ATAPI_SENSE_HARDWARE_ERROR 0x04
|
||||
#define ATAPI_SENSE_ILLEGAL_REQUEST 0x05
|
||||
#define ATAPI_SENSE_UNIT_ATTENTION 0x06
|
||||
#define ATAPI_SENSE_DATA_PROTECT 0x07
|
||||
#define ATAPI_SENSE_BLANK_CHECK 0x08
|
||||
#define ATAPI_SENSE_UNIQUE 0x09
|
||||
#define ATAPI_SENSE_COPY_ABORTED 0x0A
|
||||
#define ATAPI_SENSE_ABORTED_COMMAND 0x0B
|
||||
#define ATAPI_SENSE_EQUAL 0x0C
|
||||
#define ATAPI_SENSE_VOL_OVERFLOW 0x0D
|
||||
#define ATAPI_SENSE_MISCOMPARE 0x0E
|
||||
#define ATAPI_SENSE_RESERVED 0x0F
|
||||
|
||||
/* Additional Sense codes */
|
||||
#define ATAPI_ASC_NO_SENSE 0x00
|
||||
#define ATAPI_ASC_LUN_NOT_READY 0x04
|
||||
#define ATAPI_ASC_TRACK_ERROR 0x14
|
||||
#define ATAPI_ASC_SEEK_ERROR 0x15
|
||||
#define ATAPI_ASC_REC_DATA_NOECC 0x17
|
||||
#define ATAPI_ASC_REC_DATA_ECC 0x18
|
||||
#define ATAPI_ASC_ILLEGAL_COMMAND 0x20
|
||||
#define ATAPI_ASC_ILLEGAL_BLOCK 0x21
|
||||
#define ATAPI_ASC_INVALID_CDB 0x24
|
||||
#define ATAPI_ASC_INVALID_LUN 0x25
|
||||
#define ATAPI_ASC_PROTECT 0x27
|
||||
#define ATAPI_ASC_MEDIUM_CHANGED 0x28
|
||||
#define ATAPI_ASC_BUS_RESET 0x29
|
||||
#define ATAPI_ASC_NO_MEDIA_IN_DEVICE 0x3a
|
||||
#define ATAPI_ASC_MUSIC_AREA 0xA0
|
||||
#define ATAPI_ASC_DATA_AREA 0xA1
|
||||
#define ATAPI_ASC_VOLUME_OVERFLOW 0xA7
|
||||
|
||||
/*
|
||||
* IDE command definitions ( for ATAPI )
|
||||
*/
|
||||
|
||||
#define IDE_COMMAND_ATAPI_RESET 0x08 /* Atapi Software Reset command */
|
||||
#define IDE_COMMAND_ATAPI_PACKET 0xA0 /* Atapi Identify command */
|
||||
#define IDE_COMMAND_ATAPI_IDENTIFY 0xA1 /* Atapi Packet Command */
|
||||
|
||||
|
||||
/*
|
||||
* ATAPI command definitions
|
||||
*/
|
||||
|
||||
#define ATAPI_TEST_UNIT_READY 0x00
|
||||
#define ATAPI_REZERO_UNIT 0x01
|
||||
#define ATAPI_REQUEST_SENSE 0x03
|
||||
#define ATAPI_FORMAT_UNIT6 0x04
|
||||
#define ATAPI_FORMAT_UNIT 0x24
|
||||
#define ATAPI_INQUIRY 0x12
|
||||
#define ATAPI_MODE_SELECT 0x15
|
||||
#define ATAPI_MODE_SENSE 0x1A
|
||||
#define ATAPI_START_STOP_UNIT 0x1B
|
||||
#define ATAPI_LOAD_UNLOAD 0x1B
|
||||
#define ATAPI_MEDIUM_REMOVAL 0x1E
|
||||
#define ATAPI_READ_CAPACITY 0x25
|
||||
#define ATAPI_READ 0x28
|
||||
#define ATAPI_WRITE 0x2A
|
||||
#define ATAPI_SEEK 0x2B
|
||||
#define ATAPI_VERIFY 0x2F
|
||||
#define ATAPI_READ_DATA_BUFF 0x3C
|
||||
#define ATAPI_READ_SUB_CHANNEL 0x42
|
||||
#define ATAPI_READ_TOC 0x43
|
||||
#define ATAPI_READ_HEADER 0x44
|
||||
#define ATAPI_GET_CONFIGURATION 0x46
|
||||
#define ATAPI_PLAY_AUDIO_MSF 0x47
|
||||
#define ATAPI_GET_EVENT_STATUS_NOTIFICATION 0x4A
|
||||
#define ATAPI_PAUSE_RESUME 0x4B
|
||||
#define ATAPI_STOP_PLAY_SCAN 0x4E
|
||||
#define ATAPI_READ_DISK_INFORMATION 0x51
|
||||
#define ATAPI_READ_TRACK_INFORMATION 0x52
|
||||
#define ATAPI_MODE_SELECT10 0x55
|
||||
#define ATAPI_MODE_SENSE10 0x5A
|
||||
#define ATAPI_CLOSE_TRACK_SESSION 0x5B
|
||||
#define ATAPI_READ_BUFFER_CAPACITY 0x5C
|
||||
#define ATAPI_BLANK_COMMAND 0xA1 /*Provide the ability to erase any part of a CD-RW disc.*/
|
||||
#define ATAPI_REPORT_KEY 0xA4
|
||||
#define ATAPI_PLAY_AUDIO 0xA5
|
||||
#define ATAPI_READ12 0xA8
|
||||
#define ATAPI_READ_DVD_STRUCTURE 0xAD
|
||||
#define ATAPI_READ_CD_MSF 0xB9
|
||||
#define ATAPI_SET_CD_SPEED 0xBB
|
||||
#define ATAPI_MECHANISM_STATUS 0xBD
|
||||
#define ATAPI_READ_CD 0xBE
|
||||
#define ATAPI_SET_CDRW_SPEED 0xDA /*WindowsXP need*/
|
||||
|
||||
#define MODE_DSP_WRITE_PROTECT 0x80
|
||||
|
||||
|
||||
/***************************************************************************
|
||||
* ATAPI IO Register File
|
||||
***************************************************************************/
|
||||
|
||||
|
||||
typedef struct _ATAPI_REGISTERS_2 {
|
||||
UCHAR AlternateStatus;
|
||||
} ATAPI_REGISTERS_2, *PATAPI_REGISTERS_2;
|
||||
|
||||
|
||||
/***************************************************************************
|
||||
* ATAPI packets
|
||||
***************************************************************************/
|
||||
typedef struct _ATAPI_SENSE_DATA {
|
||||
#ifdef __BIG_ENDIAN_BITFIELD
|
||||
UCHAR Valid:1;
|
||||
UCHAR ErrorCode:7;
|
||||
UCHAR SegmentNumber;
|
||||
UCHAR FileMark:1;
|
||||
UCHAR EndOfMedia:1;
|
||||
UCHAR IncorrectLength:1;
|
||||
UCHAR Reserved:1;
|
||||
UCHAR SenseKey:4;
|
||||
#else
|
||||
UCHAR ErrorCode:7;
|
||||
UCHAR Valid:1;
|
||||
UCHAR SegmentNumber;
|
||||
UCHAR SenseKey:4;
|
||||
UCHAR Reserved:1;
|
||||
UCHAR IncorrectLength:1;
|
||||
UCHAR EndOfMedia:1;
|
||||
UCHAR FileMark:1;
|
||||
#endif
|
||||
UCHAR Information[4];
|
||||
UCHAR AdditionalSenseLength;
|
||||
UCHAR CommandSpecificInformation[4];
|
||||
UCHAR AdditionalSenseCode;
|
||||
UCHAR AdditionalSenseCodeQualifier;
|
||||
UCHAR FieldReplaceableUnitCode;
|
||||
UCHAR SenseKeySpecific[3];
|
||||
} ATAPI_SENSE_DATA, *PATAPI_SENSE_DATA;
|
||||
|
||||
/*
|
||||
* IDENTIFY data
|
||||
*/
|
||||
typedef struct _IDENTIFY_DATA {
|
||||
USHORT GeneralConfiguration; /* 00 00 */
|
||||
USHORT NumberOfCylinders; /* 02 1 */
|
||||
USHORT Reserved1; /* 04 2 */
|
||||
USHORT NumberOfHeads; /* 06 3 */
|
||||
USHORT UnformattedBytesPerTrack; /* 08 4 */
|
||||
USHORT UnformattedBytesPerSector; /* 0A 5 */
|
||||
USHORT SectorsPerTrack; /* 0C 6 */
|
||||
USHORT VendorUnique1[3]; /* 0E 7-9 */
|
||||
USHORT SerialNumber[10]; /* 14 10-19 */
|
||||
USHORT BufferType; /* 28 20 */
|
||||
USHORT BufferSectorSize; /* 2A 21 */
|
||||
USHORT NumberOfEccBytes; /* 2C 22 */
|
||||
USHORT FirmwareRevision[4]; /* 2E 23-26 */
|
||||
USHORT ModelNumber[20]; /* 36 27-46 */
|
||||
UCHAR MaximumBlockTransfer; /* 5E 47 */
|
||||
UCHAR VendorUnique2; /* 5F */
|
||||
USHORT DoubleWordIo; /* 60 48 */
|
||||
USHORT Capabilities; /* 62 49 */
|
||||
USHORT Reserved2; /* 64 50 */
|
||||
UCHAR VendorUnique3; /* 66 51 */
|
||||
UCHAR PioCycleTimingMode; /* 67 */
|
||||
UCHAR VendorUnique4; /* 68 52 */
|
||||
UCHAR DmaCycleTimingMode; /* 69 */
|
||||
USHORT TranslationFieldsValid; /* 6A 53 */
|
||||
USHORT NumberOfCurrentCylinders; /* 6C 54 */
|
||||
USHORT NumberOfCurrentHeads; /* 6E 55 */
|
||||
USHORT CurrentSectorsPerTrack; /* 70 56 */
|
||||
ULONG CurrentSectorCapacity; /* 72 57-58 */
|
||||
USHORT CurrentMultiSectorSetting; /* 76 59 */
|
||||
ULONG UserAddressableSectors; /* 78 60-61 */
|
||||
UCHAR SingleWordDMASupport; /* 7C 62 */
|
||||
UCHAR SingleWordDMAActive; /* 7D */
|
||||
UCHAR MultiWordDMASupport; /* 7E 63 */
|
||||
UCHAR MultiWordDMAActive; /* 7F */
|
||||
UCHAR AdvancedPIOModes; /* 80 64 */
|
||||
UCHAR Reserved4; /* 81 */
|
||||
USHORT MinimumMWXferCycleTime; /* 82 65 */
|
||||
USHORT RecommendedMWXferCycleTime; /* 84 66 */
|
||||
USHORT MinimumPIOCycleTime; /* 86 67 */
|
||||
USHORT MinimumPIOCycleTimeIORDY; /* 88 68 */
|
||||
USHORT Reserved5[2]; /* 8A 69-70 */
|
||||
USHORT ReleaseTimeOverlapped; /* 8E 71 */
|
||||
USHORT ReleaseTimeServiceCommand; /* 90 72 */
|
||||
USHORT MajorRevision; /* 92 73 */
|
||||
USHORT MinorRevision; /* 94 74 */
|
||||
USHORT MaxQueueDepth; /* 96 75 */
|
||||
USHORT SataCapability; /* 76 */
|
||||
USHORT Reserved6[9]; /* 98 77-85 */
|
||||
USHORT CommandSupport; /* 86 */
|
||||
USHORT CommandEnable; /* 87 */
|
||||
USHORT UtralDmaMode; /* 88 */
|
||||
USHORT Reserved7[11]; /* 89-99 */
|
||||
ULONG Lba48BitLow; /* 101-100 */
|
||||
ULONG Lba48BitHigh; /* 103-102 */
|
||||
USHORT Reserved8[23]; /* 104-126 */
|
||||
USHORT SpecialFunctionsEnabled; /* 127 */
|
||||
USHORT Reserved9[128]; /* 128-255 */
|
||||
|
||||
} IDENTIFY_DATA, *PIDENTIFY_DATA;
|
||||
|
||||
typedef struct _CONFIGURATION_IDENTIFY_DATA {
|
||||
USHORT Revision;
|
||||
USHORT MWDMAModeSupported;
|
||||
USHORT UDMAModeSupported;
|
||||
ULONG MaximumLbaLow;
|
||||
ULONG MaximumLbaHigh;
|
||||
USHORT CommandSupport;
|
||||
USHORT Reserved[247];
|
||||
UCHAR Signature; /* 0xA5 */
|
||||
UCHAR CheckSum;
|
||||
}
|
||||
CONFIGURATION_IDENTIFY_DATA, *PCONFIGURATION_IDENTIFY_DATA;
|
||||
|
||||
/* */
|
||||
/* Identify data without the Reserved4. */
|
||||
/* */
|
||||
typedef struct _IDENTIFY_DATA2 {
|
||||
USHORT GeneralConfiguration; /* 00 00 */
|
||||
USHORT NumberOfCylinders; /* 02 1 */
|
||||
USHORT Reserved1; /* 04 2 */
|
||||
USHORT NumberOfHeads; /* 06 3 */
|
||||
USHORT UnformattedBytesPerTrack; /* 08 4 */
|
||||
USHORT UnformattedBytesPerSector; /* 0A 5 */
|
||||
USHORT SectorsPerTrack; /* 0C 6 */
|
||||
USHORT VendorUnique1[3]; /* 0E 7-9 */
|
||||
USHORT SerialNumber[10]; /* 14 10-19 */
|
||||
USHORT BufferType; /* 28 20 */
|
||||
USHORT BufferSectorSize; /* 2A 21 */
|
||||
USHORT NumberOfEccBytes; /* 2C 22 */
|
||||
USHORT FirmwareRevision[4]; /* 2E 23-26 */
|
||||
USHORT ModelNumber[20]; /* 36 27-46 */
|
||||
UCHAR MaximumBlockTransfer; /* 5E 47 */
|
||||
UCHAR VendorUnique2; /* 5F */
|
||||
USHORT DoubleWordIo; /* 60 48 */
|
||||
USHORT Capabilities; /* 62 49 */
|
||||
USHORT Reserved2; /* 64 50 */
|
||||
UCHAR VendorUnique3; /* 66 51 */
|
||||
UCHAR PioCycleTimingMode; /* 67 */
|
||||
UCHAR VendorUnique4; /* 68 52 */
|
||||
UCHAR DmaCycleTimingMode; /* 69 */
|
||||
USHORT TranslationFieldsValid; /* 6A 53 */
|
||||
USHORT NumberOfCurrentCylinders; /* 6C 54 */
|
||||
USHORT NumberOfCurrentHeads; /* 6E 55 */
|
||||
USHORT CurrentSectorsPerTrack; /* 70 56 */
|
||||
ULONG CurrentSectorCapacity; /* 72 57-58 */
|
||||
USHORT CurrentMultiSectorSetting; /* 59 */
|
||||
ULONG UserAddressableSectors; /* 60-61 */
|
||||
UCHAR SingleWordDMASupport; /* 62 */
|
||||
UCHAR SingleWordDMAActive;
|
||||
UCHAR MultiWordDMASupport; /* 63 */
|
||||
UCHAR MultiWordDMAActive;
|
||||
UCHAR AdvancedPIOModes; /* 64 */
|
||||
UCHAR Reserved4;
|
||||
USHORT MinimumMWXferCycleTime; /* 65 */
|
||||
USHORT RecommendedMWXferCycleTime; /* 66 */
|
||||
USHORT MinimumPIOCycleTime; /* 67 */
|
||||
USHORT MinimumPIOCycleTimeIORDY; /* 68 */
|
||||
USHORT Reserved5[2]; /* 69-70 */
|
||||
USHORT ReleaseTimeOverlapped; /* 71 */
|
||||
USHORT ReleaseTimeServiceCommand; /* 72 */
|
||||
USHORT MajorRevision; /* 73 */
|
||||
USHORT MinorRevision; /* 74 */
|
||||
/* USHORT Reserved6[14]; // 75-88 */
|
||||
} IDENTIFY_DATA2, *PIDENTIFY_DATA2;
|
||||
|
||||
#define IDENTIFY_DATA_SIZE sizeof(IDENTIFY_DATA2)
|
||||
|
||||
/* */
|
||||
/* IDENTIFY DMA timing cycle modes. */
|
||||
/* */
|
||||
|
||||
#define IDENTIFY_DMA_CYCLES_MODE_0 0x00
|
||||
#define IDENTIFY_DMA_CYCLES_MODE_1 0x01
|
||||
#define IDENTIFY_DMA_CYCLES_MODE_2 0x02
|
||||
|
||||
/*
|
||||
* Mode definitions
|
||||
*/
|
||||
typedef enum _DISK_MODE
|
||||
{
|
||||
IDE_PIO_0 = 0,
|
||||
IDE_PIO_1,
|
||||
IDE_PIO_2,
|
||||
IDE_PIO_3,
|
||||
IDE_PIO_4,
|
||||
IDE_MWDMA_0,
|
||||
IDE_MWDMA_1,
|
||||
IDE_MWDMA_2,
|
||||
IDE_UDMA_0,
|
||||
IDE_UDMA_1,
|
||||
IDE_UDMA_2,
|
||||
IDE_UDMA_3,
|
||||
IDE_UDMA_4,
|
||||
IDE_UDMA_5,
|
||||
IDE_UDMA_6,
|
||||
IDE_UDMA_7,
|
||||
} DISK_MODE;
|
||||
|
||||
/***************************************************************************
|
||||
* IDE Macro
|
||||
***************************************************************************/
|
||||
#ifndef MAX_LBA_T
|
||||
#define MAX_LBA_T ((LBA_T)-1)
|
||||
#endif
|
||||
|
||||
#define SECTOR_TO_BYTE_SHIFT 9
|
||||
#define SECTOR_TO_BYTE(x) ((ULONG)(x) << SECTOR_TO_BYTE_SHIFT)
|
||||
|
||||
#define mGetStatus(IOPort2) (UCHAR)InPort(&IOPort2->AlternateStatus)
|
||||
#define mUnitControl(IOPort2, Value) OutPort(&IOPort2->AlternateStatus,(UCHAR)(Value))
|
||||
|
||||
#define mGetErrorCode(IOPort) (UCHAR)InPort((PUCHAR)&IOPort->Data+1)
|
||||
#define mSetFeaturePort(IOPort,x) OutPort((PUCHAR)&IOPort->Data+1, x)
|
||||
#define mSetBlockCount(IOPort,x) OutPort(&IOPort->BlockCount, x)
|
||||
#define mGetBlockCount(IOPort) (UCHAR)InPort(&IOPort->BlockCount)
|
||||
#define mGetInterruptReason(IOPort) (UCHAR)InPort(&IOPort->BlockCount)
|
||||
#define mSetBlockNumber(IOPort,x) OutPort(&IOPort->BlockNumber, x)
|
||||
#define mGetBlockNumber(IOPort) (UCHAR)InPort((PUCHAR)&IOPort->BlockNumber)
|
||||
#define mGetByteLow(IOPort) (UCHAR)InPort(&IOPort->CylinderLow)
|
||||
#define mSetCylinderLow(IOPort,x) OutPort(&IOPort->CylinderLow, x)
|
||||
#define mGetByteHigh(IOPort) (UCHAR)InPort(&IOPort->CylinderHigh)
|
||||
#define mSetCylinderHigh(IOPort,x) OutPort(&IOPort->CylinderHigh, x)
|
||||
#define mGetBaseStatus(IOPort) (UCHAR)InPort(&IOPort->Command)
|
||||
#ifdef SUPPORT_HPT601
|
||||
#define mSelectUnit(IOPort,UnitId) do {\
|
||||
OutPort(&IOPort->DriveSelect, (UCHAR)(UnitId));\
|
||||
OutPort(&IOPort->DriveSelect, (UCHAR)(UnitId));\
|
||||
} while (0)
|
||||
#else
|
||||
#define mSelectUnit(IOPort,UnitId) OutPort(&IOPort->DriveSelect, (UCHAR)(UnitId))
|
||||
#endif
|
||||
#define mGetUnitNumber(IOPort) InPort(&IOPort->DriveSelect)
|
||||
#define mIssueCommand(IOPort,Cmd) OutPort(&IOPort->Command, (UCHAR)(Cmd))
|
||||
|
||||
/*
|
||||
* WDC old disk, don't care right now
|
||||
*/
|
||||
#define WDC_MW1_FIX_FLAG_OFFSET 129
|
||||
#define WDC_MW1_FIX_FLAG_VALUE 0x00005555
|
||||
|
||||
#pragma pack()
|
||||
#endif
|
||||
|
||||
|
||||
|
@ -1,265 +0,0 @@
|
||||
/*
|
||||
* Copyright (c) 2003-2004 HighPoint Technologies, Inc.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
#ifndef _COMMAND_H_
|
||||
#define _COMMAND_H_
|
||||
|
||||
/***************************************************************************
|
||||
* Description: Command
|
||||
***************************************************************************/
|
||||
typedef struct _AtaCommand
|
||||
{
|
||||
LBA_T Lba; /* Current Logic Disk command: LBA */
|
||||
USHORT nSectors; /* sector count. May great than 0x80 */
|
||||
UCHAR Command; /* IDE_COMMAND_READ, _WRITE, _VERIFY */
|
||||
UCHAR QueueTag;
|
||||
} AtaComm, *PAtaComm;
|
||||
|
||||
typedef struct _PassthroughCmd {
|
||||
BYTE bFeaturesReg; /* feature register */
|
||||
BYTE bSectorCountReg; /* IDE sector count register. */
|
||||
BYTE bSectorNumberReg; /* IDE sector number register. */
|
||||
BYTE bCylLowReg; /* IDE low order cylinder value. */
|
||||
BYTE bCylHighReg; /* IDE high order cylinder value. */
|
||||
BYTE bDriveHeadReg; /* IDE drive/head register. */
|
||||
BYTE bCommandReg; /* Actual IDE command. Checked for validity by driver. */
|
||||
BYTE nSectors; /* data transfer */
|
||||
ADDRESS pDataBuffer; /* data buffer */
|
||||
}
|
||||
PassthroughCmd;
|
||||
|
||||
/* control commands */
|
||||
#define CTRL_CMD_REBUILD 1
|
||||
#define CTRL_CMD_VERIFY 2
|
||||
#define CTRL_CMD_INIT 3
|
||||
|
||||
/*
|
||||
* RAID5 rebuild/verify
|
||||
* Rebuild/verify one stripe line.
|
||||
* The caller needn't supply a buffer for rebuild.
|
||||
* RebuildSectors member will be updated if its previous location is the
|
||||
* begin of this stripe line.
|
||||
*/
|
||||
typedef struct _R5ControlCmd {
|
||||
LBA_T StripeLine; /* _physical_ stripe line on array */
|
||||
USHORT Offset; /* internal use, don't set */
|
||||
UCHAR Command; /* CTRL_CMD_XXX */
|
||||
UCHAR reserve1;
|
||||
}
|
||||
R5ControlCmd, *PR5ControlCmd;
|
||||
|
||||
/*
|
||||
* RAID1 rebuild/verify
|
||||
* Rebuild/verify specified sectors.
|
||||
* The caller must supply a valid buffer and a physical SG table (or a
|
||||
* pfnBuildSgl routine).
|
||||
* For rebuild/initialize, the buffer size should be nSectors<<9;
|
||||
* For verify, the buffer size should be (nSectors*2)<<9.
|
||||
* RebuildSectors member will be updated if its previous value equals Lba.
|
||||
*/
|
||||
typedef struct _R1ControlCmd {
|
||||
LBA_T Lba;
|
||||
USHORT nSectors;
|
||||
UCHAR Command; /* CTRL_CMD_XXX */
|
||||
UCHAR reserve1;
|
||||
ADDRESS Buffer; /* buffer logical address */
|
||||
#ifdef _MACOSX_
|
||||
ADDRESS PhysicalAddress;
|
||||
#endif
|
||||
}
|
||||
R1ControlCmd, *PR1ControlCmd;
|
||||
|
||||
typedef struct _Command
|
||||
{
|
||||
PVDevice pVDevice;
|
||||
union{
|
||||
/* Ide Command */
|
||||
AtaComm Ide;
|
||||
PassthroughCmd Passthrough;
|
||||
/* Atapi Command */
|
||||
UCHAR Atapi[12];
|
||||
/* Control command */
|
||||
R5ControlCmd R5Control;
|
||||
R1ControlCmd R1Control;
|
||||
} uCmd;
|
||||
|
||||
USHORT cf_physical_sg: 1;
|
||||
USHORT cf_data_in: 1;
|
||||
USHORT cf_data_out: 1;
|
||||
USHORT cf_atapi: 1;
|
||||
USHORT cf_ide_passthrough: 1;
|
||||
USHORT cf_control: 1;
|
||||
|
||||
/* return status */
|
||||
UCHAR Result;
|
||||
/* retry count */
|
||||
UCHAR RetryCount;
|
||||
|
||||
/* S/G table address, if already prepared */
|
||||
FPSCAT_GATH pSgTable;
|
||||
|
||||
/* called if pSgTable is invalid. */
|
||||
int (* HPTLIBAPI pfnBuildSgl)(_VBUS_ARG PCommand pCmd, FPSCAT_GATH pSgTable, int logical);
|
||||
|
||||
/* called when this command is finished */
|
||||
void (* HPTLIBAPI pfnCompletion)(_VBUS_ARG PCommand pCmd);
|
||||
|
||||
/* pointer to origional command */
|
||||
void *pOrgCommand;
|
||||
|
||||
|
||||
/* scratch data area */
|
||||
union {
|
||||
struct {
|
||||
LBA_T StartLBA;
|
||||
UCHAR FirstMember; /* the sequence number of the first member */
|
||||
UCHAR LastMember; /* the sequence number of the last member */
|
||||
USHORT LastSectors; /* the number of sectors for the last member */
|
||||
USHORT FirstSectors; /* the number of sectors for the first member */
|
||||
USHORT FirstOffset; /* the offset from the StartLBA for the first member */
|
||||
USHORT AllMemberBlocks;/* the number of sectors for all member */
|
||||
USHORT WaitInterrupt; /* bit map the members who wait interrupt */
|
||||
UCHAR InSameLine; /* if the start and end on the same line */
|
||||
UCHAR pad1;
|
||||
} array;
|
||||
struct {
|
||||
LBA_T StartLBA;
|
||||
USHORT FirstSectors; /* the number of sectors for the first member */
|
||||
USHORT FirstOffset; /* the offset from the StartLBA for the first member */
|
||||
USHORT WaitInterrupt; /* bit map the members who wait interrupt */
|
||||
USHORT r5_gap; /* see raid5.c */
|
||||
UCHAR ParDiskNo; /* parity for startLba */
|
||||
UCHAR BadDiskNo;
|
||||
UCHAR FirstMember;
|
||||
UCHAR pad1;
|
||||
} r5;
|
||||
struct {
|
||||
PCommand pCmd1;
|
||||
PCommand pCmd2;
|
||||
} r5split;
|
||||
#ifdef _RAID5N_
|
||||
struct {
|
||||
ULONG dummy[2]; /* uScratch.wait shall be moved out uScratch.
|
||||
now just fix it thisway */
|
||||
struct range_lock *range_lock;
|
||||
struct stripe *stripes[5];
|
||||
UCHAR nstripes;
|
||||
UCHAR finished_stripes;
|
||||
USHORT pad2;
|
||||
/* for direct-read: */
|
||||
struct {
|
||||
UCHAR cmds;
|
||||
UCHAR finished;
|
||||
UCHAR first;
|
||||
UCHAR parity;
|
||||
LBA_T base;
|
||||
USHORT firstoffset;
|
||||
USHORT firstsectors;
|
||||
} dr;
|
||||
} r5n2;
|
||||
#endif
|
||||
struct {
|
||||
ULONG WordsLeft;
|
||||
FPSCAT_GATH pPIOSg;
|
||||
void (* HPTLIBAPI pfnOrgDone)(_VBUS_ARG PCommand pCmd);
|
||||
#ifdef SUPPORT_HPT584
|
||||
UCHAR cmd;
|
||||
#endif
|
||||
} disk;
|
||||
struct {
|
||||
PCommand pNext;
|
||||
void (* HPTLIBAPI WaitEntry)(_VBUS_ARG PCommand pCmd);
|
||||
} wait;
|
||||
|
||||
struct {
|
||||
PVOID prdAddr;
|
||||
ULONG cmd_priv;
|
||||
USHORT responseFlags;
|
||||
UCHAR bIdeStatus;
|
||||
UCHAR errorRegister;
|
||||
} sata_param;
|
||||
} uScratch;
|
||||
} Command;
|
||||
|
||||
/***************************************************************************
|
||||
* command return value
|
||||
***************************************************************************/
|
||||
#define RETURN_PENDING 0
|
||||
#define RETURN_SUCCESS 1
|
||||
#define RETURN_BAD_DEVICE 2
|
||||
#define RETURN_BAD_PARAMETER 3
|
||||
#define RETURN_WRITE_NO_DRQ 4
|
||||
#define RETURN_DEVICE_BUSY 5
|
||||
#define RETURN_INVALID_REQUEST 6
|
||||
#define RETURN_SELECTION_TIMEOUT 7
|
||||
#define RETURN_IDE_ERROR 8
|
||||
#define RETURN_NEED_LOGICAL_SG 9
|
||||
#define RETURN_NEED_PHYSICAL_SG 10
|
||||
#define RETURN_RETRY 11
|
||||
#define RETURN_DATA_ERROR 12
|
||||
#define RETURN_BUS_RESET 13
|
||||
#define RETURN_BAD_TRANSFER_LENGTH 14
|
||||
|
||||
typedef void (* HPTLIBAPI DPC_PROC)(_VBUS_ARG void *);
|
||||
typedef struct _dpc_routine {
|
||||
DPC_PROC proc;
|
||||
void *arg;
|
||||
}
|
||||
DPC_ROUTINE;
|
||||
|
||||
/*
|
||||
* MAX_QUEUE_COMM is defined in platform related compiler.h
|
||||
* to specify the maximum requests allowed (for each VBus) from system.
|
||||
*
|
||||
* Maximum command blocks needed for each VBus:
|
||||
* Each OS command requests 1+MAX_MEMBERS*2 command blocks (RAID1/0 case)
|
||||
* This space is allocated by platform dependent part, either static or
|
||||
* dynamic, continuous or non-continous.
|
||||
* The code only needs _vbus_(pFreeCommands) to be set.
|
||||
*
|
||||
* PendingRoutines[] size:
|
||||
* Each command may invoke CallAfterReturn once.
|
||||
*
|
||||
* IdleRoutines[] size:
|
||||
* Each command may invoke CallWhenIdle once.
|
||||
*/
|
||||
#define MAX_COMMAND_BLOCKS_FOR_EACH_VBUS (MAX_QUEUE_COMM * (1+MAX_MEMBERS*2))
|
||||
#define MAX_PENDING_ROUTINES (MAX_COMMAND_BLOCKS_FOR_EACH_VBUS+1)
|
||||
#define MAX_IDLE_ROUTINES (MAX_COMMAND_BLOCKS_FOR_EACH_VBUS+1)
|
||||
|
||||
#define mWaitingForIdle(pVBus) ((pVBus)->IdleRoutinesFirst!=(pVBus)->IdleRoutinesLast)
|
||||
|
||||
PCommand HPTLIBAPI AllocateCommand(_VBUS_ARG0);
|
||||
void FASTCALL FreeCommand(_VBUS_ARG PCommand pCmd);
|
||||
|
||||
void FASTCALL CallAfterReturn(_VBUS_ARG DPC_PROC proc, void *arg);
|
||||
void HPTLIBAPI CheckPendingCall(_VBUS_ARG0);
|
||||
void FASTCALL CallWhenIdle(_VBUS_ARG DPC_PROC proc, void *arg);
|
||||
void HPTLIBAPI CheckIdleCall(_VBUS_ARG0);
|
||||
|
||||
void HPTLIBAPI AddToWaitingList(PCommand *ppList, PCommand pCmd);
|
||||
void HPTLIBAPI DoWaitingList(_VBUS_ARG PCommand *ppList);
|
||||
|
||||
#endif
|
File diff suppressed because it is too large
Load Diff
@ -1,600 +0,0 @@
|
||||
/*
|
||||
* Copyright (c) 2003-2004 HighPoint Technologies, Inc.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
/*
|
||||
* hptproc.c sysctl support
|
||||
*/
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/kernel.h>
|
||||
#include <sys/malloc.h>
|
||||
#include <sys/sysctl.h>
|
||||
#include <machine/stdarg.h>
|
||||
|
||||
#include <dev/hptmv/global.h>
|
||||
#include <dev/hptmv/hptintf.h>
|
||||
#include <dev/hptmv/osbsd.h>
|
||||
#include <contrib/dev/hptmv/access601.h>
|
||||
|
||||
int hpt_rescan_all(void);
|
||||
|
||||
/***************************************************************************/
|
||||
|
||||
static char hptproc_buffer[256];
|
||||
|
||||
#define FORMAL_HANDLER_ARGS struct sysctl_oid *oidp, void *arg1, int arg2, \
|
||||
struct sysctl_req *req
|
||||
#define REAL_HANDLER_ARGS oidp, arg1, arg2, req
|
||||
typedef struct sysctl_req HPT_GET_INFO;
|
||||
|
||||
static int hpt_set_asc_info(IAL_ADAPTER_T *pAdapter, char *buffer,int length)
|
||||
{
|
||||
int orig_length = length+4;
|
||||
PVBus _vbus_p = &pAdapter->VBus;
|
||||
PVDevice pArray;
|
||||
PVDevice pSubArray, pVDev;
|
||||
UINT i, iarray, ichan;
|
||||
struct cam_periph *periph = NULL;
|
||||
intrmask_t oldspl;
|
||||
|
||||
#ifdef SUPPORT_ARRAY
|
||||
if (length>=8 && strncmp(buffer, "rebuild ", 8)==0)
|
||||
{
|
||||
buffer+=8;
|
||||
length-=8;
|
||||
if (length>=5 && strncmp(buffer, "start", 5)==0)
|
||||
{
|
||||
oldspl = lock_driver();
|
||||
for(i = 0; i < MAX_ARRAY_PER_VBUS; i++)
|
||||
if ((pArray=ArrayTables(i))->u.array.dArStamp==0)
|
||||
continue;
|
||||
else{
|
||||
if (pArray->u.array.rf_need_rebuild && !pArray->u.array.rf_rebuilding)
|
||||
hpt_queue_dpc((HPT_DPC)hpt_rebuild_data_block, pAdapter, pArray,
|
||||
(UCHAR)((pArray->u.array.CriticalMembers || pArray->VDeviceType == VD_RAID_1)? DUPLICATE : REBUILD_PARITY));
|
||||
}
|
||||
unlock_driver(oldspl);
|
||||
return orig_length;
|
||||
}
|
||||
else if (length>=4 && strncmp(buffer, "stop", 4)==0)
|
||||
{
|
||||
oldspl = lock_driver();
|
||||
for(i = 0; i < MAX_ARRAY_PER_VBUS; i++)
|
||||
if ((pArray=ArrayTables(i))->u.array.dArStamp==0)
|
||||
continue;
|
||||
else{
|
||||
if (pArray->u.array.rf_rebuilding)
|
||||
pArray->u.array.rf_abort_rebuild = 1;
|
||||
}
|
||||
unlock_driver(oldspl);
|
||||
return orig_length;
|
||||
}
|
||||
else if (length>=3 && buffer[1]==','&& buffer[0]>='1'&& buffer[2]>='1')
|
||||
{
|
||||
iarray = buffer[0]-'1';
|
||||
ichan = buffer[2]-'1';
|
||||
|
||||
if(iarray >= MAX_VDEVICE_PER_VBUS || ichan >= MV_SATA_CHANNELS_NUM) return -EINVAL;
|
||||
|
||||
pArray = _vbus_p->pVDevice[iarray];
|
||||
if (!pArray || (pArray->vf_online == 0)) return -EINVAL;
|
||||
|
||||
for (i=0;i<MV_SATA_CHANNELS_NUM;i++)
|
||||
if(i == ichan)
|
||||
goto rebuild;
|
||||
|
||||
return -EINVAL;
|
||||
|
||||
rebuild:
|
||||
pVDev = &pAdapter->VDevices[ichan];
|
||||
if(!pVDev->u.disk.df_on_line || pVDev->pParent) return -EINVAL;
|
||||
|
||||
/* Not allow to use a mounted disk ??? test*/
|
||||
for(i = 0; i < MAX_VDEVICE_PER_VBUS; i++)
|
||||
if(pVDev == _vbus_p->pVDevice[i])
|
||||
{
|
||||
periph = hpt_get_periph(pAdapter->mvSataAdapter.adapterId,i);
|
||||
if (periph != NULL && periph->refcount == 1)
|
||||
{
|
||||
hpt_printk(("Can not use disk used by OS!\n"));
|
||||
return -EINVAL;
|
||||
}
|
||||
/* the Mounted Disk isn't delete */
|
||||
}
|
||||
|
||||
switch(pArray->VDeviceType)
|
||||
{
|
||||
case VD_RAID_1:
|
||||
case VD_RAID_5:
|
||||
{
|
||||
pSubArray = pArray;
|
||||
loop:
|
||||
oldspl = lock_driver();
|
||||
if(hpt_add_disk_to_array(_VBUS_P VDEV_TO_ID(pSubArray), VDEV_TO_ID(pVDev)) == -1) {
|
||||
unlock_driver(oldspl);
|
||||
return -EINVAL;
|
||||
}
|
||||
pArray->u.array.rf_auto_rebuild = 0;
|
||||
pArray->u.array.rf_abort_rebuild = 0;
|
||||
hpt_queue_dpc((HPT_DPC)hpt_rebuild_data_block, pAdapter, pArray, DUPLICATE);
|
||||
unlock_driver(oldspl);
|
||||
break;
|
||||
}
|
||||
case VD_RAID_0:
|
||||
for (i = 0; (UCHAR)i < pArray->u.array.bArnMember; i++)
|
||||
if(pArray->u.array.pMember[i] && mIsArray(pArray->u.array.pMember[i]) &&
|
||||
(pArray->u.array.pMember[i]->u.array.rf_broken == 1))
|
||||
{
|
||||
pSubArray = pArray->u.array.pMember[i];
|
||||
goto loop;
|
||||
}
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
return orig_length;
|
||||
}
|
||||
}
|
||||
else if (length>=7 && strncmp(buffer, "verify ", 7)==0)
|
||||
{
|
||||
buffer+=7;
|
||||
length-=7;
|
||||
if (length>=6 && strncmp(buffer, "start ", 6)==0)
|
||||
{
|
||||
buffer+=6;
|
||||
length-=6;
|
||||
if (length>=1 && *buffer>='1')
|
||||
{
|
||||
iarray = *buffer-'1';
|
||||
if(iarray >= MAX_VDEVICE_PER_VBUS) return -EINVAL;
|
||||
|
||||
pArray = _vbus_p->pVDevice[iarray];
|
||||
if (!pArray || (pArray->vf_online == 0)) return -EINVAL;
|
||||
|
||||
if(pArray->VDeviceType != VD_RAID_1 && pArray->VDeviceType != VD_RAID_5)
|
||||
return -EINVAL;
|
||||
|
||||
if (!(pArray->u.array.rf_need_rebuild ||
|
||||
pArray->u.array.rf_rebuilding ||
|
||||
pArray->u.array.rf_verifying ||
|
||||
pArray->u.array.rf_initializing))
|
||||
{
|
||||
oldspl = lock_driver();
|
||||
pArray->u.array.RebuildSectors = 0;
|
||||
hpt_queue_dpc((HPT_DPC)hpt_rebuild_data_block, pAdapter, pArray, VERIFY);
|
||||
unlock_driver(oldspl);
|
||||
}
|
||||
return orig_length;
|
||||
}
|
||||
}
|
||||
else if (length>=5 && strncmp(buffer, "stop ", 5)==0)
|
||||
{
|
||||
buffer+=5;
|
||||
length-=5;
|
||||
if (length>=1 && *buffer>='1')
|
||||
{
|
||||
iarray = *buffer-'1';
|
||||
if(iarray >= MAX_VDEVICE_PER_VBUS) return -EINVAL;
|
||||
|
||||
pArray = _vbus_p->pVDevice[iarray];
|
||||
if (!pArray || (pArray->vf_online == 0)) return -EINVAL;
|
||||
if(pArray->u.array.rf_verifying)
|
||||
{
|
||||
oldspl = lock_driver();
|
||||
pArray->u.array.rf_abort_rebuild = 1;
|
||||
unlock_driver(oldspl);
|
||||
}
|
||||
return orig_length;
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
#ifdef _RAID5N_
|
||||
if (length>=10 && strncmp(buffer, "writeback ", 10)==0) {
|
||||
buffer+=10;
|
||||
length-=10;
|
||||
if (length>=1 && *buffer>='0' && *buffer<='1') {
|
||||
_vbus_(r5.enable_write_back) = *buffer-'0';
|
||||
if (_vbus_(r5.enable_write_back))
|
||||
hpt_printk(("RAID5 write back enabled"));
|
||||
return orig_length;
|
||||
}
|
||||
}
|
||||
else
|
||||
#endif
|
||||
#endif /* SUPPORT_ARRAY */
|
||||
if (0) {} /* just to compile */
|
||||
#if DBGUG
|
||||
else if (length>=9 && strncmp(buffer, "dbglevel ", 9)==0) {
|
||||
buffer+=9;
|
||||
length-=9;
|
||||
if (length>=1 && *buffer>='0' && *buffer<='3') {
|
||||
hpt_dbg_level = *buffer-'0';
|
||||
return orig_length;
|
||||
}
|
||||
}
|
||||
else if (length>=8 && strncmp(buffer, "disable ", 8)==0) {
|
||||
/* TO DO */
|
||||
}
|
||||
#endif
|
||||
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/*
|
||||
* Since we have only one sysctl node, add adapter ID in the command
|
||||
* line string: e.g. "hpt 0 rebuild start"
|
||||
*/
|
||||
static int hpt_set_info(int length)
|
||||
{
|
||||
int retval;
|
||||
|
||||
#ifdef SUPPORT_IOCTL
|
||||
PUCHAR ke_area;
|
||||
int err;
|
||||
DWORD dwRet;
|
||||
PHPT_IOCTL_PARAM32 piop;
|
||||
#endif
|
||||
char *buffer = hptproc_buffer;
|
||||
if (length >= 6) {
|
||||
if (strncmp(buffer,"hpt ",4) == 0) {
|
||||
IAL_ADAPTER_T *pAdapter;
|
||||
retval = buffer[4]-'0';
|
||||
for (pAdapter=gIal_Adapter; pAdapter; pAdapter=pAdapter->next) {
|
||||
if (pAdapter->mvSataAdapter.adapterId==retval)
|
||||
return (retval = hpt_set_asc_info(pAdapter, buffer+6, length-6)) >= 0? retval : -EINVAL;
|
||||
}
|
||||
return -EINVAL;
|
||||
}
|
||||
#ifdef SUPPORT_IOCTL
|
||||
piop = (PHPT_IOCTL_PARAM32)buffer;
|
||||
if (piop->Magic == HPT_IOCTL_MAGIC) {
|
||||
KdPrintE(("ioctl=%d in=%x len=%d out=%x len=%ld\n",
|
||||
piop->dwIoControlCode,
|
||||
piop->lpInBuffer,
|
||||
piop->nInBufferSize,
|
||||
piop->lpOutBuffer,
|
||||
(u_long)piop->nOutBufferSize));
|
||||
|
||||
/*
|
||||
* map buffer to kernel.
|
||||
*/
|
||||
if (piop->nInBufferSize+piop->nOutBufferSize > PAGE_SIZE) {
|
||||
KdPrintE(("User buffer too large\n"));
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
ke_area = malloc(piop->nInBufferSize+piop->nOutBufferSize, M_DEVBUF, M_NOWAIT);
|
||||
if (ke_area == NULL) {
|
||||
KdPrintE(("Couldn't allocate kernel mem.\n"));
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (piop->nInBufferSize)
|
||||
copyin((void*)(ULONG_PTR)piop->lpInBuffer, ke_area, piop->nInBufferSize);
|
||||
|
||||
/*
|
||||
* call kernel handler.
|
||||
*/
|
||||
err = Kernel_DeviceIoControl(&gIal_Adapter->VBus,
|
||||
piop->dwIoControlCode, ke_area, piop->nInBufferSize,
|
||||
ke_area + piop->nInBufferSize, piop->nOutBufferSize, &dwRet);
|
||||
|
||||
if (err==0) {
|
||||
if (piop->nOutBufferSize)
|
||||
copyout(ke_area + piop->nInBufferSize, (void*)(ULONG_PTR)piop->lpOutBuffer, piop->nOutBufferSize);
|
||||
|
||||
if (piop->lpBytesReturned)
|
||||
copyout(&dwRet, (void*)(ULONG_PTR)piop->lpBytesReturned, sizeof(DWORD));
|
||||
|
||||
free(ke_area, M_DEVBUF);
|
||||
return length;
|
||||
}
|
||||
else KdPrintW(("Kernel_ioctl(): return %d\n", err));
|
||||
|
||||
free(ke_area, M_DEVBUF);
|
||||
return -EINVAL;
|
||||
} else {
|
||||
KdPrintW(("Wrong signature: %x\n", piop->Magic));
|
||||
return -EINVAL;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
#define shortswap(w) ((WORD)((w)>>8 | ((w) & 0xFF)<<8))
|
||||
|
||||
static void get_disk_name(char *name, PDevice pDev)
|
||||
{
|
||||
int i;
|
||||
MV_SATA_CHANNEL *pMvSataChannel = pDev->mv;
|
||||
IDENTIFY_DATA2 *pIdentifyData = (IDENTIFY_DATA2 *)pMvSataChannel->identifyDevice;
|
||||
|
||||
for (i = 0; i < 10; i++)
|
||||
((WORD*)name)[i] = shortswap(pIdentifyData->ModelNumber[i]);
|
||||
name[20] = '\0';
|
||||
}
|
||||
|
||||
static int hpt_copy_info(HPT_GET_INFO *pinfo, char *fmt, ...)
|
||||
{
|
||||
int printfretval;
|
||||
va_list ap;
|
||||
|
||||
if(fmt == NULL) {
|
||||
*hptproc_buffer = 0;
|
||||
return (SYSCTL_OUT(pinfo, hptproc_buffer, 1));
|
||||
}
|
||||
else
|
||||
{
|
||||
va_start(ap, fmt);
|
||||
printfretval = vsnprintf(hptproc_buffer, sizeof(hptproc_buffer), fmt, ap);
|
||||
va_end(ap);
|
||||
return(SYSCTL_OUT(pinfo, hptproc_buffer, strlen(hptproc_buffer)));
|
||||
}
|
||||
}
|
||||
|
||||
static void hpt_copy_disk_info(HPT_GET_INFO *pinfo, PVDevice pVDev, UINT iChan)
|
||||
{
|
||||
char name[32], arrayname[16];
|
||||
|
||||
get_disk_name(name, &pVDev->u.disk);
|
||||
|
||||
#ifdef SUPPORT_ARRAY
|
||||
if(pVDev->pParent)
|
||||
memcpy(arrayname, pVDev->pParent->u.array.ArrayName, MAX_ARRAY_NAME);
|
||||
else
|
||||
#endif
|
||||
arrayname[0]=0;
|
||||
|
||||
hpt_copy_info(pinfo, "Channel %d %s %5dMB %s %s\n",
|
||||
iChan+1,
|
||||
name, pVDev->VDeviceCapacity>>11,
|
||||
((!pVDev->u.disk.df_on_line)? "Disabled" :
|
||||
((pVDev->VDeviceType != VD_SPARE)?"Normal ":"Spare ")), arrayname);
|
||||
}
|
||||
|
||||
#ifdef SUPPORT_ARRAY
|
||||
static void hpt_copy_array_info(HPT_GET_INFO *pinfo, int nld, PVDevice pArray)
|
||||
{
|
||||
int i;
|
||||
char *sType=0, *sStatus=0;
|
||||
char buf[32];
|
||||
PVDevice pTmpArray;
|
||||
|
||||
switch (pArray->VDeviceType) {
|
||||
case VD_RAID_0:
|
||||
for (i = 0; (UCHAR)i < pArray->u.array.bArnMember; i++)
|
||||
if(pArray->u.array.pMember[i]) {
|
||||
if(mIsArray(pArray->u.array.pMember[i]))
|
||||
sType = "RAID 1/0 ";
|
||||
/* TO DO */
|
||||
else
|
||||
sType = "RAID 0 ";
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
||||
case VD_RAID_1:
|
||||
sType = "RAID 1 ";
|
||||
break;
|
||||
|
||||
case VD_JBOD:
|
||||
sType = "JBOD ";
|
||||
break;
|
||||
|
||||
case VD_RAID_5:
|
||||
sType = "RAID 5 ";
|
||||
break;
|
||||
|
||||
default:
|
||||
sType = "N/A ";
|
||||
break;
|
||||
}
|
||||
|
||||
if (pArray->vf_online == 0)
|
||||
sStatus = "Disabled";
|
||||
else if (pArray->u.array.rf_broken)
|
||||
sStatus = "Critical";
|
||||
for (i = 0; (UCHAR)i < pArray->u.array.bArnMember; i++)
|
||||
{
|
||||
if (!sStatus)
|
||||
{
|
||||
if(mIsArray(pArray->u.array.pMember[i]))
|
||||
pTmpArray = pArray->u.array.pMember[i];
|
||||
else
|
||||
pTmpArray = pArray;
|
||||
|
||||
if (pTmpArray->u.array.rf_rebuilding) {
|
||||
#ifdef DEBUG
|
||||
sprintf(buf, "Rebuilding %dMB", (pTmpArray->u.array.RebuildSectors>>11));
|
||||
#else
|
||||
sprintf(buf, "Rebuilding %d%%", (pTmpArray->u.array.RebuildSectors>>11)*100/((pTmpArray->VDeviceCapacity/(pTmpArray->u.array.bArnMember-1))>>11));
|
||||
#endif
|
||||
sStatus = buf;
|
||||
}
|
||||
else if (pTmpArray->u.array.rf_verifying) {
|
||||
sprintf(buf, "Verifying %d%%", (pTmpArray->u.array.RebuildSectors>>11)*100/((pTmpArray->VDeviceCapacity/(pTmpArray->u.array.bArnMember-1))>>11));
|
||||
sStatus = buf;
|
||||
}
|
||||
else if (pTmpArray->u.array.rf_need_rebuild)
|
||||
sStatus = "Critical";
|
||||
else if (pTmpArray->u.array.rf_broken)
|
||||
sStatus = "Critical";
|
||||
|
||||
if(pTmpArray == pArray) goto out;
|
||||
}
|
||||
else
|
||||
goto out;
|
||||
}
|
||||
out:
|
||||
if (!sStatus) sStatus = "Normal";
|
||||
hpt_copy_info(pinfo, "%2d %11s %-20s %5dMB %-16s", nld, sType, pArray->u.array.ArrayName, pArray->VDeviceCapacity>>11, sStatus);
|
||||
}
|
||||
#endif
|
||||
|
||||
static int hpt_get_info(IAL_ADAPTER_T *pAdapter, HPT_GET_INFO *pinfo)
|
||||
{
|
||||
PVBus _vbus_p = &pAdapter->VBus;
|
||||
struct cam_periph *periph = NULL;
|
||||
UINT channel,j,i;
|
||||
PVDevice pVDev;
|
||||
|
||||
#ifndef FOR_DEMO
|
||||
if (pAdapter->beeping) {
|
||||
intrmask_t oldspl = lock_driver();
|
||||
pAdapter->beeping = 0;
|
||||
BeepOff(pAdapter->mvSataAdapter.adapterIoBaseAddress);
|
||||
unlock_driver(oldspl);
|
||||
}
|
||||
#endif
|
||||
|
||||
hpt_copy_info(pinfo, "Controller #%d:\n\n", pAdapter->mvSataAdapter.adapterId);
|
||||
|
||||
hpt_copy_info(pinfo, "Physical device list\n");
|
||||
hpt_copy_info(pinfo, "Channel Model Capacity Status Array\n");
|
||||
hpt_copy_info(pinfo, "-------------------------------------------------------------------\n");
|
||||
|
||||
for (channel = 0; channel < MV_SATA_CHANNELS_NUM; channel++)
|
||||
{
|
||||
pVDev = &(pAdapter->VDevices[channel]);
|
||||
if(pVDev->u.disk.df_on_line)
|
||||
hpt_copy_disk_info(pinfo, pVDev, channel);
|
||||
}
|
||||
|
||||
hpt_copy_info(pinfo, "\nLogical device list\n");
|
||||
hpt_copy_info(pinfo, "No. Type Name Capacity Status OsDisk\n");
|
||||
hpt_copy_info(pinfo, "--------------------------------------------------------------------------\n");
|
||||
|
||||
j=1;
|
||||
for(i = 0; i < MAX_VDEVICE_PER_VBUS; i++){
|
||||
pVDev = _vbus_p->pVDevice[i];
|
||||
if(pVDev){
|
||||
j=i+1;
|
||||
#ifdef SUPPORT_ARRAY
|
||||
if (mIsArray(pVDev))
|
||||
{
|
||||
is_array:
|
||||
hpt_copy_array_info(pinfo, j, pVDev);
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
char name[32];
|
||||
/* it may be add to an array after driver loaded, check it */
|
||||
#ifdef SUPPORT_ARRAY
|
||||
if (pVDev->pParent)
|
||||
/* in this case, pVDev can only be a RAID 1 source disk. */
|
||||
if (pVDev->pParent->VDeviceType==VD_RAID_1 && pVDev==pVDev->pParent->u.array.pMember[0])
|
||||
goto is_array;
|
||||
#endif
|
||||
get_disk_name(name, &pVDev->u.disk);
|
||||
|
||||
hpt_copy_info(pinfo, "%2d %s %s %5dMB %-16s",
|
||||
j, "Single disk", name, pVDev->VDeviceCapacity>>11,
|
||||
/* gmm 2001-6-19: Check if pDev has been added to an array. */
|
||||
((pVDev->pParent) ? "Unavailable" : "Normal"));
|
||||
}
|
||||
periph = hpt_get_periph(pAdapter->mvSataAdapter.adapterId, i);
|
||||
if (periph == NULL)
|
||||
hpt_copy_info(pinfo," %s\n","not registered");
|
||||
else
|
||||
hpt_copy_info(pinfo," %s%d\n", periph->periph_name, periph->unit_number);
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline int hpt_proc_in(FORMAL_HANDLER_ARGS, int *len)
|
||||
{
|
||||
int i, error=0;
|
||||
|
||||
*len = 0;
|
||||
if ((req->newlen - req->newidx) >= sizeof(hptproc_buffer)) {
|
||||
error = EINVAL;
|
||||
} else {
|
||||
i = (req->newlen - req->newidx);
|
||||
error = SYSCTL_IN(req, hptproc_buffer, i);
|
||||
if (!error)
|
||||
*len = i;
|
||||
(hptproc_buffer)[i] = '\0';
|
||||
}
|
||||
return (error);
|
||||
}
|
||||
|
||||
static int hpt_status(FORMAL_HANDLER_ARGS)
|
||||
{
|
||||
int length, error=0, retval=0;
|
||||
IAL_ADAPTER_T *pAdapter;
|
||||
|
||||
error = hpt_proc_in(REAL_HANDLER_ARGS, &length);
|
||||
|
||||
if (req->newptr != NULL)
|
||||
{
|
||||
if (error || length == 0)
|
||||
{
|
||||
KdPrint(("error!\n"));
|
||||
retval = EINVAL;
|
||||
goto out;
|
||||
}
|
||||
|
||||
if (hpt_set_info(length) >= 0)
|
||||
retval = 0;
|
||||
else
|
||||
retval = EINVAL;
|
||||
goto out;
|
||||
}
|
||||
|
||||
hpt_copy_info(req, "%s Version %s\n", DRIVER_NAME, DRIVER_VERSION);
|
||||
for (pAdapter=gIal_Adapter; pAdapter; pAdapter=pAdapter->next) {
|
||||
if (hpt_get_info(pAdapter, req) < 0) {
|
||||
retval = EINVAL;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
hpt_copy_info(req, NULL);
|
||||
goto out;
|
||||
|
||||
out:
|
||||
return (retval);
|
||||
}
|
||||
|
||||
|
||||
#define xhptregister_node(name) hptregister_node(name)
|
||||
|
||||
#if (__FreeBSD_version < 500043)
|
||||
#define hptregister_node(name) \
|
||||
SYSCTL_NODE(, OID_AUTO, name, CTLFLAG_RW, 0, "Get/Set " #name " state root node") \
|
||||
SYSCTL_OID(_ ## name, OID_AUTO, status, CTLTYPE_STRING|CTLFLAG_RW, \
|
||||
NULL, 0, hpt_status, "A", "Get/Set " #name " state")
|
||||
#else
|
||||
#define hptregister_node(name) \
|
||||
SYSCTL_NODE(, OID_AUTO, name, CTLFLAG_RW, 0, "Get/Set " #name " state root node"); \
|
||||
SYSCTL_OID(_ ## name, OID_AUTO, status, CTLTYPE_STRING|CTLFLAG_RW, \
|
||||
NULL, 0, hpt_status, "A", "Get/Set " #name " state");
|
||||
#endif
|
||||
|
||||
xhptregister_node(PROC_DIR_NAME);
|
File diff suppressed because it is too large
Load Diff
@ -1,928 +0,0 @@
|
||||
/*
|
||||
* Copyright (c) 2003-2004 HighPoint Technologies, Inc.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
/*
|
||||
* ioctl.c ioctl interface implementation
|
||||
*/
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/kernel.h>
|
||||
#include <sys/malloc.h>
|
||||
|
||||
#include <dev/hptmv/global.h>
|
||||
#include <dev/hptmv/hptintf.h>
|
||||
#include <dev/hptmv/osbsd.h>
|
||||
#include <contrib/dev/hptmv/access601.h>
|
||||
|
||||
#pragma pack(1)
|
||||
|
||||
typedef struct _HPT_REBUILD_PARAM
|
||||
{
|
||||
DEVICEID idMirror;
|
||||
DWORD Lba;
|
||||
UCHAR nSector;
|
||||
} HPT_REBUILD_PARAM, *PHPT_REBUILD_PARAM;
|
||||
|
||||
#pragma pack()
|
||||
|
||||
#define MAX_EVENTS 10
|
||||
static HPT_EVENT hpt_event_queue[MAX_EVENTS];
|
||||
static int event_queue_head=0, event_queue_tail=0;
|
||||
|
||||
static int hpt_get_event(PHPT_EVENT pEvent);
|
||||
static int hpt_set_array_state(DEVICEID idArray, DWORD state);
|
||||
static intrmask_t lock_driver_idle(IAL_ADAPTER_T *pAdapter);
|
||||
static void HPTLIBAPI thread_io_done(_VBUS_ARG PCommand pCmd);
|
||||
static int HPTLIBAPI R1ControlSgl(_VBUS_ARG PCommand pCmd,
|
||||
FPSCAT_GATH pSgTable, int logical);
|
||||
|
||||
static void get_disk_location(PDevice pDev, int *controller, int *channel)
|
||||
{
|
||||
IAL_ADAPTER_T *pAdapTemp;
|
||||
int i, j;
|
||||
|
||||
for (i=1, pAdapTemp = gIal_Adapter; pAdapTemp; pAdapTemp = pAdapTemp->next, i++) {
|
||||
for (j=0; j<MV_SATA_CHANNELS_NUM; j++)
|
||||
if (pDev==&pAdapTemp->VDevices[j].u.disk) {
|
||||
*controller = i;
|
||||
*channel = j;
|
||||
return;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static int event_queue_add(PHPT_EVENT pEvent)
|
||||
{
|
||||
int p;
|
||||
p = (event_queue_tail + 1) % MAX_EVENTS;
|
||||
if (p==event_queue_head)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
hpt_event_queue[event_queue_tail] = *pEvent;
|
||||
event_queue_tail = p;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int event_queue_remove(PHPT_EVENT pEvent)
|
||||
{
|
||||
if (event_queue_head != event_queue_tail)
|
||||
{
|
||||
*pEvent = hpt_event_queue[event_queue_head];
|
||||
event_queue_head++;
|
||||
event_queue_head %= MAX_EVENTS;
|
||||
return 0;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
void HPTLIBAPI ioctl_ReportEvent(UCHAR event, PVOID param)
|
||||
{
|
||||
HPT_EVENT e;
|
||||
ZeroMemory(&e, sizeof(e));
|
||||
e.EventType = event;
|
||||
switch(event)
|
||||
{
|
||||
case ET_INITIALIZE_ABORTED:
|
||||
case ET_INITIALIZE_FAILED:
|
||||
memcpy(e.Data, ((PVDevice)param)->u.array.ArrayName, MAX_ARRAY_NAME);
|
||||
case ET_INITIALIZE_STARTED:
|
||||
case ET_INITIALIZE_FINISHED:
|
||||
|
||||
case ET_REBUILD_STARTED:
|
||||
case ET_REBUILD_ABORTED:
|
||||
case ET_REBUILD_FAILED:
|
||||
case ET_REBUILD_FINISHED:
|
||||
|
||||
case ET_VERIFY_STARTED:
|
||||
case ET_VERIFY_ABORTED:
|
||||
case ET_VERIFY_FAILED:
|
||||
case ET_VERIFY_FINISHED:
|
||||
case ET_VERIFY_DATA_ERROR:
|
||||
|
||||
case ET_SPARE_TOOK_OVER:
|
||||
case ET_DEVICE_REMOVED:
|
||||
case ET_DEVICE_PLUGGED:
|
||||
case ET_DEVICE_ERROR:
|
||||
e.DeviceID = VDEV_TO_ID((PVDevice)param);
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
event_queue_add(&e);
|
||||
if (event==ET_DEVICE_REMOVED) {
|
||||
int controller, channel;
|
||||
get_disk_location(&((PVDevice)param)->u.disk, &controller, &channel);
|
||||
hpt_printk(("Device removed: controller %d channel %d\n", controller, channel));
|
||||
}
|
||||
}
|
||||
|
||||
static int hpt_delete_array(_VBUS_ARG DEVICEID id, DWORD options)
|
||||
{
|
||||
PVDevice pArray = ID_TO_VDEV(id);
|
||||
BOOLEAN del_block0 = (options & DAF_KEEP_DATA_IF_POSSIBLE)?0:1;
|
||||
int i;
|
||||
PVDevice pa;
|
||||
|
||||
if((id== HPT_NULL_ID) || check_VDevice_valid(pArray))
|
||||
return -1;
|
||||
|
||||
if(!mIsArray(pArray)) return -1;
|
||||
|
||||
if (pArray->u.array.rf_rebuilding || pArray->u.array.rf_verifying ||
|
||||
pArray->u.array.rf_initializing)
|
||||
return -1;
|
||||
|
||||
for(i=0; i<pArray->u.array.bArnMember; i++) {
|
||||
pa = pArray->u.array.pMember[i];
|
||||
if (pa && mIsArray(pa)) {
|
||||
if (pa->u.array.rf_rebuilding || pa->u.array.rf_verifying ||
|
||||
pa->u.array.rf_initializing)
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
|
||||
if (pArray->pVBus!=_vbus_p) { HPT_ASSERT(0); return -1;}
|
||||
fDeleteArray(_VBUS_P pArray, del_block0);
|
||||
return 0;
|
||||
|
||||
}
|
||||
|
||||
/* just to prevent driver from sending more commands */
|
||||
static void HPTLIBAPI nothing(_VBUS_ARG void *notused){}
|
||||
|
||||
static intrmask_t lock_driver_idle(IAL_ADAPTER_T *pAdapter)
|
||||
{
|
||||
intrmask_t oldspl;
|
||||
_VBUS_INST(&pAdapter->VBus)
|
||||
oldspl = lock_driver();
|
||||
while (pAdapter->outstandingCommands) {
|
||||
KdPrint(("outstandingCommands is %d, wait..\n", pAdapter->outstandingCommands));
|
||||
if (!mWaitingForIdle(_VBUS_P0)) CallWhenIdle(_VBUS_P nothing, 0);
|
||||
unlock_driver(oldspl);
|
||||
oldspl = lock_driver();
|
||||
}
|
||||
CheckIdleCall(_VBUS_P0);
|
||||
return oldspl;
|
||||
}
|
||||
|
||||
int Kernel_DeviceIoControl(_VBUS_ARG
|
||||
DWORD dwIoControlCode, /* operation control code */
|
||||
PVOID lpInBuffer, /* input data buffer */
|
||||
DWORD nInBufferSize, /* size of input data buffer */
|
||||
PVOID lpOutBuffer, /* output data buffer */
|
||||
DWORD nOutBufferSize, /* size of output data buffer */
|
||||
PDWORD lpBytesReturned /* byte count */
|
||||
)
|
||||
{
|
||||
IAL_ADAPTER_T *pAdapter;
|
||||
|
||||
switch(dwIoControlCode) {
|
||||
case HPT_IOCTL_DELETE_ARRAY:
|
||||
{
|
||||
DEVICEID idArray;
|
||||
int iSuccess;
|
||||
int i;
|
||||
PVDevice pArray;
|
||||
PVBus _vbus_p;
|
||||
struct cam_periph *periph = NULL;
|
||||
|
||||
if (nInBufferSize!=sizeof(DEVICEID)+sizeof(DWORD)) return -1;
|
||||
if (nOutBufferSize!=sizeof(int)) return -1;
|
||||
idArray = *(DEVICEID *)lpInBuffer;
|
||||
|
||||
pArray = ID_TO_VDEV(idArray);
|
||||
|
||||
if((idArray == HPT_NULL_ID) || check_VDevice_valid(pArray))
|
||||
return -1;
|
||||
|
||||
if(!mIsArray(pArray))
|
||||
return -1;
|
||||
|
||||
_vbus_p=pArray->pVBus;
|
||||
pAdapter = (IAL_ADAPTER_T *)_vbus_p->OsExt;
|
||||
|
||||
for(i = 0; i < MAX_VDEVICE_PER_VBUS; i++) {
|
||||
if(pArray == _vbus_p->pVDevice[i])
|
||||
{
|
||||
periph = hpt_get_periph(pAdapter->mvSataAdapter.adapterId, i);
|
||||
if (periph != NULL && periph->refcount == 1)
|
||||
{
|
||||
hpt_printk(("Can not delete a mounted device.\n"));
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
/* the Mounted Disk isn't delete */
|
||||
}
|
||||
|
||||
iSuccess = hpt_delete_array(_VBUS_P idArray, *(DWORD*)((DEVICEID *)lpInBuffer+1));
|
||||
|
||||
*(int*)lpOutBuffer = iSuccess;
|
||||
|
||||
if(iSuccess != 0)
|
||||
return -1;
|
||||
break;
|
||||
}
|
||||
|
||||
case HPT_IOCTL_GET_EVENT:
|
||||
{
|
||||
PHPT_EVENT pInfo;
|
||||
|
||||
if (nInBufferSize!=0) return -1;
|
||||
if (nOutBufferSize!=sizeof(HPT_EVENT)) return -1;
|
||||
|
||||
pInfo = (PHPT_EVENT)lpOutBuffer;
|
||||
|
||||
if (hpt_get_event(pInfo)!=0)
|
||||
return -1;
|
||||
}
|
||||
break;
|
||||
|
||||
case HPT_IOCTL_SET_ARRAY_STATE:
|
||||
{
|
||||
DEVICEID idArray;
|
||||
DWORD state;
|
||||
|
||||
if (nInBufferSize!=sizeof(HPT_SET_STATE_PARAM)) return -1;
|
||||
if (nOutBufferSize!=0) return -1;
|
||||
|
||||
idArray = ((PHPT_SET_STATE_PARAM)lpInBuffer)->idArray;
|
||||
state = ((PHPT_SET_STATE_PARAM)lpInBuffer)->state;
|
||||
|
||||
if(hpt_set_array_state(idArray, state)!=0)
|
||||
return -1;
|
||||
}
|
||||
break;
|
||||
|
||||
case HPT_IOCTL_RESCAN_DEVICES:
|
||||
{
|
||||
if (nInBufferSize!=0) return -1;
|
||||
if (nOutBufferSize!=0) return -1;
|
||||
|
||||
#ifndef FOR_DEMO
|
||||
/* stop buzzer if user perform rescan */
|
||||
for (pAdapter=gIal_Adapter; pAdapter; pAdapter=pAdapter->next) {
|
||||
if (pAdapter->beeping) {
|
||||
pAdapter->beeping = 0;
|
||||
BeepOff(pAdapter->mvSataAdapter.adapterIoBaseAddress);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
{
|
||||
PVDevice pVDev;
|
||||
#ifdef SUPPORT_ARRAY
|
||||
intrmask_t oldspl;
|
||||
#endif
|
||||
switch(dwIoControlCode) {
|
||||
/* read-only ioctl functions can be called directly. */
|
||||
case HPT_IOCTL_GET_VERSION:
|
||||
case HPT_IOCTL_GET_CONTROLLER_IDS:
|
||||
case HPT_IOCTL_GET_CONTROLLER_COUNT:
|
||||
case HPT_IOCTL_GET_CONTROLLER_INFO:
|
||||
case HPT_IOCTL_GET_CHANNEL_INFO:
|
||||
case HPT_IOCTL_GET_LOGICAL_DEVICES:
|
||||
case HPT_IOCTL_GET_DEVICE_INFO:
|
||||
case HPT_IOCTL_GET_EVENT:
|
||||
case HPT_IOCTL_GET_DRIVER_CAPABILITIES:
|
||||
if(hpt_default_ioctl(_VBUS_P dwIoControlCode, lpInBuffer, nInBufferSize,
|
||||
lpOutBuffer, nOutBufferSize, lpBytesReturned) == -1) return -1;
|
||||
break;
|
||||
|
||||
default:
|
||||
/*
|
||||
* GUI always use /proc/scsi/hptmv/0, so the _vbus_p param will be
|
||||
* wrong for second controller.
|
||||
*/
|
||||
switch(dwIoControlCode) {
|
||||
case HPT_IOCTL_CREATE_ARRAY:
|
||||
pVDev = ID_TO_VDEV(((PCREATE_ARRAY_PARAMS)lpInBuffer)->Members[0]); break;
|
||||
case HPT_IOCTL_SET_ARRAY_INFO:
|
||||
pVDev = ID_TO_VDEV(((PHPT_SET_ARRAY_INFO)lpInBuffer)->idArray); break;
|
||||
case HPT_IOCTL_SET_DEVICE_INFO:
|
||||
pVDev = ID_TO_VDEV(((PHPT_SET_DEVICE_INFO)lpInBuffer)->idDisk); break;
|
||||
case HPT_IOCTL_SET_BOOT_MARK:
|
||||
case HPT_IOCTL_ADD_SPARE_DISK:
|
||||
case HPT_IOCTL_REMOVE_SPARE_DISK:
|
||||
pVDev = ID_TO_VDEV(*(DEVICEID *)lpInBuffer); break;
|
||||
case HPT_IOCTL_ADD_DISK_TO_ARRAY:
|
||||
pVDev = ID_TO_VDEV(((PHPT_ADD_DISK_TO_ARRAY)lpInBuffer)->idArray); break;
|
||||
default:
|
||||
pVDev = 0;
|
||||
}
|
||||
|
||||
if (pVDev && !check_VDevice_valid(pVDev)){
|
||||
_vbus_p = pVDev->pVBus;
|
||||
|
||||
pAdapter = (IAL_ADAPTER_T *)_vbus_p->OsExt;
|
||||
/*
|
||||
* create_array, and other functions can't be executed while channel is
|
||||
* perform I/O commands. Wait until driver is idle.
|
||||
*/
|
||||
oldspl = lock_driver_idle(pAdapter);
|
||||
if (hpt_default_ioctl(_VBUS_P dwIoControlCode, lpInBuffer, nInBufferSize,
|
||||
lpOutBuffer, nOutBufferSize, lpBytesReturned) == -1) {
|
||||
unlock_driver(oldspl);
|
||||
return -1;
|
||||
}
|
||||
unlock_driver(oldspl);
|
||||
}
|
||||
else
|
||||
return -1;
|
||||
break;
|
||||
}
|
||||
|
||||
#ifdef SUPPORT_ARRAY
|
||||
switch(dwIoControlCode)
|
||||
{
|
||||
case HPT_IOCTL_CREATE_ARRAY:
|
||||
{
|
||||
pAdapter=(IAL_ADAPTER_T *)(ID_TO_VDEV(*(DEVICEID *)lpOutBuffer))->pVBus->OsExt;
|
||||
oldspl = lock_driver();
|
||||
if(((PCREATE_ARRAY_PARAMS)lpInBuffer)->CreateFlags & CAF_CREATE_AND_DUPLICATE)
|
||||
{
|
||||
(ID_TO_VDEV(*(DEVICEID *)lpOutBuffer))->u.array.rf_auto_rebuild = 0;
|
||||
hpt_queue_dpc((HPT_DPC)hpt_rebuild_data_block, pAdapter, ID_TO_VDEV(*(DEVICEID *)lpOutBuffer), DUPLICATE);
|
||||
}
|
||||
else if(((PCREATE_ARRAY_PARAMS)lpInBuffer)->CreateFlags & CAF_CREATE_R5_ZERO_INIT)
|
||||
{
|
||||
hpt_queue_dpc((HPT_DPC)hpt_rebuild_data_block, pAdapter, ID_TO_VDEV(*(DEVICEID *)lpOutBuffer), INITIALIZE);
|
||||
}
|
||||
else if(((PCREATE_ARRAY_PARAMS)lpInBuffer)->CreateFlags & CAF_CREATE_R5_BUILD_PARITY)
|
||||
{
|
||||
hpt_queue_dpc((HPT_DPC)hpt_rebuild_data_block, pAdapter, ID_TO_VDEV(*(DEVICEID *)lpOutBuffer), REBUILD_PARITY);
|
||||
}
|
||||
unlock_driver(oldspl);
|
||||
break;
|
||||
}
|
||||
|
||||
case HPT_IOCTL_ADD_DISK_TO_ARRAY:
|
||||
{
|
||||
PVDevice pArray = ID_TO_VDEV(((PHPT_ADD_DISK_TO_ARRAY)lpInBuffer)->idArray);
|
||||
pAdapter=(IAL_ADAPTER_T *)pArray->pVBus->OsExt;
|
||||
if(pArray->u.array.rf_rebuilding == HPT_NULL_ID)
|
||||
{
|
||||
DWORD timeout = 0;
|
||||
oldspl = lock_driver();
|
||||
pArray->u.array.rf_auto_rebuild = 0;
|
||||
pArray->u.array.rf_abort_rebuild = 0;
|
||||
hpt_queue_dpc((HPT_DPC)hpt_rebuild_data_block, pAdapter, pArray, DUPLICATE);
|
||||
unlock_driver(oldspl);
|
||||
while (!pArray->u.array.rf_rebuilding)
|
||||
{
|
||||
tsleep((caddr_t)Kernel_DeviceIoControl, PPAUSE, "pause", 1);
|
||||
if ( timeout >= hz*3)
|
||||
break;
|
||||
timeout ++;
|
||||
}
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
if (lpBytesReturned)
|
||||
*lpBytesReturned = nOutBufferSize;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int hpt_get_event(PHPT_EVENT pEvent)
|
||||
{
|
||||
intrmask_t oldspl = lock_driver();
|
||||
int ret = event_queue_remove(pEvent);
|
||||
unlock_driver(oldspl);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int hpt_set_array_state(DEVICEID idArray, DWORD state)
|
||||
{
|
||||
IAL_ADAPTER_T *pAdapter;
|
||||
PVDevice pVDevice = ID_TO_VDEV(idArray);
|
||||
int i;
|
||||
DWORD timeout = 0;
|
||||
intrmask_t oldspl;
|
||||
|
||||
if(idArray == HPT_NULL_ID || check_VDevice_valid(pVDevice))
|
||||
return -1;
|
||||
if(!mIsArray(pVDevice))
|
||||
return -1;
|
||||
if(!pVDevice->vf_online || pVDevice->u.array.rf_broken) return -1;
|
||||
|
||||
pAdapter=(IAL_ADAPTER_T *)pVDevice->pVBus->OsExt;
|
||||
|
||||
switch(state)
|
||||
{
|
||||
case MIRROR_REBUILD_START:
|
||||
{
|
||||
if (pVDevice->u.array.rf_rebuilding ||
|
||||
pVDevice->u.array.rf_verifying ||
|
||||
pVDevice->u.array.rf_initializing)
|
||||
return -1;
|
||||
|
||||
oldspl = lock_driver();
|
||||
|
||||
pVDevice->u.array.rf_auto_rebuild = 0;
|
||||
pVDevice->u.array.rf_abort_rebuild = 0;
|
||||
|
||||
hpt_queue_dpc((HPT_DPC)hpt_rebuild_data_block, pAdapter, pVDevice,
|
||||
(UCHAR)((pVDevice->u.array.CriticalMembers || pVDevice->VDeviceType == VD_RAID_1)? DUPLICATE : REBUILD_PARITY));
|
||||
|
||||
unlock_driver(oldspl);
|
||||
|
||||
while (!pVDevice->u.array.rf_rebuilding)
|
||||
{
|
||||
tsleep((caddr_t)hpt_set_array_state, PPAUSE, "pause", 1);
|
||||
if ( timeout >= hz*20)
|
||||
break;
|
||||
timeout ++;
|
||||
}
|
||||
}
|
||||
|
||||
break;
|
||||
|
||||
case MIRROR_REBUILD_ABORT:
|
||||
{
|
||||
for(i = 0; i < pVDevice->u.array.bArnMember; i++) {
|
||||
if(pVDevice->u.array.pMember[i] != NULL && pVDevice->u.array.pMember[i]->VDeviceType == VD_RAID_1)
|
||||
hpt_set_array_state(VDEV_TO_ID(pVDevice->u.array.pMember[i]), state);
|
||||
}
|
||||
|
||||
if(pVDevice->u.array.rf_rebuilding != 1)
|
||||
return -1;
|
||||
|
||||
oldspl = lock_driver();
|
||||
pVDevice->u.array.rf_abort_rebuild = 1;
|
||||
unlock_driver(oldspl);
|
||||
|
||||
while (pVDevice->u.array.rf_abort_rebuild)
|
||||
{
|
||||
tsleep((caddr_t)hpt_set_array_state, PPAUSE, "pause", 1);
|
||||
if ( timeout >= hz*20)
|
||||
break;
|
||||
timeout ++;
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case AS_VERIFY_START:
|
||||
{
|
||||
/*if(pVDevice->u.array.rf_verifying)
|
||||
return -1;*/
|
||||
if (pVDevice->u.array.rf_rebuilding ||
|
||||
pVDevice->u.array.rf_verifying ||
|
||||
pVDevice->u.array.rf_initializing)
|
||||
return -1;
|
||||
|
||||
oldspl = lock_driver();
|
||||
pVDevice->u.array.RebuildSectors = 0;
|
||||
hpt_queue_dpc((HPT_DPC)hpt_rebuild_data_block, pAdapter, pVDevice, VERIFY);
|
||||
unlock_driver(oldspl);
|
||||
|
||||
while (!pVDevice->u.array.rf_verifying)
|
||||
{
|
||||
tsleep((caddr_t)hpt_set_array_state, PPAUSE, "pause", 1);
|
||||
if ( timeout >= hz*20)
|
||||
break;
|
||||
timeout ++;
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case AS_VERIFY_ABORT:
|
||||
{
|
||||
if(pVDevice->u.array.rf_verifying != 1)
|
||||
return -1;
|
||||
|
||||
oldspl = lock_driver();
|
||||
pVDevice->u.array.rf_abort_rebuild = 1;
|
||||
unlock_driver(oldspl);
|
||||
|
||||
while (pVDevice->u.array.rf_abort_rebuild)
|
||||
{
|
||||
tsleep((caddr_t)hpt_set_array_state, PPAUSE, "pause", 1);
|
||||
if ( timeout >= hz*80)
|
||||
break;
|
||||
timeout ++;
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case AS_INITIALIZE_START:
|
||||
{
|
||||
if (pVDevice->u.array.rf_rebuilding ||
|
||||
pVDevice->u.array.rf_verifying ||
|
||||
pVDevice->u.array.rf_initializing)
|
||||
return -1;
|
||||
|
||||
oldspl = lock_driver();
|
||||
hpt_queue_dpc((HPT_DPC)hpt_rebuild_data_block, pAdapter, pVDevice, VERIFY);
|
||||
unlock_driver(oldspl);
|
||||
|
||||
while (!pVDevice->u.array.rf_initializing)
|
||||
{
|
||||
tsleep((caddr_t)hpt_set_array_state, PPAUSE, "pause", 1);
|
||||
if ( timeout >= hz*80)
|
||||
break;
|
||||
timeout ++;
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case AS_INITIALIZE_ABORT:
|
||||
{
|
||||
if(pVDevice->u.array.rf_initializing != 1)
|
||||
return -1;
|
||||
|
||||
oldspl = lock_driver();
|
||||
pVDevice->u.array.rf_abort_rebuild = 1;
|
||||
unlock_driver(oldspl);
|
||||
|
||||
while (pVDevice->u.array.rf_abort_rebuild)
|
||||
{
|
||||
tsleep((caddr_t)hpt_set_array_state, PPAUSE, "pause", 1);
|
||||
if ( timeout >= hz*80)
|
||||
break;
|
||||
timeout ++;
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int HPTLIBAPI R1ControlSgl(_VBUS_ARG PCommand pCmd, FPSCAT_GATH pSgTable, int logical)
|
||||
{
|
||||
ULONG bufferSize = SECTOR_TO_BYTE(pCmd->uCmd.R1Control.nSectors);
|
||||
if (pCmd->uCmd.R1Control.Command==CTRL_CMD_VERIFY)
|
||||
bufferSize<<=1;
|
||||
if (logical) {
|
||||
pSgTable->dSgAddress = (ULONG_PTR)pCmd->uCmd.R1Control.Buffer;
|
||||
pSgTable->wSgSize = (USHORT)bufferSize;
|
||||
pSgTable->wSgFlag = SG_FLAG_EOT;
|
||||
}
|
||||
else {
|
||||
/* build physical SG table for pCmd->uCmd.R1Control.Buffer */
|
||||
ADDRESS dataPointer, v, nextpage, currvaddr, nextvaddr, currphypage, nextphypage;
|
||||
ULONG length;
|
||||
int idx = 0;
|
||||
|
||||
v = pCmd->uCmd.R1Control.Buffer;
|
||||
dataPointer = (ADDRESS)fOsPhysicalAddress(v);
|
||||
|
||||
if ((ULONG_PTR)dataPointer & 0x1)
|
||||
return FALSE;
|
||||
|
||||
#define ON64KBOUNDARY(x) (((ULONG_PTR)(x) & 0xFFFF) == 0)
|
||||
#define NOTNEIGHBORPAGE(highvaddr, lowvaddr) ((ULONG_PTR)(highvaddr) - (ULONG_PTR)(lowvaddr) != PAGE_SIZE)
|
||||
|
||||
do {
|
||||
if (idx >= MAX_SG_DESCRIPTORS) return FALSE;
|
||||
|
||||
pSgTable[idx].dSgAddress = fOsPhysicalAddress(v);
|
||||
currvaddr = v;
|
||||
currphypage = (ADDRESS)fOsPhysicalAddress((void*)trunc_page((ULONG_PTR)currvaddr));
|
||||
|
||||
|
||||
do {
|
||||
nextpage = (ADDRESS)trunc_page(((ULONG_PTR)currvaddr + PAGE_SIZE));
|
||||
nextvaddr = (ADDRESS)MIN(((ULONG_PTR)v + bufferSize), (ULONG_PTR)(nextpage));
|
||||
|
||||
if (nextvaddr == (ADDRESS)((ULONG_PTR)v + bufferSize)) break;
|
||||
nextphypage = (ADDRESS)fOsPhysicalAddress(nextpage);
|
||||
|
||||
if (NOTNEIGHBORPAGE(nextphypage, currphypage) || ON64KBOUNDARY(nextphypage)) {
|
||||
nextvaddr = nextpage;
|
||||
break;
|
||||
}
|
||||
|
||||
currvaddr = nextvaddr;
|
||||
currphypage = nextphypage;
|
||||
}while (1);
|
||||
|
||||
length = (ULONG_PTR)nextvaddr - (ULONG_PTR)v;
|
||||
v = nextvaddr;
|
||||
bufferSize -= length;
|
||||
|
||||
pSgTable[idx].wSgSize = (USHORT)length;
|
||||
pSgTable[idx].wSgFlag = (bufferSize)? 0 : SG_FLAG_EOT;
|
||||
idx++;
|
||||
|
||||
}while (bufferSize);
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
|
||||
static int End_Job=0;
|
||||
static void HPTLIBAPI thread_io_done(_VBUS_ARG PCommand pCmd)
|
||||
{
|
||||
End_Job = 1;
|
||||
wakeup((caddr_t)pCmd);
|
||||
}
|
||||
|
||||
void hpt_rebuild_data_block(IAL_ADAPTER_T *pAdapter, PVDevice pArray, UCHAR flags)
|
||||
{
|
||||
DWORD timeout = 0;
|
||||
ULONG capacity = pArray->VDeviceCapacity / (pArray->u.array.bArnMember-1);
|
||||
PCommand pCmd;
|
||||
UINT result;
|
||||
int needsync=0, retry=0, needdelete=0;
|
||||
void *buffer = 0;
|
||||
intrmask_t oldspl;
|
||||
|
||||
_VBUS_INST(&pAdapter->VBus)
|
||||
|
||||
if (pArray->u.array.rf_broken==1 ||
|
||||
pArray->u.array.RebuildSectors>=capacity)
|
||||
return;
|
||||
|
||||
oldspl = lock_driver();
|
||||
|
||||
switch(flags)
|
||||
{
|
||||
case DUPLICATE:
|
||||
case REBUILD_PARITY:
|
||||
if(pArray->u.array.rf_rebuilding == 0)
|
||||
{
|
||||
pArray->u.array.rf_rebuilding = 1;
|
||||
hpt_printk(("Rebuilding started.\n"));
|
||||
ioctl_ReportEvent(ET_REBUILD_STARTED, pArray);
|
||||
}
|
||||
break;
|
||||
|
||||
case INITIALIZE:
|
||||
if(pArray->u.array.rf_initializing == 0)
|
||||
{
|
||||
pArray->u.array.rf_initializing = 1;
|
||||
hpt_printk(("Initializing started.\n"));
|
||||
ioctl_ReportEvent(ET_INITIALIZE_STARTED, pArray);
|
||||
}
|
||||
break;
|
||||
|
||||
case VERIFY:
|
||||
if(pArray->u.array.rf_verifying == 0)
|
||||
{
|
||||
pArray->u.array.rf_verifying = 1;
|
||||
hpt_printk(("Verifying started.\n"));
|
||||
ioctl_ReportEvent(ET_VERIFY_STARTED, pArray);
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
retry_cmd:
|
||||
pCmd = AllocateCommand(_VBUS_P0);
|
||||
HPT_ASSERT(pCmd);
|
||||
pCmd->cf_control = 1;
|
||||
End_Job = 0;
|
||||
|
||||
if (pArray->VDeviceType==VD_RAID_1)
|
||||
{
|
||||
#define MAX_REBUILD_SECTORS 0x40
|
||||
|
||||
/* take care for discontinuous buffer in R1ControlSgl */
|
||||
buffer = malloc(SECTOR_TO_BYTE(MAX_REBUILD_SECTORS), M_DEVBUF, M_NOWAIT);
|
||||
if(!buffer) {
|
||||
FreeCommand(_VBUS_P pCmd);
|
||||
hpt_printk(("can't allocate rebuild buffer\n"));
|
||||
goto fail;
|
||||
}
|
||||
switch(flags)
|
||||
{
|
||||
case DUPLICATE:
|
||||
pCmd->uCmd.R1Control.Command = CTRL_CMD_REBUILD;
|
||||
pCmd->uCmd.R1Control.nSectors = MAX_REBUILD_SECTORS;
|
||||
break;
|
||||
|
||||
case VERIFY:
|
||||
pCmd->uCmd.R1Control.Command = CTRL_CMD_VERIFY;
|
||||
pCmd->uCmd.R1Control.nSectors = MAX_REBUILD_SECTORS/2;
|
||||
break;
|
||||
|
||||
case INITIALIZE:
|
||||
pCmd->uCmd.R1Control.Command = CTRL_CMD_REBUILD;
|
||||
pCmd->uCmd.R1Control.nSectors = MAX_REBUILD_SECTORS;
|
||||
break;
|
||||
}
|
||||
|
||||
pCmd->uCmd.R1Control.Lba = pArray->u.array.RebuildSectors;
|
||||
|
||||
if (capacity - pArray->u.array.RebuildSectors < pCmd->uCmd.R1Control.nSectors)
|
||||
pCmd->uCmd.R1Control.nSectors = capacity - pArray->u.array.RebuildSectors;
|
||||
|
||||
pCmd->uCmd.R1Control.Buffer = buffer;
|
||||
pCmd->pfnBuildSgl = R1ControlSgl;
|
||||
}
|
||||
else if (pArray->VDeviceType==VD_RAID_5)
|
||||
{
|
||||
switch(flags)
|
||||
{
|
||||
case DUPLICATE:
|
||||
case REBUILD_PARITY:
|
||||
pCmd->uCmd.R5Control.Command = CTRL_CMD_REBUILD; break;
|
||||
case VERIFY:
|
||||
pCmd->uCmd.R5Control.Command = CTRL_CMD_VERIFY; break;
|
||||
case INITIALIZE:
|
||||
pCmd->uCmd.R5Control.Command = CTRL_CMD_INIT; break;
|
||||
}
|
||||
pCmd->uCmd.R5Control.StripeLine=pArray->u.array.RebuildSectors>>pArray->u.array.bArBlockSizeShift;
|
||||
}
|
||||
else
|
||||
HPT_ASSERT(0);
|
||||
|
||||
pCmd->pVDevice = pArray;
|
||||
pCmd->pfnCompletion = thread_io_done;
|
||||
pArray->pfnSendCommand(_VBUS_P pCmd);
|
||||
CheckPendingCall(_VBUS_P0);
|
||||
|
||||
if (!End_Job) {
|
||||
unlock_driver(oldspl);
|
||||
while (!End_Job) {
|
||||
tsleep((caddr_t)pCmd, PPAUSE, "pause", hz);
|
||||
if (timeout++>60) break;
|
||||
}
|
||||
oldspl = lock_driver();
|
||||
if (!End_Job) {
|
||||
hpt_printk(("timeout, reset\n"));
|
||||
fResetVBus(_VBUS_P0);
|
||||
}
|
||||
}
|
||||
|
||||
result = pCmd->Result;
|
||||
FreeCommand(_VBUS_P pCmd);
|
||||
if (buffer) {
|
||||
free(buffer, M_DEVBUF);
|
||||
/* beware of goto retry_cmd below */
|
||||
buffer = NULL;
|
||||
}
|
||||
KdPrintI(("cmd finished %d", result));
|
||||
|
||||
switch(result)
|
||||
{
|
||||
case RETURN_SUCCESS:
|
||||
if (!pArray->u.array.rf_abort_rebuild)
|
||||
{
|
||||
if(pArray->u.array.RebuildSectors < capacity)
|
||||
{
|
||||
hpt_queue_dpc((HPT_DPC)hpt_rebuild_data_block, pAdapter, pArray, flags);
|
||||
}
|
||||
else
|
||||
{
|
||||
switch (flags)
|
||||
{
|
||||
case DUPLICATE:
|
||||
case REBUILD_PARITY:
|
||||
needsync = 1;
|
||||
pArray->u.array.rf_rebuilding = 0;
|
||||
pArray->u.array.rf_need_rebuild = 0;
|
||||
pArray->u.array.CriticalMembers = 0;
|
||||
pArray->u.array.RebuildSectors = MAX_LBA_T;
|
||||
pArray->u.array.rf_duplicate_and_create = 0;
|
||||
hpt_printk(("Rebuilding finished.\n"));
|
||||
ioctl_ReportEvent(ET_REBUILD_FINISHED, pArray);
|
||||
break;
|
||||
case INITIALIZE:
|
||||
needsync = 1;
|
||||
pArray->u.array.rf_initializing = 0;
|
||||
pArray->u.array.rf_need_rebuild = 0;
|
||||
pArray->u.array.RebuildSectors = MAX_LBA_T;
|
||||
hpt_printk(("Initializing finished.\n"));
|
||||
ioctl_ReportEvent(ET_INITIALIZE_FINISHED, pArray);
|
||||
break;
|
||||
case VERIFY:
|
||||
pArray->u.array.rf_verifying = 0;
|
||||
hpt_printk(("Verifying finished.\n"));
|
||||
ioctl_ReportEvent(ET_VERIFY_FINISHED, pArray);
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
pArray->u.array.rf_abort_rebuild = 0;
|
||||
if (pArray->u.array.rf_rebuilding)
|
||||
{
|
||||
hpt_printk(("Abort rebuilding.\n"));
|
||||
pArray->u.array.rf_rebuilding = 0;
|
||||
pArray->u.array.rf_duplicate_and_create = 0;
|
||||
ioctl_ReportEvent(ET_REBUILD_ABORTED, pArray);
|
||||
}
|
||||
else if (pArray->u.array.rf_verifying)
|
||||
{
|
||||
hpt_printk(("Abort verifying.\n"));
|
||||
pArray->u.array.rf_verifying = 0;
|
||||
ioctl_ReportEvent(ET_VERIFY_ABORTED, pArray);
|
||||
}
|
||||
else if (pArray->u.array.rf_initializing)
|
||||
{
|
||||
hpt_printk(("Abort initializing.\n"));
|
||||
pArray->u.array.rf_initializing = 0;
|
||||
ioctl_ReportEvent(ET_INITIALIZE_ABORTED, pArray);
|
||||
}
|
||||
needdelete=1;
|
||||
}
|
||||
break;
|
||||
|
||||
case RETURN_DATA_ERROR:
|
||||
if (flags==VERIFY)
|
||||
{
|
||||
needsync = 1;
|
||||
pArray->u.array.rf_verifying = 0;
|
||||
pArray->u.array.rf_need_rebuild = 1;
|
||||
hpt_printk(("Verifying failed: found inconsistency\n"));
|
||||
ioctl_ReportEvent(ET_VERIFY_DATA_ERROR, pArray);
|
||||
ioctl_ReportEvent(ET_VERIFY_FAILED, pArray);
|
||||
|
||||
if (!pArray->vf_online || pArray->u.array.rf_broken) break;
|
||||
|
||||
pArray->u.array.rf_auto_rebuild = 0;
|
||||
pArray->u.array.rf_abort_rebuild = 0;
|
||||
hpt_queue_dpc((HPT_DPC)hpt_rebuild_data_block, pAdapter, pArray,
|
||||
(pArray->VDeviceType == VD_RAID_1) ? DUPLICATE : REBUILD_PARITY);
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
hpt_printk(("command failed with error %d\n", result));
|
||||
if (++retry<3)
|
||||
{
|
||||
hpt_printk(("retry (%d)\n", retry));
|
||||
goto retry_cmd;
|
||||
}
|
||||
fail:
|
||||
pArray->u.array.rf_abort_rebuild = 0;
|
||||
switch (flags)
|
||||
{
|
||||
case DUPLICATE:
|
||||
case REBUILD_PARITY:
|
||||
needsync = 1;
|
||||
pArray->u.array.rf_rebuilding = 0;
|
||||
pArray->u.array.rf_duplicate_and_create = 0;
|
||||
hpt_printk(((flags==DUPLICATE)? "Duplicating failed.\n":"Rebuilding failed.\n"));
|
||||
ioctl_ReportEvent(ET_REBUILD_FAILED, pArray);
|
||||
break;
|
||||
|
||||
case INITIALIZE:
|
||||
needsync = 1;
|
||||
pArray->u.array.rf_initializing = 0;
|
||||
hpt_printk(("Initializing failed.\n"));
|
||||
ioctl_ReportEvent(ET_INITIALIZE_FAILED, pArray);
|
||||
break;
|
||||
|
||||
case VERIFY:
|
||||
needsync = 1;
|
||||
pArray->u.array.rf_verifying = 0;
|
||||
hpt_printk(("Verifying failed.\n"));
|
||||
ioctl_ReportEvent(ET_VERIFY_FAILED, pArray);
|
||||
break;
|
||||
}
|
||||
needdelete=1;
|
||||
}
|
||||
|
||||
while (pAdapter->outstandingCommands)
|
||||
{
|
||||
KdPrintI(("currcmds is %d, wait..\n", pAdapter->outstandingCommands));
|
||||
/* put this to have driver stop processing system commands quickly */
|
||||
if (!mWaitingForIdle(_VBUS_P0)) CallWhenIdle(_VBUS_P nothing, 0);
|
||||
unlock_driver(oldspl);
|
||||
oldspl = lock_driver();
|
||||
}
|
||||
|
||||
if (needsync) SyncArrayInfo(pArray);
|
||||
if(needdelete && (pArray->u.array.rf_duplicate_must_done || (flags == INITIALIZE)))
|
||||
fDeleteArray(_VBUS_P pArray, TRUE);
|
||||
|
||||
Check_Idle_Call(pAdapter);
|
||||
unlock_driver(oldspl);
|
||||
}
|
@ -1,429 +0,0 @@
|
||||
/*
|
||||
* Copyright (c) 2003-2004 MARVELL SEMICONDUCTOR ISRAEL, LTD.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
#ifndef __INCmvSatah
|
||||
#define __INCmvSatah
|
||||
|
||||
#ifndef SUPPORT_MV_SATA_GEN_1
|
||||
#define SUPPORT_MV_SATA_GEN_1 1
|
||||
#endif
|
||||
|
||||
#ifndef SUPPORT_MV_SATA_GEN_2
|
||||
#define SUPPORT_MV_SATA_GEN_2 0
|
||||
#endif
|
||||
|
||||
#if SUPPORT_MV_SATA_GEN_1==1 && SUPPORT_MV_SATA_GEN_2==1
|
||||
#define MV_SATA_GEN_1(x) ((x)->sataAdapterGeneration==1)
|
||||
#define MV_SATA_GEN_2(x) ((x)->sataAdapterGeneration==2)
|
||||
#elif SUPPORT_MV_SATA_GEN_1==1
|
||||
#define MV_SATA_GEN_1(x) 1
|
||||
#define MV_SATA_GEN_2(x) 0
|
||||
#elif SUPPORT_MV_SATA_GEN_2==1
|
||||
#define MV_SATA_GEN_1(x) 0
|
||||
#define MV_SATA_GEN_2(x) 1
|
||||
#else
|
||||
#error "Which IC do you support?"
|
||||
#endif
|
||||
|
||||
/* Definitions */
|
||||
/* MV88SX50XX specific defines */
|
||||
#define MV_SATA_VENDOR_ID 0x11AB
|
||||
#define MV_SATA_DEVICE_ID_5080 0x5080
|
||||
#define MV_SATA_DEVICE_ID_5081 0x5081
|
||||
#define MV_SATA_DEVICE_ID_6080 0x6080
|
||||
#define MV_SATA_DEVICE_ID_6081 0x6081
|
||||
#define MV_SATA_CHANNELS_NUM 8
|
||||
#define MV_SATA_UNITS_NUM 2
|
||||
#define MV_SATA_PCI_BAR0_SPACE_SIZE (1<<18) /* 256 Kb*/
|
||||
|
||||
#define CHANNEL_QUEUE_LENGTH 32
|
||||
#define CHANNEL_QUEUE_MASK 0x1F
|
||||
|
||||
#define MV_EDMA_QUEUE_LENGTH 32 /* Up to 32 outstanding */
|
||||
/* commands per SATA channel*/
|
||||
#define MV_EDMA_QUEUE_MASK 0x1F
|
||||
#define MV_EDMA_REQUEST_QUEUE_SIZE 1024 /* 32*32 = 1KBytes */
|
||||
#define MV_EDMA_RESPONSE_QUEUE_SIZE 256 /* 32*8 = 256 Bytes */
|
||||
|
||||
#define MV_EDMA_REQUEST_ENTRY_SIZE 32
|
||||
#define MV_EDMA_RESPONSE_ENTRY_SIZE 8
|
||||
|
||||
#define MV_EDMA_PRD_ENTRY_SIZE 16 /* 16Bytes*/
|
||||
#define MV_EDMA_PRD_NO_SNOOP_FLAG 0x00000001 /* MV_BIT0 */
|
||||
#define MV_EDMA_PRD_EOT_FLAG 0x00008000 /* MV_BIT15 */
|
||||
|
||||
#define MV_ATA_IDENTIFY_DEV_DATA_LENGTH 256 /* number of words(2 byte)*/
|
||||
#define MV_ATA_MODEL_NUMBER_LEN 40
|
||||
#define ATA_SECTOR_SIZE 512
|
||||
/* Log messages level defines */
|
||||
#define MV_DEBUG 0x1
|
||||
#define MV_DEBUG_INIT 0x2
|
||||
#define MV_DEBUG_INTERRUPTS 0x4
|
||||
#define MV_DEBUG_SATA_LINK 0x8
|
||||
#define MV_DEBUG_UDMA_COMMAND 0x10
|
||||
#define MV_DEBUG_NON_UDMA_COMMAND 0x20
|
||||
#define MV_DEBUG_ERROR 0x40
|
||||
|
||||
|
||||
/* Typedefs */
|
||||
typedef enum mvUdmaType
|
||||
{
|
||||
MV_UDMA_TYPE_READ, MV_UDMA_TYPE_WRITE
|
||||
} MV_UDMA_TYPE;
|
||||
|
||||
typedef enum mvFlushType
|
||||
{
|
||||
MV_FLUSH_TYPE_CALLBACK, MV_FLUSH_TYPE_NONE
|
||||
} MV_FLUSH_TYPE;
|
||||
|
||||
typedef enum mvCompletionType
|
||||
{
|
||||
MV_COMPLETION_TYPE_NORMAL, MV_COMPLETION_TYPE_ERROR,
|
||||
MV_COMPLETION_TYPE_ABORT
|
||||
} MV_COMPLETION_TYPE;
|
||||
|
||||
typedef enum mvEventType
|
||||
{
|
||||
MV_EVENT_TYPE_ADAPTER_ERROR, MV_EVENT_TYPE_SATA_CABLE
|
||||
} MV_EVENT_TYPE;
|
||||
|
||||
typedef enum mvEdmaMode
|
||||
{
|
||||
MV_EDMA_MODE_QUEUED,
|
||||
MV_EDMA_MODE_NOT_QUEUED,
|
||||
MV_EDMA_MODE_NATIVE_QUEUING
|
||||
} MV_EDMA_MODE;
|
||||
|
||||
typedef enum mvEdmaQueueResult
|
||||
{
|
||||
MV_EDMA_QUEUE_RESULT_OK = 0,
|
||||
MV_EDMA_QUEUE_RESULT_EDMA_DISABLED,
|
||||
MV_EDMA_QUEUE_RESULT_FULL,
|
||||
MV_EDMA_QUEUE_RESULT_BAD_LBA_ADDRESS,
|
||||
MV_EDMA_QUEUE_RESULT_BAD_PARAMS
|
||||
} MV_EDMA_QUEUE_RESULT;
|
||||
|
||||
typedef enum mvQueueCommandResult
|
||||
{
|
||||
MV_QUEUE_COMMAND_RESULT_OK = 0,
|
||||
MV_QUEUE_COMMAND_RESULT_QUEUED_MODE_DISABLED,
|
||||
MV_QUEUE_COMMAND_RESULT_FULL,
|
||||
MV_QUEUE_COMMAND_RESULT_BAD_LBA_ADDRESS,
|
||||
MV_QUEUE_COMMAND_RESULT_BAD_PARAMS
|
||||
} MV_QUEUE_COMMAND_RESULT;
|
||||
|
||||
typedef enum mvNonUdmaProtocol
|
||||
{
|
||||
MV_NON_UDMA_PROTOCOL_NON_DATA,
|
||||
MV_NON_UDMA_PROTOCOL_PIO_DATA_IN,
|
||||
MV_NON_UDMA_PROTOCOL_PIO_DATA_OUT
|
||||
} MV_NON_UDMA_PROTOCOL;
|
||||
|
||||
|
||||
struct mvDmaRequestQueueEntry;
|
||||
struct mvDmaResponseQueueEntry;
|
||||
struct mvDmaCommandEntry;
|
||||
|
||||
struct mvSataAdapter;
|
||||
struct mvStorageDevRegisters;
|
||||
|
||||
typedef MV_BOOLEAN (* HPTLIBAPI mvSataCommandCompletionCallBack_t)(struct mvSataAdapter *,
|
||||
MV_U8,
|
||||
MV_COMPLETION_TYPE,
|
||||
MV_VOID_PTR, MV_U16,
|
||||
MV_U32,
|
||||
struct mvStorageDevRegisters FAR*);
|
||||
|
||||
typedef enum mvQueuedCommandType
|
||||
{
|
||||
MV_QUEUED_COMMAND_TYPE_UDMA,
|
||||
MV_QUEUED_COMMAND_TYPE_NONE_UDMA
|
||||
} MV_QUEUED_COMMAND_TYPE;
|
||||
|
||||
typedef struct mvUdmaCommandParams
|
||||
{
|
||||
MV_UDMA_TYPE readWrite;
|
||||
MV_BOOLEAN isEXT;
|
||||
MV_U32 lowLBAAddress;
|
||||
MV_U16 highLBAAddress;
|
||||
MV_U16 numOfSectors;
|
||||
MV_U32 prdLowAddr;
|
||||
MV_U32 prdHighAddr;
|
||||
mvSataCommandCompletionCallBack_t callBack;
|
||||
MV_VOID_PTR commandId;
|
||||
} MV_UDMA_COMMAND_PARAMS;
|
||||
|
||||
typedef struct mvNoneUdmaCommandParams
|
||||
{
|
||||
MV_NON_UDMA_PROTOCOL protocolType;
|
||||
MV_BOOLEAN isEXT;
|
||||
MV_U16_PTR bufPtr;
|
||||
MV_U32 count;
|
||||
MV_U16 features;
|
||||
MV_U16 sectorCount;
|
||||
MV_U16 lbaLow;
|
||||
MV_U16 lbaMid;
|
||||
MV_U16 lbaHigh;
|
||||
MV_U8 device;
|
||||
MV_U8 command;
|
||||
mvSataCommandCompletionCallBack_t callBack;
|
||||
MV_VOID_PTR commandId;
|
||||
} MV_NONE_UDMA_COMMAND_PARAMS;
|
||||
|
||||
typedef struct mvQueueCommandInfo
|
||||
{
|
||||
MV_QUEUED_COMMAND_TYPE type;
|
||||
union
|
||||
{
|
||||
MV_UDMA_COMMAND_PARAMS udmaCommand;
|
||||
MV_NONE_UDMA_COMMAND_PARAMS NoneUdmaCommand;
|
||||
} commandParams;
|
||||
} MV_QUEUE_COMMAND_INFO;
|
||||
|
||||
/* The following structure is for the Core Driver internal usage */
|
||||
typedef struct mvQueuedCommandEntry
|
||||
{
|
||||
MV_BOOLEAN isFreeEntry;
|
||||
MV_U8 commandTag;
|
||||
struct mvQueuedCommandEntry *next;
|
||||
struct mvQueuedCommandEntry *prev;
|
||||
MV_QUEUE_COMMAND_INFO commandInfo;
|
||||
} MV_QUEUED_COMMAND_ENTRY;
|
||||
|
||||
/* The following structures are part of the Core Driver API */
|
||||
typedef struct mvSataChannel
|
||||
{
|
||||
/* Fields set by Intermediate Application Layer */
|
||||
MV_U8 channelNumber;
|
||||
MV_BOOLEAN waitingForInterrupt;
|
||||
MV_BOOLEAN lba48Address;
|
||||
MV_BOOLEAN maxReadTransfer;
|
||||
struct mvDmaRequestQueueEntry FAR *requestQueue;
|
||||
struct mvDmaResponseQueueEntry FAR *responseQueue;
|
||||
MV_U32 requestQueuePciHiAddress;
|
||||
MV_U32 requestQueuePciLowAddress;
|
||||
MV_U32 responseQueuePciHiAddress;
|
||||
MV_U32 responseQueuePciLowAddress;
|
||||
/* Fields set by CORE driver */
|
||||
struct mvSataAdapter *mvSataAdapter;
|
||||
MV_OS_SEMAPHORE semaphore;
|
||||
MV_U32 eDmaRegsOffset;
|
||||
MV_U16 identifyDevice[MV_ATA_IDENTIFY_DEV_DATA_LENGTH];
|
||||
MV_BOOLEAN EdmaActive;
|
||||
MV_EDMA_MODE queuedDMA;
|
||||
MV_U8 outstandingCommands;
|
||||
MV_BOOLEAN workAroundDone;
|
||||
struct mvQueuedCommandEntry commandsQueue[CHANNEL_QUEUE_LENGTH];
|
||||
struct mvQueuedCommandEntry *commandsQueueHead;
|
||||
struct mvQueuedCommandEntry *commandsQueueTail;
|
||||
MV_BOOLEAN queueCommandsEnabled;
|
||||
MV_U8 noneUdmaOutstandingCommands;
|
||||
MV_U8 EdmaQueuedCommands;
|
||||
MV_U32 freeIDsStack[MV_EDMA_QUEUE_LENGTH];
|
||||
MV_U32 freeIDsNum;
|
||||
MV_U32 reqInPtr;
|
||||
MV_U32 rspOutPtr;
|
||||
} MV_SATA_CHANNEL;
|
||||
|
||||
typedef struct mvSataAdapter
|
||||
{
|
||||
/* Fields set by Intermediate Application Layer */
|
||||
MV_U32 adapterId;
|
||||
MV_U8 pcbVersion;
|
||||
MV_U8 pciConfigRevisionId;
|
||||
MV_U16 pciConfigDeviceId;
|
||||
MV_VOID_PTR IALData;
|
||||
MV_BUS_ADDR_T adapterIoBaseAddress;
|
||||
MV_U32 intCoalThre[MV_SATA_UNITS_NUM];
|
||||
MV_U32 intTimeThre[MV_SATA_UNITS_NUM];
|
||||
MV_BOOLEAN (* HPTLIBAPI mvSataEventNotify)(struct mvSataAdapter *,
|
||||
MV_EVENT_TYPE,
|
||||
MV_U32, MV_U32);
|
||||
MV_SATA_CHANNEL *sataChannel[MV_SATA_CHANNELS_NUM];
|
||||
MV_U32 pciCommand;
|
||||
MV_U32 pciSerrMask;
|
||||
MV_U32 pciInterruptMask;
|
||||
|
||||
/* Fields set by CORE driver */
|
||||
MV_OS_SEMAPHORE semaphore;
|
||||
MV_U32 mainMask;
|
||||
MV_OS_SEMAPHORE interruptsMaskSem;
|
||||
MV_BOOLEAN implementA0Workarounds;
|
||||
MV_BOOLEAN implement50XXB0Workarounds;
|
||||
MV_BOOLEAN implement50XXB1Workarounds;
|
||||
MV_BOOLEAN implement50XXB2Workarounds;
|
||||
MV_BOOLEAN implement60X1A0Workarounds;
|
||||
MV_BOOLEAN implement60X1A1Workarounds;
|
||||
MV_BOOLEAN implement60X1B0Workarounds;
|
||||
MV_U8 sataAdapterGeneration;
|
||||
MV_U8 failLEDMask;
|
||||
MV_U8 signalAmps[MV_SATA_CHANNELS_NUM];
|
||||
MV_U8 pre[MV_SATA_CHANNELS_NUM];
|
||||
MV_BOOLEAN staggaredSpinup[MV_SATA_CHANNELS_NUM]; /* For 60x1 only */
|
||||
} MV_SATA_ADAPTER;
|
||||
|
||||
typedef struct mvSataAdapterStatus
|
||||
{
|
||||
/* Fields set by CORE driver */
|
||||
MV_BOOLEAN channelConnected[MV_SATA_CHANNELS_NUM];
|
||||
MV_U32 pciDLLStatusAndControlRegister;
|
||||
MV_U32 pciCommandRegister;
|
||||
MV_U32 pciModeRegister;
|
||||
MV_U32 pciSERRMaskRegister;
|
||||
MV_U32 intCoalThre[MV_SATA_UNITS_NUM];
|
||||
MV_U32 intTimeThre[MV_SATA_UNITS_NUM];
|
||||
MV_U32 R00StatusBridgePortRegister[MV_SATA_CHANNELS_NUM];
|
||||
}MV_SATA_ADAPTER_STATUS;
|
||||
|
||||
|
||||
typedef struct mvSataChannelStatus
|
||||
{
|
||||
/* Fields set by CORE driver */
|
||||
MV_BOOLEAN isConnected;
|
||||
MV_U8 modelNumber[MV_ATA_MODEL_NUMBER_LEN];
|
||||
MV_BOOLEAN DMAEnabled;
|
||||
MV_EDMA_MODE queuedDMA;
|
||||
MV_U8 outstandingCommands;
|
||||
MV_U32 EdmaConfigurationRegister;
|
||||
MV_U32 EdmaRequestQueueBaseAddressHighRegister;
|
||||
MV_U32 EdmaRequestQueueInPointerRegister;
|
||||
MV_U32 EdmaRequestQueueOutPointerRegister;
|
||||
MV_U32 EdmaResponseQueueBaseAddressHighRegister;
|
||||
MV_U32 EdmaResponseQueueInPointerRegister;
|
||||
MV_U32 EdmaResponseQueueOutPointerRegister;
|
||||
MV_U32 EdmaCommandRegister;
|
||||
MV_U32 PHYModeRegister;
|
||||
}MV_SATA_CHANNEL_STATUS;
|
||||
|
||||
/* this structure used by the IAL defines the PRD entries used by the EDMA HW */
|
||||
typedef struct mvSataEdmaPRDEntry
|
||||
{
|
||||
volatile MV_U32 lowBaseAddr;
|
||||
volatile MV_U16 byteCount;
|
||||
volatile MV_U16 flags;
|
||||
volatile MV_U32 highBaseAddr;
|
||||
volatile MV_U32 reserved;
|
||||
}MV_SATA_EDMA_PRD_ENTRY;
|
||||
|
||||
/* API Functions */
|
||||
|
||||
/* CORE driver Adapter Management */
|
||||
MV_BOOLEAN HPTLIBAPI mvSataInitAdapter(MV_SATA_ADAPTER *pAdapter);
|
||||
|
||||
MV_BOOLEAN HPTLIBAPI mvSataShutdownAdapter(MV_SATA_ADAPTER *pAdapter);
|
||||
|
||||
MV_BOOLEAN HPTLIBAPI mvSataGetAdapterStatus(MV_SATA_ADAPTER *pAdapter,
|
||||
MV_SATA_ADAPTER_STATUS *pAdapterStatus);
|
||||
|
||||
MV_U32 HPTLIBAPI mvSataReadReg(MV_SATA_ADAPTER *pAdapter, MV_U32 regOffset);
|
||||
|
||||
MV_VOID HPTLIBAPI mvSataWriteReg(MV_SATA_ADAPTER *pAdapter, MV_U32 regOffset,
|
||||
MV_U32 regValue);
|
||||
|
||||
MV_VOID HPTLIBAPI mvEnableAutoFlush(MV_VOID);
|
||||
MV_VOID HPTLIBAPI mvDisableAutoFlush(MV_VOID);
|
||||
|
||||
|
||||
/* CORE driver SATA Channel Management */
|
||||
MV_BOOLEAN HPTLIBAPI mvSataConfigureChannel(MV_SATA_ADAPTER *pAdapter,
|
||||
MV_U8 channelIndex);
|
||||
|
||||
MV_BOOLEAN HPTLIBAPI mvSataRemoveChannel(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex);
|
||||
|
||||
MV_BOOLEAN HPTLIBAPI mvSataIsStorageDeviceConnected(MV_SATA_ADAPTER *pAdapter,
|
||||
MV_U8 channelIndex);
|
||||
|
||||
MV_BOOLEAN HPTLIBAPI mvSataChannelHardReset(MV_SATA_ADAPTER *pAdapter,
|
||||
MV_U8 channelIndex);
|
||||
|
||||
MV_BOOLEAN HPTLIBAPI mvSataConfigEdmaMode(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex,
|
||||
MV_EDMA_MODE eDmaMode, MV_U8 maxQueueDepth);
|
||||
|
||||
MV_BOOLEAN HPTLIBAPI mvSataEnableChannelDma(MV_SATA_ADAPTER *pAdapter,
|
||||
MV_U8 channelIndex);
|
||||
|
||||
MV_BOOLEAN HPTLIBAPI mvSataDisableChannelDma(MV_SATA_ADAPTER *pAdapter,
|
||||
MV_U8 channelIndex);
|
||||
|
||||
MV_BOOLEAN HPTLIBAPI mvSataFlushDmaQueue(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex,
|
||||
MV_FLUSH_TYPE flushType);
|
||||
|
||||
MV_U8 HPTLIBAPI mvSataNumOfDmaCommands(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex);
|
||||
|
||||
MV_BOOLEAN HPTLIBAPI mvSataSetIntCoalParams (MV_SATA_ADAPTER *pAdapter, MV_U8 sataUnit,
|
||||
MV_U32 intCoalThre, MV_U32 intTimeThre);
|
||||
|
||||
MV_BOOLEAN HPTLIBAPI mvSataSetChannelPhyParams(MV_SATA_ADAPTER *pAdapter,
|
||||
MV_U8 channelIndex,
|
||||
MV_U8 signalAmps, MV_U8 pre);
|
||||
|
||||
MV_BOOLEAN HPTLIBAPI mvSataChannelPhyShutdown(MV_SATA_ADAPTER *pAdapter,
|
||||
MV_U8 channelIndex);
|
||||
|
||||
MV_BOOLEAN HPTLIBAPI mvSataChannelPhyPowerOn(MV_SATA_ADAPTER *pAdapter,
|
||||
MV_U8 channelIndex);
|
||||
|
||||
MV_BOOLEAN HPTLIBAPI mvSataChannelSetEdmaLoopBackMode(MV_SATA_ADAPTER *pAdapter,
|
||||
MV_U8 channelIndex,
|
||||
MV_BOOLEAN loopBackOn);
|
||||
|
||||
MV_BOOLEAN HPTLIBAPI mvSataGetChannelStatus(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex,
|
||||
MV_SATA_CHANNEL_STATUS *pChannelStatus);
|
||||
|
||||
/* Execute UDMA ATA commands */
|
||||
MV_EDMA_QUEUE_RESULT HPTLIBAPI mvSataQueueUDmaCommand(MV_SATA_ADAPTER *pAdapter,
|
||||
MV_U8 channelIndex,
|
||||
MV_UDMA_TYPE readWrite,
|
||||
MV_U32 lowLBAAddr,
|
||||
MV_U16 highLBAAddr,
|
||||
MV_U16 sectorCount,
|
||||
MV_U32 prdLowAddr,
|
||||
MV_U32 prdHighAddr,
|
||||
mvSataCommandCompletionCallBack_t callBack,
|
||||
MV_VOID_PTR commandId);
|
||||
|
||||
MV_QUEUE_COMMAND_RESULT HPTLIBAPI mvSataQueueCommand(MV_SATA_ADAPTER *pAdapter,
|
||||
MV_U8 channelIndex,
|
||||
MV_QUEUE_COMMAND_INFO FAR *pCommandParams);
|
||||
|
||||
/* Interrupt Service Routine */
|
||||
MV_BOOLEAN HPTLIBAPI mvSataInterruptServiceRoutine(MV_SATA_ADAPTER *pAdapter);
|
||||
|
||||
MV_BOOLEAN HPTLIBAPI mvSataMaskAdapterInterrupt(MV_SATA_ADAPTER *pAdapter);
|
||||
|
||||
MV_BOOLEAN HPTLIBAPI mvSataUnmaskAdapterInterrupt(MV_SATA_ADAPTER *pAdapter);
|
||||
|
||||
/* Command Completion and Event Notification (user implemented) */
|
||||
MV_BOOLEAN HPTLIBAPI mvSataEventNotify(MV_SATA_ADAPTER *, MV_EVENT_TYPE ,
|
||||
MV_U32, MV_U32);
|
||||
|
||||
/*
|
||||
* Staggered spin-ip support and SATA interface speed control
|
||||
* (relevant for 60x1 adapters)
|
||||
*/
|
||||
MV_BOOLEAN HPTLIBAPI mvSataEnableStaggeredSpinUpAll (MV_SATA_ADAPTER *pAdapter);
|
||||
MV_BOOLEAN HPTLIBAPI mvSataDisableStaggeredSpinUpAll (MV_SATA_ADAPTER *pAdapter);
|
||||
|
||||
#endif
|
@ -1,210 +0,0 @@
|
||||
/*
|
||||
* Copyright (c) 2003-2004 MARVELL SEMICONDUCTOR ISRAEL, LTD.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
#ifndef __INCmvStorageDevh
|
||||
#define __INCmvStorageDevh
|
||||
|
||||
/* Definitions */
|
||||
|
||||
/* ATA register on the ATA drive*/
|
||||
|
||||
#define MV_EDMA_ATA_FEATURES_ADDR 0x11
|
||||
#define MV_EDMA_ATA_SECTOR_COUNT_ADDR 0x12
|
||||
#define MV_EDMA_ATA_LBA_LOW_ADDR 0x13
|
||||
#define MV_EDMA_ATA_LBA_MID_ADDR 0x14
|
||||
#define MV_EDMA_ATA_LBA_HIGH_ADDR 0x15
|
||||
#define MV_EDMA_ATA_DEVICE_ADDR 0x16
|
||||
#define MV_EDMA_ATA_COMMAND_ADDR 0x17
|
||||
|
||||
#define MV_ATA_ERROR_STATUS 0x00000001 /* MV_BIT0 */
|
||||
#define MV_ATA_DATA_REQUEST_STATUS 0x00000008 /* MV_BIT3 */
|
||||
#define MV_ATA_SERVICE_STATUS 0x00000010 /* MV_BIT4 */
|
||||
#define MV_ATA_DEVICE_FAULT_STATUS 0x00000020 /* MV_BIT5 */
|
||||
#define MV_ATA_READY_STATUS 0x00000040 /* MV_BIT6 */
|
||||
#define MV_ATA_BUSY_STATUS 0x00000080 /* MV_BIT7 */
|
||||
|
||||
|
||||
#define MV_ATA_COMMAND_READ_SECTORS 0x20
|
||||
#define MV_ATA_COMMAND_READ_SECTORS_EXT 0x24
|
||||
#define MV_ATA_COMMAND_READ_VERIFY_SECTORS 0x40
|
||||
#define MV_ATA_COMMAND_READ_VERIFY_SECTORS_EXT 0x42
|
||||
#define MV_ATA_COMMAND_READ_BUFFER 0xE4
|
||||
#define MV_ATA_COMMAND_WRITE_BUFFER 0xE8
|
||||
#define MV_ATA_COMMAND_WRITE_SECTORS 0x30
|
||||
#define MV_ATA_COMMAND_WRITE_SECTORS_EXT 0x34
|
||||
#define MV_ATA_COMMAND_DIAGNOSTIC 0x90
|
||||
#define MV_ATA_COMMAND_SMART 0xb0
|
||||
#define MV_ATA_COMMAND_READ_MULTIPLE 0xc4
|
||||
#define MV_ATA_COMMAND_WRITE_MULTIPLE 0xc5
|
||||
#define MV_ATA_COMMAND_STANDBY_IMMEDIATE 0xe0
|
||||
#define MV_ATA_COMMAND_IDLE_IMMEDIATE 0xe1
|
||||
#define MV_ATA_COMMAND_STANDBY 0xe2
|
||||
#define MV_ATA_COMMAND_IDLE 0xe3
|
||||
#define MV_ATA_COMMAND_SLEEP 0xe6
|
||||
#define MV_ATA_COMMAND_IDENTIFY 0xec
|
||||
#define MV_ATA_COMMAND_DEVICE_CONFIG 0xb1
|
||||
#define MV_ATA_COMMAND_SET_FEATURES 0xef
|
||||
#define MV_ATA_COMMAND_WRITE_DMA 0xca
|
||||
#define MV_ATA_COMMAND_WRITE_DMA_EXT 0x35
|
||||
#define MV_ATA_COMMAND_WRITE_DMA_QUEUED 0xcc
|
||||
#define MV_ATA_COMMAND_WRITE_DMA_QUEUED_EXT 0x36
|
||||
#define MV_ATA_COMMAND_WRITE_FPDMA_QUEUED_EXT 0x61
|
||||
#define MV_ATA_COMMAND_READ_DMA 0xc8
|
||||
#define MV_ATA_COMMAND_READ_DMA_EXT 0x25
|
||||
#define MV_ATA_COMMAND_READ_DMA_QUEUED 0xc7
|
||||
#define MV_ATA_COMMAND_READ_DMA_QUEUED_EXT 0x26
|
||||
#define MV_ATA_COMMAND_READ_FPDMA_QUEUED_EXT 0x60
|
||||
#define MV_ATA_COMMAND_FLUSH_CACHE 0xe7
|
||||
#define MV_ATA_COMMAND_FLUSH_CACHE_EXT 0xea
|
||||
|
||||
|
||||
#define MV_ATA_SET_FEATURES_DISABLE_8_BIT_PIO 0x01
|
||||
#define MV_ATA_SET_FEATURES_ENABLE_WCACHE 0x02 /* Enable write cache */
|
||||
#define MV_ATA_SET_FEATURES_TRANSFER 0x03 /* Set transfer mode */
|
||||
#define MV_ATA_TRANSFER_UDMA_0 0x40
|
||||
#define MV_ATA_TRANSFER_UDMA_1 0x41
|
||||
#define MV_ATA_TRANSFER_UDMA_2 0x42
|
||||
#define MV_ATA_TRANSFER_UDMA_3 0x43
|
||||
#define MV_ATA_TRANSFER_UDMA_4 0x44
|
||||
#define MV_ATA_TRANSFER_UDMA_5 0x45
|
||||
#define MV_ATA_TRANSFER_UDMA_6 0x46
|
||||
#define MV_ATA_TRANSFER_UDMA_7 0x47
|
||||
#define MV_ATA_TRANSFER_PIO_SLOW 0x00
|
||||
#define MV_ATA_TRANSFER_PIO_0 0x08
|
||||
#define MV_ATA_TRANSFER_PIO_1 0x09
|
||||
#define MV_ATA_TRANSFER_PIO_2 0x0A
|
||||
#define MV_ATA_TRANSFER_PIO_3 0x0B
|
||||
#define MV_ATA_TRANSFER_PIO_4 0x0C
|
||||
/* Enable advanced power management */
|
||||
#define MV_ATA_SET_FEATURES_ENABLE_APM 0x05
|
||||
/* Disable media status notification*/
|
||||
#define MV_ATA_SET_FEATURES_DISABLE_MSN 0x31
|
||||
/* Disable read look-ahead */
|
||||
#define MV_ATA_SET_FEATURES_DISABLE_RLA 0x55
|
||||
/* Enable release interrupt */
|
||||
#define MV_ATA_SET_FEATURES_ENABLE_RI 0x5D
|
||||
/* Enable SERVICE interrupt */
|
||||
#define MV_ATA_SET_FEATURES_ENABLE_SI 0x5E
|
||||
/* Disable revert power-on defaults */
|
||||
#define MV_ATA_SET_FEATURES_DISABLE_RPOD 0x66
|
||||
/* Disable write cache */
|
||||
#define MV_ATA_SET_FEATURES_DISABLE_WCACHE 0x82
|
||||
/* Disable advanced power management*/
|
||||
#define MV_ATA_SET_FEATURES_DISABLE_APM 0x85
|
||||
/* Enable media status notification */
|
||||
#define MV_ATA_SET_FEATURES_ENABLE_MSN 0x95
|
||||
/* Enable read look-ahead */
|
||||
#define MV_ATA_SET_FEATURES_ENABLE_RLA 0xAA
|
||||
/* Enable revert power-on defaults */
|
||||
#define MV_ATA_SET_FEATURES_ENABLE_RPOD 0xCC
|
||||
/* Disable release interrupt */
|
||||
#define MV_ATA_SET_FEATURES_DISABLE_RI 0xDD
|
||||
/* Disable SERVICE interrupt */
|
||||
#define MV_ATA_SET_FEATURES_DISABLE_SI 0xDE
|
||||
|
||||
/* Defines for parsing the IDENTIFY command results*/
|
||||
#define IDEN_SERIAL_NUM_OFFSET 10
|
||||
#define IDEN_SERIAL_NUM_SIZE 19-10
|
||||
#define IDEN_FIRMWARE_OFFSET 23
|
||||
#define IDEN_FIRMWARE_SIZE 26-23
|
||||
#define IDEN_MODEL_OFFSET 27
|
||||
#define IDEN_MODEL_SIZE 46-27
|
||||
#define IDEN_CAPACITY_1_OFFSET 49
|
||||
#define IDEN_VALID 53
|
||||
#define IDEN_NUM_OF_ADDRESSABLE_SECTORS 60
|
||||
#define IDEN_PIO_MODE_SPPORTED 64
|
||||
#define IDEN_QUEUE_DEPTH 75
|
||||
#define IDEN_SATA_CAPABILITIES 76
|
||||
#define IDEN_SATA_FEATURES_SUPPORTED 78
|
||||
#define IDEN_SATA_FEATURES_ENABLED 79
|
||||
#define IDEN_ATA_VERSION 80
|
||||
#define IDEN_SUPPORTED_COMMANDS1 82
|
||||
#define IDEN_SUPPORTED_COMMANDS2 83
|
||||
#define IDEN_ENABLED_COMMANDS1 85
|
||||
#define IDEN_ENABLED_COMMANDS2 86
|
||||
#define IDEN_UDMA_MODE 88
|
||||
#define IDEN_SATA_CAPABILITY 76
|
||||
|
||||
|
||||
/* Typedefs */
|
||||
|
||||
/* Structures */
|
||||
typedef struct mvStorageDevRegisters
|
||||
{
|
||||
/* Fields set by CORE driver */
|
||||
MV_U8 errorRegister;
|
||||
MV_U16 sectorCountRegister;
|
||||
MV_U16 lbaLowRegister;
|
||||
MV_U16 lbaMidRegister;
|
||||
MV_U16 lbaHighRegister;
|
||||
MV_U8 deviceRegister;
|
||||
MV_U8 statusRegister;
|
||||
} MV_STORAGE_DEVICE_REGISTERS;
|
||||
|
||||
/* Bits for HD_ERROR */
|
||||
#define NM_ERR 0x02 /* media present */
|
||||
#define ABRT_ERR 0x04 /* Command aborted */
|
||||
#define MCR_ERR 0x08 /* media change request */
|
||||
#define IDNF_ERR 0x10 /* ID field not found */
|
||||
#define MC_ERR 0x20 /* media changed */
|
||||
#define UNC_ERR 0x40 /* Uncorrect data */
|
||||
#define WP_ERR 0x40 /* write protect */
|
||||
#define ICRC_ERR 0x80 /* new meaning: CRC error during transfer */
|
||||
|
||||
/* Function */
|
||||
|
||||
MV_BOOLEAN HPTLIBAPI mvStorageDevATAExecuteNonUDMACommand(MV_SATA_ADAPTER *pAdapter,
|
||||
MV_U8 channelIndex,
|
||||
MV_NON_UDMA_PROTOCOL protocolType,
|
||||
MV_BOOLEAN isEXT,
|
||||
MV_U16 FAR *bufPtr, MV_U32 count,
|
||||
MV_U16 features,
|
||||
MV_U16 sectorCount,
|
||||
MV_U16 lbaLow, MV_U16 lbaMid,
|
||||
MV_U16 lbaHigh, MV_U8 device,
|
||||
MV_U8 command);
|
||||
|
||||
MV_BOOLEAN HPTLIBAPI mvStorageDevATAIdentifyDevice(MV_SATA_ADAPTER *pAdapter,
|
||||
MV_U8 channelIndex);
|
||||
|
||||
MV_BOOLEAN HPTLIBAPI mvStorageDevATASetFeatures(MV_SATA_ADAPTER *pAdapter,
|
||||
MV_U8 channelIndex, MV_U8 subCommand,
|
||||
MV_U8 subCommandSpecific1,
|
||||
MV_U8 subCommandSpecific2,
|
||||
MV_U8 subCommandSpecific3,
|
||||
MV_U8 subCommandSpecific4);
|
||||
|
||||
MV_BOOLEAN HPTLIBAPI mvStorageDevATAIdleImmediate(MV_SATA_ADAPTER *pAdapter,
|
||||
MV_U8 channelIndex);
|
||||
|
||||
MV_BOOLEAN HPTLIBAPI mvStorageDevATAFlushWriteCache(MV_SATA_ADAPTER *pAdapter,
|
||||
MV_U8 channelIndex);
|
||||
|
||||
MV_BOOLEAN HPTLIBAPI mvStorageDevATASoftResetDevice(MV_SATA_ADAPTER *pAdapter,
|
||||
MV_U8 channelIndex);
|
||||
|
||||
MV_BOOLEAN HPTLIBAPI mvReadWrite(MV_SATA_CHANNEL *pSataChannel, LBA_T Lba, UCHAR Cmd, void *tmpBuffer);
|
||||
|
||||
#endif
|
@ -1,120 +0,0 @@
|
||||
/*
|
||||
* Copyright (c) 2003-2004 HighPoint Technologies, Inc.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
#ifdef _RAID5N_
|
||||
|
||||
/* OS provided function, call only at initialization time */
|
||||
extern void * HPTLIBAPI os_alloc_page(_VBUS_ARG0); /* may be cached memory */
|
||||
extern void * HPTLIBAPI os_alloc_dma_page(_VBUS_ARG0); /* must be non-cached memory */
|
||||
/* implement if the driver can be unloaded */
|
||||
void HPTLIBAPI os_free_page(_VBUS_ARG void *p);
|
||||
void HPTLIBAPI os_free_dma_page(_VBUS_ARG void *p);
|
||||
|
||||
typedef void (* HPTLIBAPI xfer_done_fn)(_VBUS_ARG void *tag, int result);
|
||||
|
||||
|
||||
#define DATAXFER_STACK_VAR
|
||||
#define DATAXFER_INIT_ARG 0
|
||||
|
||||
#define dataxfer_init(arg) 0
|
||||
#define dataxfer_add_item(handle, host, cache, bytes, tocache) \
|
||||
if (tocache) memcpy((PUCHAR)(cache), (PUCHAR)(host), bytes); \
|
||||
else memcpy((PUCHAR)(host), (PUCHAR)(cache), bytes)
|
||||
#define dataxfer_exec(handle, done, tag) done(_VBUS_P tag, 0)
|
||||
#define dataxfer_poll()
|
||||
|
||||
|
||||
typedef void (* HPTLIBAPI xor_done_fn)(_VBUS_ARG void *tag, int result);
|
||||
|
||||
|
||||
#define XOR_STACK_VAR
|
||||
#define XOR_INIT_ARG 0
|
||||
|
||||
/* DoXor1, DoXor2 provided by platform dependent code */
|
||||
void HPTLIBAPI DoXor1(ULONG *p0, ULONG *p1, ULONG *p2, UINT nBytes);
|
||||
void HPTLIBAPI DoXor2(ULONG *p0, ULONG *p2, UINT nBytes);
|
||||
#define max_xor_way 2
|
||||
#define xor_init(arg) 0
|
||||
#define xor_add_item(handle, dest, src, nsrc, bytes) \
|
||||
do {\
|
||||
if (((void**)src)[0]==dest)\
|
||||
DoXor2((PULONG)(dest), ((PULONG *)src)[1], bytes);\
|
||||
else\
|
||||
DoXor1((PULONG)(dest), ((PULONG *)src)[0], ((PULONG *)src)[1], bytes);\
|
||||
} while(0)
|
||||
#define xor_exec(handle, done, tag) done(_VBUS_P tag, 0)
|
||||
#define xor_poll()
|
||||
|
||||
|
||||
/* set before calling init_raid5_memory */
|
||||
extern UINT num_raid5_pages;
|
||||
|
||||
/* called by init.c */
|
||||
extern void HPTLIBAPI init_raid5_memory(_VBUS_ARG0);
|
||||
extern void HPTLIBAPI free_raid5_memory(_VBUS_ARG0);
|
||||
|
||||
/* asynchronous flush, may be called periodly */
|
||||
extern void HPTLIBAPI flush_stripe_cache(_VBUS_ARG0);
|
||||
extern void HPTLIBAPI flush_raid5_async(PVDevice pArray, DPC_PROC done, void *arg);
|
||||
|
||||
/* synchronous function called at shutdown */
|
||||
extern int HPTLIBAPI flush_raid5(PVDevice pArray);
|
||||
|
||||
extern void HPTLIBAPI raid5_free(_VBUS_ARG PVDevice pArray);
|
||||
|
||||
struct free_heap_block {
|
||||
struct free_heap_block *next;
|
||||
};
|
||||
|
||||
#ifndef LIST_H_INCLUDED
|
||||
struct list_head {
|
||||
struct list_head *next, *prev;
|
||||
};
|
||||
#endif
|
||||
|
||||
struct free_page {
|
||||
struct free_page *link;
|
||||
};
|
||||
|
||||
struct r5_global_data {
|
||||
int enable_write_back;
|
||||
struct list_head inactive_list;
|
||||
struct list_head dirty_list;
|
||||
struct list_head active_list;
|
||||
#ifdef R5_CONTIG_CACHE
|
||||
BUS_ADDR page_base_phys;
|
||||
PUCHAR page_base_virt;
|
||||
PUCHAR page_current;
|
||||
#endif
|
||||
struct free_heap_block *free_heap_slots[8];
|
||||
struct free_page *free_pages;
|
||||
UINT num_free_pages;
|
||||
UINT active_stripes;
|
||||
UINT num_flushing;
|
||||
PCommand cache_wait_list;
|
||||
};
|
||||
|
||||
|
||||
#endif
|
@ -1,96 +0,0 @@
|
||||
RocketRAID 182x Driver for FreeBSD
|
||||
Copyright (C) 2003-2004 HighPoint Technologies, Inc. All rights reserved.
|
||||
|
||||
#############################################################################
|
||||
Revision History:
|
||||
|
||||
v1.1 2004-9-23
|
||||
Fix activity LED problem.
|
||||
Cleanup diagnostic code.
|
||||
|
||||
v1.01 2004-5-24
|
||||
First source code release
|
||||
|
||||
#############################################################################
|
||||
|
||||
1. Overview
|
||||
---------------------
|
||||
This package contains FreeBSD driver source code for HighPoint RocketRAID
|
||||
182x SATA controller.
|
||||
|
||||
NO WARRANTY
|
||||
|
||||
THE DRIVER SOURCE CODE HIGHPOINT PROVIDED IS FREE OF CHARGE, AND THERE IS
|
||||
NO WARRANTY FOR THE PROGRAM. THERE ARE NO RESTRICTIONS ON THE USE OF THIS
|
||||
FREE SOURCE CODE. HIGHPOINT DOES NOT PROVIDE ANY TECHNICAL SUPPORT IF THE
|
||||
CODE HAS BEEN CHANGED FROM ORIGINAL SOURCE CODE.
|
||||
|
||||
LIMITATION OF LIABILITY
|
||||
|
||||
IN NO EVENT WILL HIGHPOINT BE LIABLE FOR DIRECT, INDIRECT, SPECIAL,
|
||||
INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE USE OF OR
|
||||
INABILITY TO USE THIS PRODUCT OR DOCUMENTATION, EVEN IF ADVISED OF THE
|
||||
POSSIBILITY OF SUCH DAMAGES. IN PARTICULAR, HIGHPOINT SHALL NOT HAVE
|
||||
LIABILITY FOR ANY HARDWARE, SOFTWARE, OR DATA STORED USED WITH THE
|
||||
PRODUCT, INCLUDING THE COSTS OF REPAIRING, REPLACING, OR RECOVERING
|
||||
SUCH HARDWARE, OR DATA.
|
||||
|
||||
2. Build the driver
|
||||
---------------------
|
||||
1) Install kernel source package and building tools.
|
||||
|
||||
2) Extract the driver files to somewhere.
|
||||
|
||||
3) Run "make" to build the driver.
|
||||
|
||||
|
||||
3. Using the driver
|
||||
---------------------
|
||||
1) Copy the driver module to /modules/ (FreeBSD 4.x) or /boot/kernel/
|
||||
(FreeBSD 5.x).
|
||||
|
||||
2) The driver can't be loaded by kldload command on a running system.
|
||||
Please load the driver during system booting stage. e.g:
|
||||
|
||||
BTX loader 1.00 BTX version is 1.01
|
||||
Console: internal video/keyboard
|
||||
BIOS driver A: is disk0
|
||||
BIOS driver C: is disk2
|
||||
BIOS 636kB/74512kB available memory
|
||||
|
||||
FreeBSD/i386 bootstrap loader, Revision 0.8
|
||||
(mailto:jkh@narf.osd.bsdi.com, Sat Apr 21 08:46:19 GMT 2001)
|
||||
Loading /boot/defaults/loader.conf
|
||||
/kernel text=0x24f1db data=0x3007ec+0x2062c -
|
||||
|
||||
Hit [Enter] to boot immediagely, or any other key for command prompt.
|
||||
Booting [kernel] in 9 seconds¡
|
||||
|
||||
<-- press SPACE key here
|
||||
Type '?' for a list of commands, 'help' for more detailed help.
|
||||
ok load hptmv
|
||||
/modules/hptmv.ko text=0xf571 data=0x2c8+0x254
|
||||
ok autoboot
|
||||
|
||||
Please refer to the installation guide in HighPoint FreeBSD driver release
|
||||
package for more information.
|
||||
|
||||
|
||||
#############################################################################
|
||||
Technical support and service
|
||||
|
||||
If you have questions about installing or using your HighPoint product,
|
||||
check the user's guide or readme file first, and you will find answers to
|
||||
most of your questions here. If you need further assistance, please
|
||||
contact us. We offer the following support and information services:
|
||||
|
||||
1) The HighPoint Web Site provides information on software upgrades,
|
||||
answers to common questions, and other topics. The Web Site is
|
||||
available from Internet 24 hours a day, 7 days a week, at
|
||||
http://www.highpoint-tech.com.
|
||||
|
||||
2) For technical support, send e-mail to support@highpoint-tech.com
|
||||
|
||||
NOTE: Before you send an e-mail, please visit our Web Site
|
||||
(http://www.highpoint-tech.com) to check if there is a new or
|
||||
updated device driver for your system.
|
@ -1,280 +0,0 @@
|
||||
/*
|
||||
* Copyright (c) 2003-2004 HighPoint Technologies, Inc.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef _VDEVICE_H_
|
||||
#define _VDEVICE_H_
|
||||
|
||||
/***************************************************************************
|
||||
* Description: virtual device header
|
||||
***************************************************************************/
|
||||
|
||||
typedef struct _VDevice
|
||||
{
|
||||
UCHAR VDeviceType;
|
||||
UCHAR vf_bootmark: 1; /* is boot device? */
|
||||
UCHAR vf_bootable: 1; /* has active partition */
|
||||
UCHAR vf_online: 1; /* is usable? */
|
||||
UCHAR vf_cache_disk: 1; /* Cache enabled */
|
||||
UCHAR vf_format_v2: 1; /* old array block */
|
||||
UCHAR vf_freed: 1; /* memory free */
|
||||
UCHAR reserve1;
|
||||
UCHAR bSerialNumber; /* valid if pParent!=0 */
|
||||
|
||||
PVDevice pParent; /* parent array */
|
||||
PVBus pVBus; /* vbus this device located. Must not be NULL. */
|
||||
|
||||
LBA_T VDeviceCapacity; /* number of blocks */
|
||||
|
||||
LBA_T LockedLba;
|
||||
USHORT LockedSectors;
|
||||
USHORT ActiveRequests;
|
||||
PCommand LockWaitList;
|
||||
void (* HPTLIBAPI QuiesceAction)(_VBUS_ARG void *arg);
|
||||
void *QuiesceArg;
|
||||
void (* HPTLIBAPI flush_callback)(_VBUS_ARG void *arg);
|
||||
void *flush_callback_arg;
|
||||
|
||||
|
||||
#if defined(_RAID5N_)
|
||||
struct stripe **CacheEntry;
|
||||
struct range_lock *range_lock;
|
||||
#endif
|
||||
|
||||
void (* HPTLIBAPI pfnSendCommand)(_VBUS_ARG PCommand pCmd); /* call this to send a command to a VDevice */
|
||||
void (* HPTLIBAPI pfnDeviceFailed)(_VBUS_ARG PVDevice pVDev); /* call this when a VDevice failed */
|
||||
|
||||
union {
|
||||
#ifdef SUPPORT_ARRAY
|
||||
RaidArray array;
|
||||
#endif
|
||||
Device disk;
|
||||
} u;
|
||||
|
||||
} VDevice;
|
||||
|
||||
#define ARRAY_VDEV_SIZE ((UINT)(ULONG_PTR)&((PVDevice)0)->u+sizeof(RaidArray))
|
||||
#define DISK_VDEV_SIZE ((UINT)(ULONG_PTR)&((PVDevice)0)->u+sizeof(Device))
|
||||
|
||||
#define Map2pVDevice(pDev) ((PVDevice)((UINT_PTR)pDev - (UINT)(UINT_PTR)&((PVDevice)0)->u.disk))
|
||||
|
||||
/*
|
||||
* bUserDeviceMode
|
||||
*/
|
||||
#define MEMBER_NOT_SET_MODE 0x5F
|
||||
|
||||
/*
|
||||
* arrayType
|
||||
*/
|
||||
#define VD_SPARE 0
|
||||
#define VD_REMOVABLE 1
|
||||
#define VD_ATAPI 2
|
||||
#define VD_SINGLE_DISK 3
|
||||
|
||||
#define VD_JBOD 4 /* JBOD */
|
||||
#define VD_RAID_0 5 /* RAID 0 stripe */
|
||||
#define VD_RAID_1 6 /* RAID 1 mirror */
|
||||
#define VD_RAID_3 7 /* RAID 3 */
|
||||
#define VD_RAID_5 8 /* RAID 5 */
|
||||
#define VD_MAX_TYPE 8
|
||||
|
||||
#ifdef SUPPORT_ARRAY
|
||||
#define mIsArray(pVDev) (pVDev->VDeviceType>VD_SINGLE_DISK)
|
||||
#else
|
||||
#define mIsArray(pVDev) 0
|
||||
#endif
|
||||
|
||||
extern void (* HPTLIBAPI pfnSendCommand[])(_VBUS_ARG PCommand pCmd);
|
||||
extern void (* HPTLIBAPI pfnDeviceFailed[])(_VBUS_ARG PVDevice pVDev);
|
||||
void HPTLIBAPI fOsDiskFailed(_VBUS_ARG PVDevice pVDev);
|
||||
void HPTLIBAPI fDeviceSendCommand(_VBUS_ARG PCommand pCmd);
|
||||
void HPTLIBAPI fSingleDiskFailed(_VBUS_ARG PVDevice pVDev);
|
||||
|
||||
/***************************************************************************
|
||||
* Description: RAID Adapter
|
||||
***************************************************************************/
|
||||
|
||||
typedef struct _VBus {
|
||||
/* pVDevice[] may be non-continuous */
|
||||
PVDevice pVDevice[MAX_VDEVICE_PER_VBUS];
|
||||
|
||||
UINT nInstances;
|
||||
PChipInstance pChipInstance[MAX_CHIP_IN_VBUS];
|
||||
|
||||
void * OsExt; /* for OS private use */
|
||||
|
||||
|
||||
int serial_mode;
|
||||
int next_active;
|
||||
int working_devs;
|
||||
|
||||
|
||||
|
||||
PCommand pFreeCommands;
|
||||
DPC_ROUTINE PendingRoutines[MAX_PENDING_ROUTINES];
|
||||
int PendingRoutinesFirst, PendingRoutinesLast;
|
||||
DPC_ROUTINE IdleRoutines[MAX_IDLE_ROUTINES];
|
||||
int IdleRoutinesFirst, IdleRoutinesLast;
|
||||
|
||||
#ifdef SUPPORT_ARRAY
|
||||
PVDevice pFreeArrayLink;
|
||||
BYTE _ArrayTables[MAX_ARRAY_PER_VBUS * ARRAY_VDEV_SIZE];
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef _RAID5N_
|
||||
struct r5_global_data r5;
|
||||
#endif
|
||||
|
||||
} VBus;
|
||||
|
||||
/*
|
||||
* Array members must be on same VBus.
|
||||
* The platform dependent part shall select one of the following strategy.
|
||||
*/
|
||||
#ifdef SET_VBUS_FOR_EACH_IRQ
|
||||
#define CHIP_ON_SAME_VBUS(pChip1, pChip2) ((pChip1)->bChipIntrNum==(pChip2)->bChipIntrNum)
|
||||
#elif defined(SET_VBUS_FOR_EACH_CONTROLLER)
|
||||
#define CHIP_ON_SAME_VBUS(pChip1, pChip2) \
|
||||
((pChip1)->pci_bus==(pChip2)->pci_bus && (pChip1)->pci_dev==(pChip2)->pci_dev)
|
||||
#elif defined(SET_VBUS_FOR_EACH_FUNCTION)
|
||||
#define CHIP_ON_SAME_VBUS(pChip1, pChip2) \
|
||||
((pChip1)->pci_bus==(pChip2)->pci_bus && (pChip1)->pci_dev==(pChip2)->pci_dev && (pChip1)->pci_func==(pChip2)->pci_func)
|
||||
#else
|
||||
#error You must set one vbus setting
|
||||
#endif
|
||||
|
||||
#define FOR_EACH_CHANNEL_ON_VBUS(_pVBus, _pChan) \
|
||||
for (_pChan=pChanStart; _pChan<pChanEnd; _pChan++) \
|
||||
if (_pChan->pChipInstance->pVBus!=_pVBus) ; else
|
||||
|
||||
#define FOR_EACH_DEV_ON_VBUS(pVBus, pVDev, i) \
|
||||
for(i = 0; i < MAX_VDEVICE_PER_VBUS; i++) \
|
||||
if ((pVDev=pVBus->pVDevice[i])==0) continue; else
|
||||
|
||||
#define FOR_EACH_DEV_ON_ALL_VBUS(pVBus, pVDev, i) \
|
||||
for(pVBus = gVBus; pVBus < &gVBus[MAX_VBUS]; pVBus++) \
|
||||
for(i = 0; i < MAX_VDEVICE_PER_VBUS; i++) \
|
||||
if ((pVDev=pVBus->pVDevice[i])==0) continue; else
|
||||
|
||||
#define FOR_EACH_ARRAY_ON_ALL_VBUS(pVBus, pArray, i) \
|
||||
for(pVBus = gVBus; pVBus < &gVBus[MAX_VBUS]; pVBus++) \
|
||||
for(i = 0; i < MAX_ARRAY_PER_VBUS; i++) \
|
||||
if ((pArray=((PVDevice)&pVBus->_ArrayTables[i*ARRAY_VDEV_SIZE]))->u.array.dArStamp==0) continue; else
|
||||
|
||||
/***************************************************************************
|
||||
* Description: the functions called by IDE layer
|
||||
***************************************************************************/
|
||||
#ifdef SUPPORT_ARRAY
|
||||
#define IdeRegisterDevice fCheckArray
|
||||
#else
|
||||
void HPTLIBAPI IdeRegisterDevice(PDevice pDev);
|
||||
#endif
|
||||
|
||||
/***************************************************************************
|
||||
* Description: the functions OS must provided
|
||||
***************************************************************************/
|
||||
|
||||
void OsSetDeviceTable(PDevice pDevice, PIDENTIFY_DATA pIdentify);
|
||||
|
||||
/*
|
||||
* allocate and free data structure
|
||||
*/
|
||||
PChannel fGetChannelTable(void);
|
||||
PDevice fGetDeviceTable(void);
|
||||
#define OsGetChannelTable(x, y) fGetChannelTable()
|
||||
#define OsGetDeviceTable(x, y) fGetDeviceTable()
|
||||
void OsReturnTable(PDevice pDevice);
|
||||
/***************************************************************************
|
||||
* Description: the functions Prototype
|
||||
***************************************************************************/
|
||||
/*
|
||||
* vdevice.c
|
||||
*/
|
||||
int Initialize(void);
|
||||
int InitializeAllChips(void);
|
||||
void InitializeVBus(PVBus pVBus);
|
||||
void fRegisterChip(PChipInstance pChip);
|
||||
void __fRegisterVDevices(PVBus pVBus);
|
||||
void fRegisterVDevices(void);
|
||||
void HPTLIBAPI UnregisterVDevice(PVDevice);
|
||||
void HPTLIBAPI fCheckBootable(PVDevice pVDev);
|
||||
void HPTLIBAPI fFlushVDev(PVDevice pVDev);
|
||||
void HPTLIBAPI fFlushVDevAsync(PVDevice pVDev, DPC_PROC done, void *arg);
|
||||
void HPTLIBAPI fShutdownVDev(PVDevice pVDev);
|
||||
void HPTLIBAPI fResetVBus(_VBUS_ARG0);
|
||||
void HPTLIBAPI fCompleteAllCommandsSynchronously(PVBus _vbus_p);
|
||||
|
||||
#define RegisterVDevice(pVDev)
|
||||
#define OsRegisterDevice(pVDev)
|
||||
#define OsUnregisterDevice(pVDev)
|
||||
|
||||
#ifdef SUPPORT_VBUS_CONFIG
|
||||
void VBus_Config(PVBus pVBus, char *str);
|
||||
#else
|
||||
#define VBus_Config(pVBus, str)
|
||||
#endif
|
||||
|
||||
#pragma pack(1)
|
||||
struct fdisk_partition_table
|
||||
{
|
||||
UCHAR bootid; /* bootable? 0=no, 128=yes */
|
||||
UCHAR beghead; /* beginning head number */
|
||||
UCHAR begsect; /* beginning sector number */
|
||||
UCHAR begcyl; /* 10 bit nmbr, with high 2 bits put in begsect */
|
||||
UCHAR systid; /* Operating System type indicator code */
|
||||
UCHAR endhead; /* ending head number */
|
||||
UCHAR endsect; /* ending sector number */
|
||||
UCHAR endcyl; /* also a 10 bit nmbr, with same high 2 bit trick */
|
||||
UINT relsect; /* first sector relative to start of disk */
|
||||
UINT numsect; /* number of sectors in partition */
|
||||
};
|
||||
|
||||
typedef struct _Master_Boot_Record
|
||||
{
|
||||
UCHAR bootinst[446]; /* space to hold actual boot code */
|
||||
struct fdisk_partition_table parts[4];
|
||||
USHORT signature; /* set to 0xAA55 to indicate PC MBR format */
|
||||
}
|
||||
Master_Boot_Record, *PMaster_Boot_Record;
|
||||
|
||||
#ifndef SUPPORT_ARRAY
|
||||
/* TODO: move it later */
|
||||
#ifdef __BIG_ENDIAN_BITFIELD
|
||||
typedef DWORD TIME_RECORD;
|
||||
#else
|
||||
typedef struct _TIME_RECORD {
|
||||
UINT seconds:6; /* 0 - 59 */
|
||||
UINT minutes:6; /* 0 - 59 */
|
||||
UINT month:4; /* 1 - 12 */
|
||||
UINT hours:6; /* 0 - 59 */
|
||||
UINT day:5; /* 1 - 31 */
|
||||
UINT year:5; /* 0=2000, 31=2031 */
|
||||
} TIME_RECORD;
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#pragma pack()
|
||||
#endif
|
@ -22,6 +22,8 @@
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
#ifndef _ACCESS601_H_
|
||||
#define _ACCESS601_H_
|
||||
|
@ -22,6 +22,8 @@
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
#ifndef _ARRAY_H_
|
||||
|
@ -22,6 +22,8 @@
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
#ifndef _ATAPI_H_
|
||||
|
@ -22,6 +22,8 @@
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
#ifndef _COMMAND_H_
|
||||
#define _COMMAND_H_
|
||||
|
@ -22,6 +22,8 @@
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
/*
|
||||
* gui_lib.c
|
||||
|
@ -22,6 +22,8 @@
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
/*
|
||||
* hptproc.c sysctl support
|
||||
|
@ -22,6 +22,8 @@
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
/*
|
||||
* ioctl.c ioctl interface implementation
|
||||
|
@ -22,6 +22,8 @@
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
#ifndef __INCmvSatah
|
||||
#define __INCmvSatah
|
||||
|
@ -22,7 +22,9 @@
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
*
|
||||
* $FreeBSD$
|
||||
*
|
||||
#ifndef __INCmvStorageDevh
|
||||
#define __INCmvStorageDevh
|
||||
|
||||
|
@ -22,6 +22,8 @@
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
#ifdef _RAID5N_
|
||||
|
||||
|
@ -1,5 +1,6 @@
|
||||
RocketRAID 182x Driver for FreeBSD
|
||||
Copyright (C) 2003-2004 HighPoint Technologies, Inc. All rights reserved.
|
||||
$FreeBSD$
|
||||
|
||||
#############################################################################
|
||||
Revision History:
|
||||
|
@ -22,6 +22,8 @@
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
#ifndef _VDEVICE_H_
|
||||
|
@ -4,8 +4,8 @@
|
||||
#
|
||||
# $FreeBSD$
|
||||
|
||||
HPTMV= ${.CURDIR}/../../contrib/dev/hptmv
|
||||
.PATH: ${.CURDIR}/../../dev/hptmv ${HPTMV}
|
||||
HPTMV= ${.CURDIR}/../../dev/hptmv
|
||||
.PATH: ${HPTMV}
|
||||
|
||||
KMOD= hptmv
|
||||
SRCS= opt_scsi.h opt_cam.h
|
||||
|
Loading…
Reference in New Issue
Block a user