Just wbinv if both PREREAD and PREWRITE are set.
In PREREAD, just invalidate the cache lines, and do not write back them, if the buffer is properly aligned. Approved by: re (blanket)
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svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=171890
@ -1091,13 +1091,19 @@ bus_dmamap_sync_buf(void *buf, int len, bus_dmasync_op_t op)
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{
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char _tmp_cl[arm_dcache_align], _tmp_clend[arm_dcache_align];
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if (op & BUS_DMASYNC_PREWRITE) {
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if ((op & BUS_DMASYNC_PREWRITE) && !(op & BUS_DMASYNC_PREREAD)) {
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cpu_dcache_wb_range((vm_offset_t)buf, len);
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cpu_l2cache_wb_range((vm_offset_t)buf, len);
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}
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if (op & BUS_DMASYNC_PREREAD) {
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cpu_idcache_wbinv_range((vm_offset_t)buf, len);
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cpu_l2cache_wbinv_range((vm_offset_t)buf, len);
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if ((op & BUS_DMASYNC_PREWRITE) ||
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((((vm_offset_t)(buf) | len) & arm_dcache_align_mask) == 0)) {
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cpu_dcache_inv_range((vm_offset_t)buf, len);
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cpu_l2cache_inv_range((vm_offset_t)buf, len);
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} else {
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cpu_dcache_wbinv_range((vm_offset_t)buf, len);
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cpu_l2cache_wbinv_range((vm_offset_t)buf, len);
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}
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}
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if (op & BUS_DMASYNC_POSTREAD) {
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if ((vm_offset_t)buf & arm_dcache_align_mask) {
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