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Bring in a driver for the LSI Logic MPT2 6Gb SAS controllers.

This driver supports basic I/O, and works with SAS and SATA drives and
expanders.

Basic error recovery works (i.e. timeouts and aborts) as well.

Integrated RAID isn't supported yet, and there are some known bugs.

So this isn't ready for production use, but is certainly ready for
testing and additional development.  For the moment, new commits to this
driver should go into the FreeBSD Perforce repository first
(//depot/projects/mps/...) and then get merged into -current once
they've been vetted.

This has only been added to the amd64 GENERIC, since that is the only
architecture I have tested this driver with.

Submitted by:	scottl
Discussed with:	imp, gibbs, will
Sponsored by:	Yahoo, Spectra Logic Corporation
This commit is contained in:
Kenneth D. Merry 2010-09-10 15:03:56 +00:00
parent c68e12a6f9
commit d3c7b9a08a
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=212420
24 changed files with 12780 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
sys/amd64/conf/GENERIC
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@ -112,6 +112,7 @@ device hptiop # Highpoint RocketRaid 3xxx series
device isp # Qlogic family
#device ispfw # Firmware for QLogic HBAs- normally a module
device mpt # LSI-Logic MPT-Fusion
device mps # LSI-Logic MPT-Fusion 2
#device ncr # NCR/Symbios Logic
device sym # NCR/Symbios Logic (newer chipsets + those of `ncr')
device trm # Tekram DC395U/UW/F DC315U adapters

5
sys/conf/files
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@ -1328,6 +1328,11 @@ dev/mmc/mmcbr_if.m standard
dev/mmc/mmcbus_if.m standard
dev/mmc/mmcsd.c optional mmcsd
dev/mn/if_mn.c optional mn pci
dev/mps/mps.c optional mps
dev/mps/mps_pci.c optional mps pci
dev/mps/mps_sas.c optional mps
dev/mps/mps_table.c optional mps
dev/mps/mps_user.c optional mps
dev/mpt/mpt.c optional mpt
dev/mpt/mpt_cam.c optional mpt
dev/mpt/mpt_debug.c optional mpt

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sys/dev/mps/mpi/mpi2.h Normal file
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2646
sys/dev/mps/mpi/mpi2_cnfg.h Normal file
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114
sys/dev/mps/mpi/mpi2_hbd.h Normal file
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@ -0,0 +1,114 @@
/* $FreeBSD$ */
/*
* Copyright (c) 2009 LSI Corporation.
*
*
* Name: mpi2_hbd.h
* Title: MPI Host Based Discovery messages and structures
* Creation Date: October 21, 2009
*
* mpi2_hbd.h Version: 02.00.00
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 10-28-09 02.00.00 Initial version.
* --------------------------------------------------------------------------
*/
#ifndef MPI2_HBD_H
#define MPI2_HBD_H
/****************************************************************************
* Host Based Discovery Action messages
****************************************************************************/
/* Host Based Discovery Action Request Message */
typedef struct _MPI2_HBD_ACTION_REQUEST
{
U8 Operation; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 DevHandle; /* 0x04 */
U8 Reserved2; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U32 Reserved4; /* 0x0C */
U64 SASAddress; /* 0x10 */
U32 Reserved5; /* 0x18 */
U32 HbdDeviceInfo; /* 0x1C */
U16 ParentDevHandle; /* 0x20 */
U16 MaxQDepth; /* 0x22 */
U8 FirstPhyIdentifier; /* 0x24 */
U8 Port; /* 0x25 */
U8 MaxConnections; /* 0x26 */
U8 MaxRate; /* 0x27 */
U8 PortGroups; /* 0x28 */
U8 DmaGroup; /* 0x29 */
U8 ControlGroup; /* 0x2A */
U8 Reserved6; /* 0x2B */
U16 InitialAWT; /* 0x2C */
U16 Reserved7; /* 0x2E */
U32 Reserved8; /* 0x30 */
} MPI2_HBD_ACTION_REQUEST, MPI2_POINTER PTR_MPI2_HBD_ACTION_REQUEST,
Mpi2HbdActionRequest_t, MPI2_POINTER pMpi2HbdActionRequest_t;
/* values for the Operation field */
#define MPI2_HBD_OP_ADD_DEVICE (0x01)
#define MPI2_HBD_OP_REMOVE_DEVICE (0x02)
#define MPI2_HBD_OP_UPDATE_DEVICE (0x03)
/* values for the HbdDeviceInfo field */
#define MPI2_HBD_DEVICE_INFO_VIRTUAL_DEVICE (0x00004000)
#define MPI2_HBD_DEVICE_INFO_ATAPI_DEVICE (0x00002000)
#define MPI2_HBD_DEVICE_INFO_DIRECT_ATTACH (0x00000800)
#define MPI2_HBD_DEVICE_INFO_SSP_TARGET (0x00000400)
#define MPI2_HBD_DEVICE_INFO_STP_TARGET (0x00000200)
#define MPI2_HBD_DEVICE_INFO_SMP_TARGET (0x00000100)
#define MPI2_HBD_DEVICE_INFO_SATA_DEVICE (0x00000080)
#define MPI2_HBD_DEVICE_INFO_SSP_INITIATOR (0x00000040)
#define MPI2_HBD_DEVICE_INFO_STP_INITIATOR (0x00000020)
#define MPI2_HBD_DEVICE_INFO_SMP_INITIATOR (0x00000010)
#define MPI2_HBD_DEVICE_INFO_SATA_HOST (0x00000008)
#define MPI2_HBD_DEVICE_INFO_MASK_DEVICE_TYPE (0x00000007)
#define MPI2_HBD_DEVICE_INFO_NO_DEVICE (0x00000000)
#define MPI2_HBD_DEVICE_INFO_END_DEVICE (0x00000001)
#define MPI2_HBD_DEVICE_INFO_EDGE_EXPANDER (0x00000002)
#define MPI2_HBD_DEVICE_INFO_FANOUT_EXPANDER (0x00000003)
/* values for the MaxRate field */
#define MPI2_HBD_MAX_RATE_MASK (0x0F)
#define MPI2_HBD_MAX_RATE_1_5 (0x08)
#define MPI2_HBD_MAX_RATE_3_0 (0x09)
#define MPI2_HBD_MAX_RATE_6_0 (0x0A)
/* Host Based Discovery Action Reply Message */
typedef struct _MPI2_HBD_ACTION_REPLY
{
U8 Operation; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 DevHandle; /* 0x04 */
U8 Reserved2; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U16 Reserved4; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
} MPI2_HBD_ACTION_REPLY, MPI2_POINTER PTR_MPI2_HBD_ACTION_REPLY,
Mpi2HbdActionReply_t, MPI2_POINTER pMpi2HbdActionReply_t;
#endif

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sys/dev/mps/mpi/mpi2_history.txt Normal file
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@ -0,0 +1,382 @@
/* $FreeBSD$ */
==============================
Fusion-MPT MPI 2.0 Header File Change History
==============================
Copyright (c) 2000-2009 LSI Corporation.
---------------------------------------
Header Set Release Version: 02.00.14
Header Set Release Date: 10-28-09
---------------------------------------
Filename Current version Prior version
---------- --------------- -------------
mpi2.h 02.00.14 02.00.13
mpi2_cnfg.h 02.00.13 02.00.12
mpi2_init.h 02.00.08 02.00.07
mpi2_ioc.h 02.00.13 02.00.12
mpi2_raid.h 02.00.04 02.00.04
mpi2_sas.h 02.00.03 02.00.02
mpi2_targ.h 02.00.03 02.00.03
mpi2_tool.h 02.00.04 02.00.04
mpi2_type.h 02.00.00 02.00.00
mpi2_ra.h 02.00.00 02.00.00
mpi2_hbd.h 02.00.00
mpi2_history.txt 02.00.14 02.00.13
* Date Version Description
* -------- -------- ------------------------------------------------------
mpi2.h
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 06-04-07 02.00.01 Bumped MPI2_HEADER_VERSION_UNIT.
* 06-26-07 02.00.02 Bumped MPI2_HEADER_VERSION_UNIT.
* 08-31-07 02.00.03 Bumped MPI2_HEADER_VERSION_UNIT.
* Moved ReplyPostHostIndex register to offset 0x6C of the
* MPI2_SYSTEM_INTERFACE_REGS and modified the define for
* MPI2_REPLY_POST_HOST_INDEX_OFFSET.
* Added union of request descriptors.
* Added union of reply descriptors.
* 10-31-07 02.00.04 Bumped MPI2_HEADER_VERSION_UNIT.
* Added define for MPI2_VERSION_02_00.
* Fixed the size of the FunctionDependent5 field in the
* MPI2_DEFAULT_REPLY structure.
* 12-18-07 02.00.05 Bumped MPI2_HEADER_VERSION_UNIT.
* Removed the MPI-defined Fault Codes and extended the
* product specific codes up to 0xEFFF.
* Added a sixth key value for the WriteSequence register
* and changed the flush value to 0x0.
* Added message function codes for Diagnostic Buffer Post
* and Diagnsotic Release.
* New IOCStatus define: MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED
* Moved MPI2_VERSION_UNION from mpi2_ioc.h.
* 02-29-08 02.00.06 Bumped MPI2_HEADER_VERSION_UNIT.
* 03-03-08 02.00.07 Bumped MPI2_HEADER_VERSION_UNIT.
* 05-21-08 02.00.08 Bumped MPI2_HEADER_VERSION_UNIT.
* Added #defines for marking a reply descriptor as unused.
* 06-27-08 02.00.09 Bumped MPI2_HEADER_VERSION_UNIT.
* 10-02-08 02.00.10 Bumped MPI2_HEADER_VERSION_UNIT.
* Moved LUN field defines from mpi2_init.h.
* 01-19-09 02.00.11 Bumped MPI2_HEADER_VERSION_UNIT.
* 05-06-09 02.00.12 Bumped MPI2_HEADER_VERSION_UNIT.
* In all request and reply descriptors, replaced VF_ID
* field with MSIxIndex field.
* Removed DevHandle field from
* MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR and made those
* bytes reserved.
* Added RAID Accelerator functionality.
* 07-30-09 02.00.13 Bumped MPI2_HEADER_VERSION_UNIT.
* 10-28-09 02.00.14 Bumped MPI2_HEADER_VERSION_UNIT.
* Added MSI-x index mask and shift for Reply Post Host
* Index register.
* Added function code for Host Based Discovery Action.
* --------------------------------------------------------------------------
mpi2_cnfg.h
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 06-04-07 02.00.01 Added defines for SAS IO Unit Page 2 PhyFlags.
* Added Manufacturing Page 11.
* Added MPI2_SAS_EXPANDER0_FLAGS_CONNECTOR_END_DEVICE
* define.
* 06-26-07 02.00.02 Adding generic structure for product-specific
* Manufacturing pages: MPI2_CONFIG_PAGE_MANUFACTURING_PS.
* Rework of BIOS Page 2 configuration page.
* Fixed MPI2_BIOSPAGE2_BOOT_DEVICE to be a union of the
* forms.
* Added configuration pages IOC Page 8 and Driver
* Persistent Mapping Page 0.
* 08-31-07 02.00.03 Modified configuration pages dealing with Integrated
* RAID (Manufacturing Page 4, RAID Volume Pages 0 and 1,
* RAID Physical Disk Pages 0 and 1, RAID Configuration
* Page 0).
* Added new value for AccessStatus field of SAS Device
* Page 0 (_SATA_NEEDS_INITIALIZATION).
* 10-31-07 02.00.04 Added missing SEPDevHandle field to
* MPI2_CONFIG_PAGE_SAS_ENCLOSURE_0.
* 12-18-07 02.00.05 Modified IO Unit Page 0 to use 32-bit version fields for
* NVDATA.
* Modified IOC Page 7 to use masks and added field for
* SASBroadcastPrimitiveMasks.
* Added MPI2_CONFIG_PAGE_BIOS_4.
* Added MPI2_CONFIG_PAGE_LOG_0.
* 02-29-08 02.00.06 Modified various names to make them 32-character unique.
* Added SAS Device IDs.
* Updated Integrated RAID configuration pages including
* Manufacturing Page 4, IOC Page 6, and RAID Configuration
* Page 0.
* 05-21-08 02.00.07 Added define MPI2_MANPAGE4_MIX_SSD_SAS_SATA.
* Added define MPI2_MANPAGE4_PHYSDISK_128MB_COERCION.
* Fixed define MPI2_IOCPAGE8_FLAGS_ENCLOSURE_SLOT_MAPPING.
* Added missing MaxNumRoutedSasAddresses field to
* MPI2_CONFIG_PAGE_EXPANDER_0.
* Added SAS Port Page 0.
* Modified structure layout for
* MPI2_CONFIG_PAGE_DRIVER_MAPPING_0.
* 06-27-08 02.00.08 Changed MPI2_CONFIG_PAGE_RD_PDISK_1 to use
* MPI2_RAID_PHYS_DISK1_PATH_MAX to size the array.
* 10-02-08 02.00.09 Changed MPI2_RAID_PGAD_CONFIGNUM_MASK from 0x0000FFFF
* to 0x000000FF.
* Added two new values for the Physical Disk Coercion Size
* bits in the Flags field of Manufacturing Page 4.
* Added product-specific Manufacturing pages 16 to 31.
* Modified Flags bits for controlling write cache on SATA
* drives in IO Unit Page 1.
* Added new bit to AdditionalControlFlags of SAS IO Unit
* Page 1 to control Invalid Topology Correction.
* Added SupportedPhysDisks field to RAID Volume Page 1 and
* added related defines.
* Added additional defines for RAID Volume Page 0
* VolumeStatusFlags field.
* Modified meaning of RAID Volume Page 0 VolumeSettings
* define for auto-configure of hot-swap drives.
* Added PhysDiskAttributes field (and related defines) to
* RAID Physical Disk Page 0.
* Added MPI2_SAS_PHYINFO_PHY_VACANT define.
* Added three new DiscoveryStatus bits for SAS IO Unit
* Page 0 and SAS Expander Page 0.
* Removed multiplexing information from SAS IO Unit pages.
* Added BootDeviceWaitTime field to SAS IO Unit Page 4.
* Removed Zone Address Resolved bit from PhyInfo and from
* Expander Page 0 Flags field.
* Added two new AccessStatus values to SAS Device Page 0
* for indicating routing problems. Added 3 reserved words
* to this page.
* 01-19-09 02.00.10 Fixed defines for GPIOVal field of IO Unit Page 3.
* Inserted missing reserved field into structure for IOC
* Page 6.
* Added more pending task bits to RAID Volume Page 0
* VolumeStatusFlags defines.
* Added MPI2_PHYSDISK0_STATUS_FLAG_NOT_CERTIFIED define.
* Added a new DiscoveryStatus bit for SAS IO Unit Page 0
* and SAS Expander Page 0 to flag a downstream initiator
* when in simplified routing mode.
* Removed SATA Init Failure defines for DiscoveryStatus
* fields of SAS IO Unit Page 0 and SAS Expander Page 0.
* Added MPI2_SAS_DEVICE0_ASTATUS_DEVICE_BLOCKED define.
* Added PortGroups, DmaGroup, and ControlGroup fields to
* SAS Device Page 0.
* 05-06-09 02.00.11 Added structures and defines for IO Unit Page 5 and IO
* Unit Page 6.
* Added expander reduced functionality data to SAS
* Expander Page 0.
* Added SAS PHY Page 2 and SAS PHY Page 3.
* 07-30-09 02.00.12 Added IO Unit Page 7.
* Added new device ids.
* Added SAS IO Unit Page 5.
* Added partial and slumber power management capable flags
* to SAS Device Page 0 Flags field.
* Added PhyInfo defines for power condition.
* Added Ethernet configuration pages.
* 10-28-09 02.00.13 Added MPI2_IOUNITPAGE1_ENABLE_HOST_BASED_DISCOVERY.
* Added SAS PHY Page 4 structure and defines.
* --------------------------------------------------------------------------
mpi2_init.h
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 10-31-07 02.00.01 Fixed name for pMpi2SCSITaskManagementRequest_t.
* 12-18-07 02.00.02 Modified Task Management Target Reset Method defines.
* 02-29-08 02.00.03 Added Query Task Set and Query Unit Attention.
* 03-03-08 02.00.04 Fixed name of struct _MPI2_SCSI_TASK_MANAGE_REPLY.
* 05-21-08 02.00.05 Fixed typo in name of Mpi2SepRequest_t.
* 10-02-08 02.00.06 Removed Untagged and No Disconnect values from SCSI IO
* Control field Task Attribute flags.
* Moved LUN field defines to mpi2.h becasue they are
* common to many structures.
* 05-06-09 02.00.07 Changed task management type of Query Unit Attention to
* Query Asynchronous Event.
* Defined two new bits in the SlotStatus field of the SCSI
* Enclosure Processor Request and Reply.
* 10-28-09 02.00.08 Added defines for decoding the ResponseInfo bytes for
* both SCSI IO Error Reply and SCSI Task Management Reply.
* Added ResponseInfo field to MPI2_SCSI_TASK_MANAGE_REPLY.
* Added MPI2_SCSITASKMGMT_RSP_TM_OVERLAPPED_TAG define.
* --------------------------------------------------------------------------
mpi2_ioc.h
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 06-04-07 02.00.01 In IOCFacts Reply structure, renamed MaxDevices to
* MaxTargets.
* Added TotalImageSize field to FWDownload Request.
* Added reserved words to FWUpload Request.
* 06-26-07 02.00.02 Added IR Configuration Change List Event.
* 08-31-07 02.00.03 Removed SystemReplyQueueDepth field from the IOCInit
* request and replaced it with
* ReplyDescriptorPostQueueDepth and ReplyFreeQueueDepth.
* Replaced the MinReplyQueueDepth field of the IOCFacts
* reply with MaxReplyDescriptorPostQueueDepth.
* Added MPI2_RDPQ_DEPTH_MIN define to specify the minimum
* depth for the Reply Descriptor Post Queue.
* Added SASAddress field to Initiator Device Table
* Overflow Event data.
* 10-31-07 02.00.04 Added ReasonCode MPI2_EVENT_SAS_INIT_RC_NOT_RESPONDING
* for SAS Initiator Device Status Change Event data.
* Modified Reason Code defines for SAS Topology Change
* List Event data, including adding a bit for PHY Vacant
* status, and adding a mask for the Reason Code.
* Added define for
* MPI2_EVENT_SAS_TOPO_ES_DELAY_NOT_RESPONDING.
* Added define for MPI2_EXT_IMAGE_TYPE_MEGARAID.
* 12-18-07 02.00.05 Added Boot Status defines for the IOCExceptions field of
* the IOCFacts Reply.
* Removed MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER define.
* Moved MPI2_VERSION_UNION to mpi2.h.
* Changed MPI2_EVENT_NOTIFICATION_REQUEST to use masks
* instead of enables, and added SASBroadcastPrimitiveMasks
* field.
* Added Log Entry Added Event and related structure.
* 02-29-08 02.00.06 Added define MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID.
* Removed define MPI2_IOCFACTS_PROTOCOL_SMP_TARGET.
* Added MaxVolumes and MaxPersistentEntries fields to
* IOCFacts reply.
* Added ProtocalFlags and IOCCapabilities fields to
* MPI2_FW_IMAGE_HEADER.
* Removed MPI2_PORTENABLE_FLAGS_ENABLE_SINGLE_PORT.
* 03-03-08 02.00.07 Fixed MPI2_FW_IMAGE_HEADER by changing Reserved26 to
* a U16 (from a U32).
* Removed extra 's' from EventMasks name.
* 06-27-08 02.00.08 Fixed an offset in a comment.
* 10-02-08 02.00.09 Removed SystemReplyFrameSize from MPI2_IOC_INIT_REQUEST.
* Removed CurReplyFrameSize from MPI2_IOC_FACTS_REPLY and
* renamed MinReplyFrameSize to ReplyFrameSize.
* Added MPI2_IOCFACTS_EXCEPT_IR_FOREIGN_CONFIG_MAX.
* Added two new RAIDOperation values for Integrated RAID
* Operations Status Event data.
* Added four new IR Configuration Change List Event data
* ReasonCode values.
* Added two new ReasonCode defines for SAS Device Status
* Change Event data.
* Added three new DiscoveryStatus bits for the SAS
* Discovery event data.
* Added Multiplexing Status Change bit to the PhyStatus
* field of the SAS Topology Change List event data.
* Removed define for MPI2_INIT_IMAGE_BOOTFLAGS_XMEMCOPY.
* BootFlags are now product-specific.
* Added defines for the indivdual signature bytes
* for MPI2_INIT_IMAGE_FOOTER.
* 01-19-09 02.00.10 Added MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY define.
* Added MPI2_EVENT_SAS_DISC_DS_DOWNSTREAM_INITIATOR
* define.
* Added MPI2_EVENT_SAS_DEV_STAT_RC_SATA_INIT_FAILURE
* define.
* Removed MPI2_EVENT_SAS_DISC_DS_SATA_INIT_FAILURE define.
* 05-06-09 02.00.11 Added MPI2_IOCFACTS_CAPABILITY_RAID_ACCELERATOR define.
* Added MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX define.
* Added two new reason codes for SAS Device Status Change
* Event.
* Added new event: SAS PHY Counter.
* 07-30-09 02.00.12 Added GPIO Interrupt event define and structure.
* Added MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER define.
* Added new product id family for 2208.
* 10-28-09 02.00.13 Added HostMSIxVectors field to MPI2_IOC_INIT_REQUEST.
* Added MaxMSIxVectors field to MPI2_IOC_FACTS_REPLY.
* Added MinDevHandle field to MPI2_IOC_FACTS_REPLY.
* Added MPI2_IOCFACTS_CAPABILITY_HOST_BASED_DISCOVERY.
* Added MPI2_EVENT_HOST_BASED_DISCOVERY_PHY define.
* Added MPI2_EVENT_SAS_TOPO_ES_NO_EXPANDER define.
* Added Host Based Discovery Phy Event data.
* Added defines for ProductID Product field
* (MPI2_FW_HEADER_PID_).
* Modified values for SAS ProductID Family
* (MPI2_FW_HEADER_PID_FAMILY_).
* --------------------------------------------------------------------------
mpi2_raid.h
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 08-31-07 02.00.01 Modifications to RAID Action request and reply,
* including the Actions and ActionData.
* 02-29-08 02.00.02 Added MPI2_RAID_ACTION_ADATA_DISABL_FULL_REBUILD.
* 05-21-08 02.00.03 Added MPI2_RAID_VOL_CREATION_NUM_PHYSDISKS so that
* the PhysDisk array in MPI2_RAID_VOLUME_CREATION_STRUCT
* can be sized by the build environment.
* 07-30-09 02.00.04 Added proper define for the Use Default Settings bit of
* VolumeCreationFlags and marked the old one as obsolete.
* --------------------------------------------------------------------------
mpi2_sas.h
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 06-26-07 02.00.01 Added Clear All Persistent Operation to SAS IO Unit
* Control Request.
* 10-02-08 02.00.02 Added Set IOC Parameter Operation to SAS IO Unit Control
* Request.
* 10-28-09 02.00.03 Changed the type of SGL in MPI2_SATA_PASSTHROUGH_REQUEST
* to MPI2_SGE_IO_UNION since it supports chained SGLs.
* --------------------------------------------------------------------------
mpi2_targ.h
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 08-31-07 02.00.01 Added Command Buffer Data Location Address Space bits to
* BufferPostFlags field of CommandBufferPostBase Request.
* 02-29-08 02.00.02 Modified various names to make them 32-character unique.
* 10-02-08 02.00.03 Removed NextCmdBufferOffset from
* MPI2_TARGET_CMD_BUF_POST_BASE_REQUEST.
* Target Status Send Request only takes a single SGE for
* response data.
* --------------------------------------------------------------------------
mpi2_tool.h
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 12-18-07 02.00.01 Added Diagnostic Buffer Post and Diagnostic Release
* structures and defines.
* 02-29-08 02.00.02 Modified various names to make them 32-character unique.
* 05-06-09 02.00.03 Added ISTWI Read Write Tool and Diagnostic CLI Tool.
* 07-30-09 02.00.04 Added ExtendedType field to DiagnosticBufferPost request
* and reply messages.
* Added MPI2_DIAG_BUF_TYPE_EXTENDED.
* Incremented MPI2_DIAG_BUF_TYPE_COUNT.
* --------------------------------------------------------------------------
mpi2_type.h
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* --------------------------------------------------------------------------
mpi2_ra.h
* 05-06-09 02.00.00 Initial version.
* --------------------------------------------------------------------------
mpi2_hbd.h
* 10-28-09 02.00.00 Initial version.
* --------------------------------------------------------------------------
mpi2_history.txt Parts list history
Filename 02.00.14 02.00.13 02.00.12
---------- -------- -------- --------
mpi2.h 02.00.14 02.00.13 02.00.12
mpi2_cnfg.h 02.00.13 02.00.12 02.00.11
mpi2_init.h 02.00.08 02.00.07 02.00.07
mpi2_ioc.h 02.00.13 02.00.12 02.00.11
mpi2_raid.h 02.00.04 02.00.04 02.00.03
mpi2_sas.h 02.00.03 02.00.02 02.00.02
mpi2_targ.h 02.00.03 02.00.03 02.00.03
mpi2_tool.h 02.00.04 02.00.04 02.00.03
mpi2_type.h 02.00.00 02.00.00 02.00.00
mpi2_ra.h 02.00.00 02.00.00 02.00.00
mpi2_hbd.h 02.00.00
Filename 02.00.11 02.00.10 02.00.09 02.00.08 02.00.07 02.00.06
---------- -------- -------- -------- -------- -------- --------
mpi2.h 02.00.11 02.00.10 02.00.09 02.00.08 02.00.07 02.00.06
mpi2_cnfg.h 02.00.10 02.00.09 02.00.08 02.00.07 02.00.06 02.00.06
mpi2_init.h 02.00.06 02.00.06 02.00.05 02.00.05 02.00.04 02.00.03
mpi2_ioc.h 02.00.10 02.00.09 02.00.08 02.00.07 02.00.07 02.00.06
mpi2_raid.h 02.00.03 02.00.03 02.00.03 02.00.03 02.00.02 02.00.02
mpi2_sas.h 02.00.02 02.00.02 02.00.01 02.00.01 02.00.01 02.00.01
mpi2_targ.h 02.00.03 02.00.03 02.00.02 02.00.02 02.00.02 02.00.02
mpi2_tool.h 02.00.02 02.00.02 02.00.02 02.00.02 02.00.02 02.00.02
mpi2_type.h 02.00.00 02.00.00 02.00.00 02.00.00 02.00.00 02.00.00
Filename 02.00.05 02.00.04 02.00.03 02.00.02 02.00.01 02.00.00
---------- -------- -------- -------- -------- -------- --------
mpi2.h 02.00.05 02.00.04 02.00.03 02.00.02 02.00.01 02.00.00
mpi2_cnfg.h 02.00.05 02.00.04 02.00.03 02.00.02 02.00.01 02.00.00
mpi2_init.h 02.00.02 02.00.01 02.00.00 02.00.00 02.00.00 02.00.00
mpi2_ioc.h 02.00.05 02.00.04 02.00.03 02.00.02 02.00.01 02.00.00
mpi2_raid.h 02.00.01 02.00.01 02.00.01 02.00.00 02.00.00 02.00.00
mpi2_sas.h 02.00.01 02.00.01 02.00.01 02.00.01 02.00.00 02.00.00
mpi2_targ.h 02.00.01 02.00.01 02.00.01 02.00.00 02.00.00 02.00.00
mpi2_tool.h 02.00.01 02.00.00 02.00.00 02.00.00 02.00.00 02.00.00
mpi2_type.h 02.00.00 02.00.00 02.00.00 02.00.00 02.00.00 02.00.00

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/* $FreeBSD$ */
/*
* Copyright (c) 2000-2009 LSI Corporation.
*
*
* Name: mpi2_init.h
* Title: MPI SCSI initiator mode messages and structures
* Creation Date: June 23, 2006
*
* mpi2_init.h Version: 02.00.08
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 10-31-07 02.00.01 Fixed name for pMpi2SCSITaskManagementRequest_t.
* 12-18-07 02.00.02 Modified Task Management Target Reset Method defines.
* 02-29-08 02.00.03 Added Query Task Set and Query Unit Attention.
* 03-03-08 02.00.04 Fixed name of struct _MPI2_SCSI_TASK_MANAGE_REPLY.
* 05-21-08 02.00.05 Fixed typo in name of Mpi2SepRequest_t.
* 10-02-08 02.00.06 Removed Untagged and No Disconnect values from SCSI IO
* Control field Task Attribute flags.
* Moved LUN field defines to mpi2.h becasue they are
* common to many structures.
* 05-06-09 02.00.07 Changed task management type of Query Unit Attention to
* Query Asynchronous Event.
* Defined two new bits in the SlotStatus field of the SCSI
* Enclosure Processor Request and Reply.
* 10-28-09 02.00.08 Added defines for decoding the ResponseInfo bytes for
* both SCSI IO Error Reply and SCSI Task Management Reply.
* Added ResponseInfo field to MPI2_SCSI_TASK_MANAGE_REPLY.
* Added MPI2_SCSITASKMGMT_RSP_TM_OVERLAPPED_TAG define.
* --------------------------------------------------------------------------
*/
#ifndef MPI2_INIT_H
#define MPI2_INIT_H
/*****************************************************************************
*
* SCSI Initiator Messages
*
*****************************************************************************/
/****************************************************************************
* SCSI IO messages and associated structures
****************************************************************************/
typedef struct
{
U8 CDB[20]; /* 0x00 */
U32 PrimaryReferenceTag; /* 0x14 */
U16 PrimaryApplicationTag; /* 0x18 */
U16 PrimaryApplicationTagMask; /* 0x1A */
U32 TransferLength; /* 0x1C */
} MPI2_SCSI_IO_CDB_EEDP32, MPI2_POINTER PTR_MPI2_SCSI_IO_CDB_EEDP32,
Mpi2ScsiIoCdbEedp32_t, MPI2_POINTER pMpi2ScsiIoCdbEedp32_t;
/* TBD: I don't think this is needed for MPI2/Gen2 */
#if 0
typedef struct
{
U8 CDB[16]; /* 0x00 */
U32 DataLength; /* 0x10 */
U32 PrimaryReferenceTag; /* 0x14 */
U16 PrimaryApplicationTag; /* 0x18 */
U16 PrimaryApplicationTagMask; /* 0x1A */
U32 TransferLength; /* 0x1C */
} MPI2_SCSI_IO32_CDB_EEDP16, MPI2_POINTER PTR_MPI2_SCSI_IO32_CDB_EEDP16,
Mpi2ScsiIo32CdbEedp16_t, MPI2_POINTER pMpi2ScsiIo32CdbEedp16_t;
#endif
typedef union
{
U8 CDB32[32];
MPI2_SCSI_IO_CDB_EEDP32 EEDP32;
MPI2_SGE_SIMPLE_UNION SGE;
} MPI2_SCSI_IO_CDB_UNION, MPI2_POINTER PTR_MPI2_SCSI_IO_CDB_UNION,
Mpi2ScsiIoCdb_t, MPI2_POINTER pMpi2ScsiIoCdb_t;
/* SCSI IO Request Message */
typedef struct _MPI2_SCSI_IO_REQUEST
{
U16 DevHandle; /* 0x00 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved1; /* 0x04 */
U8 Reserved2; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U32 SenseBufferLowAddress; /* 0x0C */
U16 SGLFlags; /* 0x10 */
U8 SenseBufferLength; /* 0x12 */
U8 Reserved4; /* 0x13 */
U8 SGLOffset0; /* 0x14 */
U8 SGLOffset1; /* 0x15 */
U8 SGLOffset2; /* 0x16 */
U8 SGLOffset3; /* 0x17 */
U32 SkipCount; /* 0x18 */
U32 DataLength; /* 0x1C */
U32 BidirectionalDataLength; /* 0x20 */
U16 IoFlags; /* 0x24 */
U16 EEDPFlags; /* 0x26 */
U32 EEDPBlockSize; /* 0x28 */
U32 SecondaryReferenceTag; /* 0x2C */
U16 SecondaryApplicationTag; /* 0x30 */
U16 ApplicationTagTranslationMask; /* 0x32 */
U8 LUN[8]; /* 0x34 */
U32 Control; /* 0x3C */
MPI2_SCSI_IO_CDB_UNION CDB; /* 0x40 */
MPI2_SGE_IO_UNION SGL; /* 0x60 */
} MPI2_SCSI_IO_REQUEST, MPI2_POINTER PTR_MPI2_SCSI_IO_REQUEST,
Mpi2SCSIIORequest_t, MPI2_POINTER pMpi2SCSIIORequest_t;
/* SCSI IO MsgFlags bits */
/* MsgFlags for SenseBufferAddressSpace */
#define MPI2_SCSIIO_MSGFLAGS_MASK_SENSE_ADDR (0x0C)
#define MPI2_SCSIIO_MSGFLAGS_SYSTEM_SENSE_ADDR (0x00)
#define MPI2_SCSIIO_MSGFLAGS_IOCDDR_SENSE_ADDR (0x04)
#define MPI2_SCSIIO_MSGFLAGS_IOCPLB_SENSE_ADDR (0x08)
#define MPI2_SCSIIO_MSGFLAGS_IOCPLBNTA_SENSE_ADDR (0x0C)
/* SCSI IO SGLFlags bits */
/* base values for Data Location Address Space */
#define MPI2_SCSIIO_SGLFLAGS_ADDR_MASK (0x0C)
#define MPI2_SCSIIO_SGLFLAGS_SYSTEM_ADDR (0x00)
#define MPI2_SCSIIO_SGLFLAGS_IOCDDR_ADDR (0x04)
#define MPI2_SCSIIO_SGLFLAGS_IOCPLB_ADDR (0x08)
#define MPI2_SCSIIO_SGLFLAGS_IOCPLBNTA_ADDR (0x0C)
/* base values for Type */
#define MPI2_SCSIIO_SGLFLAGS_TYPE_MASK (0x03)
#define MPI2_SCSIIO_SGLFLAGS_TYPE_MPI (0x00)
#define MPI2_SCSIIO_SGLFLAGS_TYPE_IEEE32 (0x01)
#define MPI2_SCSIIO_SGLFLAGS_TYPE_IEEE64 (0x02)
/* shift values for each sub-field */
#define MPI2_SCSIIO_SGLFLAGS_SGL3_SHIFT (12)
#define MPI2_SCSIIO_SGLFLAGS_SGL2_SHIFT (8)
#define MPI2_SCSIIO_SGLFLAGS_SGL1_SHIFT (4)
#define MPI2_SCSIIO_SGLFLAGS_SGL0_SHIFT (0)
/* SCSI IO IoFlags bits */
/* Large CDB Address Space */
#define MPI2_SCSIIO_CDB_ADDR_MASK (0x6000)
#define MPI2_SCSIIO_CDB_ADDR_SYSTEM (0x0000)
#define MPI2_SCSIIO_CDB_ADDR_IOCDDR (0x2000)
#define MPI2_SCSIIO_CDB_ADDR_IOCPLB (0x4000)
#define MPI2_SCSIIO_CDB_ADDR_IOCPLBNTA (0x6000)
#define MPI2_SCSIIO_IOFLAGS_LARGE_CDB (0x1000)
#define MPI2_SCSIIO_IOFLAGS_BIDIRECTIONAL (0x0800)
#define MPI2_SCSIIO_IOFLAGS_MULTICAST (0x0400)
#define MPI2_SCSIIO_IOFLAGS_CMD_DETERMINES_DATA_DIR (0x0200)
#define MPI2_SCSIIO_IOFLAGS_CDBLENGTH_MASK (0x01FF)
/* SCSI IO EEDPFlags bits */
#define MPI2_SCSIIO_EEDPFLAGS_INC_PRI_REFTAG (0x8000)
#define MPI2_SCSIIO_EEDPFLAGS_INC_SEC_REFTAG (0x4000)
#define MPI2_SCSIIO_EEDPFLAGS_INC_PRI_APPTAG (0x2000)
#define MPI2_SCSIIO_EEDPFLAGS_INC_SEC_APPTAG (0x1000)
#define MPI2_SCSIIO_EEDPFLAGS_CHECK_REFTAG (0x0400)
#define MPI2_SCSIIO_EEDPFLAGS_CHECK_APPTAG (0x0200)
#define MPI2_SCSIIO_EEDPFLAGS_CHECK_GUARD (0x0100)
#define MPI2_SCSIIO_EEDPFLAGS_PASSTHRU_REFTAG (0x0008)
#define MPI2_SCSIIO_EEDPFLAGS_MASK_OP (0x0007)
#define MPI2_SCSIIO_EEDPFLAGS_NOOP_OP (0x0000)
#define MPI2_SCSIIO_EEDPFLAGS_CHECK_OP (0x0001)
#define MPI2_SCSIIO_EEDPFLAGS_STRIP_OP (0x0002)
#define MPI2_SCSIIO_EEDPFLAGS_CHECK_REMOVE_OP (0x0003)
#define MPI2_SCSIIO_EEDPFLAGS_INSERT_OP (0x0004)
#define MPI2_SCSIIO_EEDPFLAGS_REPLACE_OP (0x0006)
#define MPI2_SCSIIO_EEDPFLAGS_CHECK_REGEN_OP (0x0007)
/* SCSI IO LUN fields: use MPI2_LUN_ from mpi2.h */
/* SCSI IO Control bits */
#define MPI2_SCSIIO_CONTROL_ADDCDBLEN_MASK (0xFC000000)
#define MPI2_SCSIIO_CONTROL_ADDCDBLEN_SHIFT (26)
#define MPI2_SCSIIO_CONTROL_DATADIRECTION_MASK (0x03000000)
#define MPI2_SCSIIO_CONTROL_NODATATRANSFER (0x00000000)
#define MPI2_SCSIIO_CONTROL_WRITE (0x01000000)
#define MPI2_SCSIIO_CONTROL_READ (0x02000000)
#define MPI2_SCSIIO_CONTROL_BIDIRECTIONAL (0x03000000)
#define MPI2_SCSIIO_CONTROL_TASKPRI_MASK (0x00007800)
#define MPI2_SCSIIO_CONTROL_TASKPRI_SHIFT (11)
#define MPI2_SCSIIO_CONTROL_TASKATTRIBUTE_MASK (0x00000700)
#define MPI2_SCSIIO_CONTROL_SIMPLEQ (0x00000000)
#define MPI2_SCSIIO_CONTROL_HEADOFQ (0x00000100)
#define MPI2_SCSIIO_CONTROL_ORDEREDQ (0x00000200)
#define MPI2_SCSIIO_CONTROL_ACAQ (0x00000400)
#define MPI2_SCSIIO_CONTROL_TLR_MASK (0x000000C0)
#define MPI2_SCSIIO_CONTROL_NO_TLR (0x00000000)
#define MPI2_SCSIIO_CONTROL_TLR_ON (0x00000040)
#define MPI2_SCSIIO_CONTROL_TLR_OFF (0x00000080)
/* SCSI IO Error Reply Message */
typedef struct _MPI2_SCSI_IO_REPLY
{
U16 DevHandle; /* 0x00 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved1; /* 0x04 */
U8 Reserved2; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U8 SCSIStatus; /* 0x0C */
U8 SCSIState; /* 0x0D */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U32 TransferCount; /* 0x14 */
U32 SenseCount; /* 0x18 */
U32 ResponseInfo; /* 0x1C */
U16 TaskTag; /* 0x20 */
U16 Reserved4; /* 0x22 */
U32 BidirectionalTransferCount; /* 0x24 */
U32 Reserved5; /* 0x28 */
U32 Reserved6; /* 0x2C */
} MPI2_SCSI_IO_REPLY, MPI2_POINTER PTR_MPI2_SCSI_IO_REPLY,
Mpi2SCSIIOReply_t, MPI2_POINTER pMpi2SCSIIOReply_t;
/* SCSI IO Reply SCSIStatus values (SAM-4 status codes) */
#define MPI2_SCSI_STATUS_GOOD (0x00)
#define MPI2_SCSI_STATUS_CHECK_CONDITION (0x02)
#define MPI2_SCSI_STATUS_CONDITION_MET (0x04)
#define MPI2_SCSI_STATUS_BUSY (0x08)
#define MPI2_SCSI_STATUS_INTERMEDIATE (0x10)
#define MPI2_SCSI_STATUS_INTERMEDIATE_CONDMET (0x14)
#define MPI2_SCSI_STATUS_RESERVATION_CONFLICT (0x18)
#define MPI2_SCSI_STATUS_COMMAND_TERMINATED (0x22) /* obsolete */
#define MPI2_SCSI_STATUS_TASK_SET_FULL (0x28)
#define MPI2_SCSI_STATUS_ACA_ACTIVE (0x30)
#define MPI2_SCSI_STATUS_TASK_ABORTED (0x40)
/* SCSI IO Reply SCSIState flags */
#define MPI2_SCSI_STATE_RESPONSE_INFO_VALID (0x10)
#define MPI2_SCSI_STATE_TERMINATED (0x08)
#define MPI2_SCSI_STATE_NO_SCSI_STATUS (0x04)
#define MPI2_SCSI_STATE_AUTOSENSE_FAILED (0x02)
#define MPI2_SCSI_STATE_AUTOSENSE_VALID (0x01)
/* masks and shifts for the ResponseInfo field */
#define MPI2_SCSI_RI_MASK_REASONCODE (0x000000FF)
#define MPI2_SCSI_RI_SHIFT_REASONCODE (0)
#define MPI2_SCSI_TASKTAG_UNKNOWN (0xFFFF)
/****************************************************************************
* SCSI Task Management messages
****************************************************************************/
/* SCSI Task Management Request Message */
typedef struct _MPI2_SCSI_TASK_MANAGE_REQUEST
{
U16 DevHandle; /* 0x00 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U8 Reserved1; /* 0x04 */
U8 TaskType; /* 0x05 */
U8 Reserved2; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U8 LUN[8]; /* 0x0C */
U32 Reserved4[7]; /* 0x14 */
U16 TaskMID; /* 0x30 */
U16 Reserved5; /* 0x32 */
} MPI2_SCSI_TASK_MANAGE_REQUEST,
MPI2_POINTER PTR_MPI2_SCSI_TASK_MANAGE_REQUEST,
Mpi2SCSITaskManagementRequest_t,
MPI2_POINTER pMpi2SCSITaskManagementRequest_t;
/* TaskType values */
#define MPI2_SCSITASKMGMT_TASKTYPE_ABORT_TASK (0x01)
#define MPI2_SCSITASKMGMT_TASKTYPE_ABRT_TASK_SET (0x02)
#define MPI2_SCSITASKMGMT_TASKTYPE_TARGET_RESET (0x03)
#define MPI2_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET (0x05)
#define MPI2_SCSITASKMGMT_TASKTYPE_CLEAR_TASK_SET (0x06)
#define MPI2_SCSITASKMGMT_TASKTYPE_QUERY_TASK (0x07)
#define MPI2_SCSITASKMGMT_TASKTYPE_CLR_ACA (0x08)
#define MPI2_SCSITASKMGMT_TASKTYPE_QRY_TASK_SET (0x09)
#define MPI2_SCSITASKMGMT_TASKTYPE_QRY_ASYNC_EVENT (0x0A)
/* obsolete TaskType name */
#define MPI2_SCSITASKMGMT_TASKTYPE_QRY_UNIT_ATTENTION (MPI2_SCSITASKMGMT_TASKTYPE_QRY_ASYNC_EVENT)
/* MsgFlags bits */
#define MPI2_SCSITASKMGMT_MSGFLAGS_MASK_TARGET_RESET (0x18)
#define MPI2_SCSITASKMGMT_MSGFLAGS_LINK_RESET (0x00)
#define MPI2_SCSITASKMGMT_MSGFLAGS_NEXUS_RESET_SRST (0x08)
#define MPI2_SCSITASKMGMT_MSGFLAGS_SAS_HARD_LINK_RESET (0x10)
#define MPI2_SCSITASKMGMT_MSGFLAGS_DO_NOT_SEND_TASK_IU (0x01)
/* SCSI Task Management Reply Message */
typedef struct _MPI2_SCSI_TASK_MANAGE_REPLY
{
U16 DevHandle; /* 0x00 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U8 ResponseCode; /* 0x04 */
U8 TaskType; /* 0x05 */
U8 Reserved1; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved2; /* 0x0A */
U16 Reserved3; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U32 TerminationCount; /* 0x14 */
U32 ResponseInfo; /* 0x18 */
} MPI2_SCSI_TASK_MANAGE_REPLY,
MPI2_POINTER PTR_MPI2_SCSI_TASK_MANAGE_REPLY,
Mpi2SCSITaskManagementReply_t, MPI2_POINTER pMpi2SCSIManagementReply_t;
/* ResponseCode values */
#define MPI2_SCSITASKMGMT_RSP_TM_COMPLETE (0x00)
#define MPI2_SCSITASKMGMT_RSP_INVALID_FRAME (0x02)
#define MPI2_SCSITASKMGMT_RSP_TM_NOT_SUPPORTED (0x04)
#define MPI2_SCSITASKMGMT_RSP_TM_FAILED (0x05)
#define MPI2_SCSITASKMGMT_RSP_TM_SUCCEEDED (0x08)
#define MPI2_SCSITASKMGMT_RSP_TM_INVALID_LUN (0x09)
#define MPI2_SCSITASKMGMT_RSP_TM_OVERLAPPED_TAG (0x0A)
#define MPI2_SCSITASKMGMT_RSP_IO_QUEUED_ON_IOC (0x80)
/* masks and shifts for the ResponseInfo field */
#define MPI2_SCSITASKMGMT_RI_MASK_REASONCODE (0x000000FF)
#define MPI2_SCSITASKMGMT_RI_SHIFT_REASONCODE (0)
#define MPI2_SCSITASKMGMT_RI_MASK_ARI2 (0x0000FF00)
#define MPI2_SCSITASKMGMT_RI_SHIFT_ARI2 (8)
#define MPI2_SCSITASKMGMT_RI_MASK_ARI1 (0x00FF0000)
#define MPI2_SCSITASKMGMT_RI_SHIFT_ARI1 (16)
#define MPI2_SCSITASKMGMT_RI_MASK_ARI0 (0xFF000000)
#define MPI2_SCSITASKMGMT_RI_SHIFT_ARI0 (24)
/****************************************************************************
* SCSI Enclosure Processor messages
****************************************************************************/
/* SCSI Enclosure Processor Request Message */
typedef struct _MPI2_SEP_REQUEST
{
U16 DevHandle; /* 0x00 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U8 Action; /* 0x04 */
U8 Flags; /* 0x05 */
U8 Reserved1; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved2; /* 0x0A */
U32 SlotStatus; /* 0x0C */
U32 Reserved3; /* 0x10 */
U32 Reserved4; /* 0x14 */
U32 Reserved5; /* 0x18 */
U16 Slot; /* 0x1C */
U16 EnclosureHandle; /* 0x1E */
} MPI2_SEP_REQUEST, MPI2_POINTER PTR_MPI2_SEP_REQUEST,
Mpi2SepRequest_t, MPI2_POINTER pMpi2SepRequest_t;
/* Action defines */
#define MPI2_SEP_REQ_ACTION_WRITE_STATUS (0x00)
#define MPI2_SEP_REQ_ACTION_READ_STATUS (0x01)
/* Flags defines */
#define MPI2_SEP_REQ_FLAGS_DEVHANDLE_ADDRESS (0x00)
#define MPI2_SEP_REQ_FLAGS_ENCLOSURE_SLOT_ADDRESS (0x01)
/* SlotStatus defines */
#define MPI2_SEP_REQ_SLOTSTATUS_REQUEST_REMOVE (0x00040000)
#define MPI2_SEP_REQ_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000)
#define MPI2_SEP_REQ_SLOTSTATUS_REBUILD_STOPPED (0x00000200)
#define MPI2_SEP_REQ_SLOTSTATUS_HOT_SPARE (0x00000100)
#define MPI2_SEP_REQ_SLOTSTATUS_UNCONFIGURED (0x00000080)
#define MPI2_SEP_REQ_SLOTSTATUS_PREDICTED_FAULT (0x00000040)
#define MPI2_SEP_REQ_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010)
#define MPI2_SEP_REQ_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008)
#define MPI2_SEP_REQ_SLOTSTATUS_DEV_REBUILDING (0x00000004)
#define MPI2_SEP_REQ_SLOTSTATUS_DEV_FAULTY (0x00000002)
#define MPI2_SEP_REQ_SLOTSTATUS_NO_ERROR (0x00000001)
/* SCSI Enclosure Processor Reply Message */
typedef struct _MPI2_SEP_REPLY
{
U16 DevHandle; /* 0x00 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U8 Action; /* 0x04 */
U8 Flags; /* 0x05 */
U8 Reserved1; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved2; /* 0x0A */
U16 Reserved3; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U32 SlotStatus; /* 0x14 */
U32 Reserved4; /* 0x18 */
U16 Slot; /* 0x1C */
U16 EnclosureHandle; /* 0x1E */
} MPI2_SEP_REPLY, MPI2_POINTER PTR_MPI2_SEP_REPLY,
Mpi2SepReply_t, MPI2_POINTER pMpi2SepReply_t;
/* SlotStatus defines */
#define MPI2_SEP_REPLY_SLOTSTATUS_REMOVE_READY (0x00040000)
#define MPI2_SEP_REPLY_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000)
#define MPI2_SEP_REPLY_SLOTSTATUS_REBUILD_STOPPED (0x00000200)
#define MPI2_SEP_REPLY_SLOTSTATUS_HOT_SPARE (0x00000100)
#define MPI2_SEP_REPLY_SLOTSTATUS_UNCONFIGURED (0x00000080)
#define MPI2_SEP_REPLY_SLOTSTATUS_PREDICTED_FAULT (0x00000040)
#define MPI2_SEP_REPLY_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010)
#define MPI2_SEP_REPLY_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008)
#define MPI2_SEP_REPLY_SLOTSTATUS_DEV_REBUILDING (0x00000004)
#define MPI2_SEP_REPLY_SLOTSTATUS_DEV_FAULTY (0x00000002)
#define MPI2_SEP_REPLY_SLOTSTATUS_NO_ERROR (0x00000001)
#endif

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/* $FreeBSD$ */
/*
* Copyright (c) 2009 LSI Corporation.
*
*
* Name: mpi2_ra.h
* Title: MPI RAID Accelerator messages and structures
* Creation Date: April 13, 2009
*
* mpi2_ra.h Version: 02.00.00
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 05-06-09 02.00.00 Initial version.
* --------------------------------------------------------------------------
*/
#ifndef MPI2_RA_H
#define MPI2_RA_H
/* generic structure for RAID Accelerator Control Block */
typedef struct _MPI2_RAID_ACCELERATOR_CONTROL_BLOCK
{
U32 Reserved[8]; /* 0x00 */
U32 RaidAcceleratorCDB[1]; /* 0x20 */
} MPI2_RAID_ACCELERATOR_CONTROL_BLOCK,
MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_CONTROL_BLOCK,
Mpi2RAIDAcceleratorControlBlock_t,
MPI2_POINTER pMpi2RAIDAcceleratorControlBlock_t;
/******************************************************************************
*
* RAID Accelerator Messages
*
*******************************************************************************/
/* RAID Accelerator Request Message */
typedef struct _MPI2_RAID_ACCELERATOR_REQUEST
{
U16 Reserved0; /* 0x00 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved1; /* 0x04 */
U8 Reserved2; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U64 RaidAcceleratorControlBlockAddress; /* 0x0C */
U8 DmaEngineNumber; /* 0x14 */
U8 Reserved4; /* 0x15 */
U16 Reserved5; /* 0x16 */
U32 Reserved6; /* 0x18 */
U32 Reserved7; /* 0x1C */
U32 Reserved8; /* 0x20 */
} MPI2_RAID_ACCELERATOR_REQUEST, MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_REQUEST,
Mpi2RAIDAcceleratorRequest_t, MPI2_POINTER pMpi2RAIDAcceleratorRequest_t;
/* RAID Accelerator Error Reply Message */
typedef struct _MPI2_RAID_ACCELERATOR_REPLY
{
U16 Reserved0; /* 0x00 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved1; /* 0x04 */
U8 Reserved2; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U16 Reserved4; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U32 ProductSpecificData[3]; /* 0x14 */
} MPI2_RAID_ACCELERATOR_REPLY, MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_REPLY,
Mpi2RAIDAcceleratorReply_t, MPI2_POINTER pMpi2RAIDAcceleratorReply_t;
#endif

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/* $FreeBSD$ */
/*
* Copyright (c) 2000-2008 LSI Corporation.
*
*
* Name: mpi2_raid.h
* Title: MPI Integrated RAID messages and structures
* Creation Date: April 26, 2007
*
* mpi2_raid.h Version: 02.00.04
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 08-31-07 02.00.01 Modifications to RAID Action request and reply,
* including the Actions and ActionData.
* 02-29-08 02.00.02 Added MPI2_RAID_ACTION_ADATA_DISABL_FULL_REBUILD.
* 05-21-08 02.00.03 Added MPI2_RAID_VOL_CREATION_NUM_PHYSDISKS so that
* the PhysDisk array in MPI2_RAID_VOLUME_CREATION_STRUCT
* can be sized by the build environment.
* 07-30-09 02.00.04 Added proper define for the Use Default Settings bit of
* VolumeCreationFlags and marked the old one as obsolete.
* --------------------------------------------------------------------------
*/
#ifndef MPI2_RAID_H
#define MPI2_RAID_H
/*****************************************************************************
*
* Integrated RAID Messages
*
*****************************************************************************/
/****************************************************************************
* RAID Action messages
****************************************************************************/
/* ActionDataWord defines for use with MPI2_RAID_ACTION_DELETE_VOLUME action */
#define MPI2_RAID_ACTION_ADATA_KEEP_LBA0 (0x00000000)
#define MPI2_RAID_ACTION_ADATA_ZERO_LBA0 (0x00000001)
/* use MPI2_RAIDVOL0_SETTING_ defines from mpi2_cnfg.h for MPI2_RAID_ACTION_CHANGE_VOL_WRITE_CACHE action */
/* ActionDataWord defines for use with MPI2_RAID_ACTION_DISABLE_ALL_VOLUMES action */
#define MPI2_RAID_ACTION_ADATA_DISABL_FULL_REBUILD (0x00000001)
/* ActionDataWord for MPI2_RAID_ACTION_SET_RAID_FUNCTION_RATE Action */
typedef struct _MPI2_RAID_ACTION_RATE_DATA
{
U8 RateToChange; /* 0x00 */
U8 RateOrMode; /* 0x01 */
U16 DataScrubDuration; /* 0x02 */
} MPI2_RAID_ACTION_RATE_DATA, MPI2_POINTER PTR_MPI2_RAID_ACTION_RATE_DATA,
Mpi2RaidActionRateData_t, MPI2_POINTER pMpi2RaidActionRateData_t;
#define MPI2_RAID_ACTION_SET_RATE_RESYNC (0x00)
#define MPI2_RAID_ACTION_SET_RATE_DATA_SCRUB (0x01)
#define MPI2_RAID_ACTION_SET_RATE_POWERSAVE_MODE (0x02)
/* ActionDataWord for MPI2_RAID_ACTION_START_RAID_FUNCTION Action */
typedef struct _MPI2_RAID_ACTION_START_RAID_FUNCTION
{
U8 RAIDFunction; /* 0x00 */
U8 Flags; /* 0x01 */
U16 Reserved1; /* 0x02 */
} MPI2_RAID_ACTION_START_RAID_FUNCTION,
MPI2_POINTER PTR_MPI2_RAID_ACTION_START_RAID_FUNCTION,
Mpi2RaidActionStartRaidFunction_t,
MPI2_POINTER pMpi2RaidActionStartRaidFunction_t;
/* defines for the RAIDFunction field */
#define MPI2_RAID_ACTION_START_BACKGROUND_INIT (0x00)
#define MPI2_RAID_ACTION_START_ONLINE_CAP_EXPANSION (0x01)
#define MPI2_RAID_ACTION_START_CONSISTENCY_CHECK (0x02)
/* defines for the Flags field */
#define MPI2_RAID_ACTION_START_NEW (0x00)
#define MPI2_RAID_ACTION_START_RESUME (0x01)
/* ActionDataWord for MPI2_RAID_ACTION_STOP_RAID_FUNCTION Action */
typedef struct _MPI2_RAID_ACTION_STOP_RAID_FUNCTION
{
U8 RAIDFunction; /* 0x00 */
U8 Flags; /* 0x01 */
U16 Reserved1; /* 0x02 */
} MPI2_RAID_ACTION_STOP_RAID_FUNCTION,
MPI2_POINTER PTR_MPI2_RAID_ACTION_STOP_RAID_FUNCTION,
Mpi2RaidActionStopRaidFunction_t,
MPI2_POINTER pMpi2RaidActionStopRaidFunction_t;
/* defines for the RAIDFunction field */
#define MPI2_RAID_ACTION_STOP_BACKGROUND_INIT (0x00)
#define MPI2_RAID_ACTION_STOP_ONLINE_CAP_EXPANSION (0x01)
#define MPI2_RAID_ACTION_STOP_CONSISTENCY_CHECK (0x02)
/* defines for the Flags field */
#define MPI2_RAID_ACTION_STOP_ABORT (0x00)
#define MPI2_RAID_ACTION_STOP_PAUSE (0x01)
/* ActionDataWord for MPI2_RAID_ACTION_CREATE_HOT_SPARE Action */
typedef struct _MPI2_RAID_ACTION_HOT_SPARE
{
U8 HotSparePool; /* 0x00 */
U8 Reserved1; /* 0x01 */
U16 DevHandle; /* 0x02 */
} MPI2_RAID_ACTION_HOT_SPARE, MPI2_POINTER PTR_MPI2_RAID_ACTION_HOT_SPARE,
Mpi2RaidActionHotSpare_t, MPI2_POINTER pMpi2RaidActionHotSpare_t;
/* ActionDataWord for MPI2_RAID_ACTION_DEVICE_FW_UPDATE_MODE Action */
typedef struct _MPI2_RAID_ACTION_FW_UPDATE_MODE
{
U8 Flags; /* 0x00 */
U8 DeviceFirmwareUpdateModeTimeout; /* 0x01 */
U16 Reserved1; /* 0x02 */
} MPI2_RAID_ACTION_FW_UPDATE_MODE,
MPI2_POINTER PTR_MPI2_RAID_ACTION_FW_UPDATE_MODE,
Mpi2RaidActionFwUpdateMode_t, MPI2_POINTER pMpi2RaidActionFwUpdateMode_t;
/* ActionDataWord defines for use with MPI2_RAID_ACTION_DEVICE_FW_UPDATE_MODE action */
#define MPI2_RAID_ACTION_ADATA_DISABLE_FW_UPDATE (0x00)
#define MPI2_RAID_ACTION_ADATA_ENABLE_FW_UPDATE (0x01)
typedef union _MPI2_RAID_ACTION_DATA
{
U32 Word;
MPI2_RAID_ACTION_RATE_DATA Rates;
MPI2_RAID_ACTION_START_RAID_FUNCTION StartRaidFunction;
MPI2_RAID_ACTION_STOP_RAID_FUNCTION StopRaidFunction;
MPI2_RAID_ACTION_HOT_SPARE HotSpare;
MPI2_RAID_ACTION_FW_UPDATE_MODE FwUpdateMode;
} MPI2_RAID_ACTION_DATA, MPI2_POINTER PTR_MPI2_RAID_ACTION_DATA,
Mpi2RaidActionData_t, MPI2_POINTER pMpi2RaidActionData_t;
/* RAID Action Request Message */
typedef struct _MPI2_RAID_ACTION_REQUEST
{
U8 Action; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 VolDevHandle; /* 0x04 */
U8 PhysDiskNum; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved2; /* 0x0A */
U32 Reserved3; /* 0x0C */
MPI2_RAID_ACTION_DATA ActionDataWord; /* 0x10 */
MPI2_SGE_SIMPLE_UNION ActionDataSGE; /* 0x14 */
} MPI2_RAID_ACTION_REQUEST, MPI2_POINTER PTR_MPI2_RAID_ACTION_REQUEST,
Mpi2RaidActionRequest_t, MPI2_POINTER pMpi2RaidActionRequest_t;
/* RAID Action request Action values */
#define MPI2_RAID_ACTION_INDICATOR_STRUCT (0x01)
#define MPI2_RAID_ACTION_CREATE_VOLUME (0x02)
#define MPI2_RAID_ACTION_DELETE_VOLUME (0x03)
#define MPI2_RAID_ACTION_DISABLE_ALL_VOLUMES (0x04)
#define MPI2_RAID_ACTION_ENABLE_ALL_VOLUMES (0x05)
#define MPI2_RAID_ACTION_PHYSDISK_OFFLINE (0x0A)
#define MPI2_RAID_ACTION_PHYSDISK_ONLINE (0x0B)
#define MPI2_RAID_ACTION_FAIL_PHYSDISK (0x0F)
#define MPI2_RAID_ACTION_ACTIVATE_VOLUME (0x11)
#define MPI2_RAID_ACTION_DEVICE_FW_UPDATE_MODE (0x15)
#define MPI2_RAID_ACTION_CHANGE_VOL_WRITE_CACHE (0x17)
#define MPI2_RAID_ACTION_SET_VOLUME_NAME (0x18)
#define MPI2_RAID_ACTION_SET_RAID_FUNCTION_RATE (0x19)
#define MPI2_RAID_ACTION_ENABLE_FAILED_VOLUME (0x1C)
#define MPI2_RAID_ACTION_CREATE_HOT_SPARE (0x1D)
#define MPI2_RAID_ACTION_DELETE_HOT_SPARE (0x1E)
#define MPI2_RAID_ACTION_SYSTEM_SHUTDOWN_INITIATED (0x20)
#define MPI2_RAID_ACTION_START_RAID_FUNCTION (0x21)
#define MPI2_RAID_ACTION_STOP_RAID_FUNCTION (0x22)
/* RAID Volume Creation Structure */
/*
* The following define can be customized for the targeted product.
*/
#ifndef MPI2_RAID_VOL_CREATION_NUM_PHYSDISKS
#define MPI2_RAID_VOL_CREATION_NUM_PHYSDISKS (1)
#endif
typedef struct _MPI2_RAID_VOLUME_PHYSDISK
{
U8 RAIDSetNum; /* 0x00 */
U8 PhysDiskMap; /* 0x01 */
U16 PhysDiskDevHandle; /* 0x02 */
} MPI2_RAID_VOLUME_PHYSDISK, MPI2_POINTER PTR_MPI2_RAID_VOLUME_PHYSDISK,
Mpi2RaidVolumePhysDisk_t, MPI2_POINTER pMpi2RaidVolumePhysDisk_t;
/* defines for the PhysDiskMap field */
#define MPI2_RAIDACTION_PHYSDISK_PRIMARY (0x01)
#define MPI2_RAIDACTION_PHYSDISK_SECONDARY (0x02)
typedef struct _MPI2_RAID_VOLUME_CREATION_STRUCT
{
U8 NumPhysDisks; /* 0x00 */
U8 VolumeType; /* 0x01 */
U16 Reserved1; /* 0x02 */
U32 VolumeCreationFlags; /* 0x04 */
U32 VolumeSettings; /* 0x08 */
U8 Reserved2; /* 0x0C */
U8 ResyncRate; /* 0x0D */
U16 DataScrubDuration; /* 0x0E */
U64 VolumeMaxLBA; /* 0x10 */
U32 StripeSize; /* 0x18 */
U8 Name[16]; /* 0x1C */
MPI2_RAID_VOLUME_PHYSDISK PhysDisk[MPI2_RAID_VOL_CREATION_NUM_PHYSDISKS];/* 0x2C */
} MPI2_RAID_VOLUME_CREATION_STRUCT,
MPI2_POINTER PTR_MPI2_RAID_VOLUME_CREATION_STRUCT,
Mpi2RaidVolumeCreationStruct_t, MPI2_POINTER pMpi2RaidVolumeCreationStruct_t;
/* use MPI2_RAID_VOL_TYPE_ defines from mpi2_cnfg.h for VolumeType */
/* defines for the VolumeCreationFlags field */
#define MPI2_RAID_VOL_CREATION_DEFAULT_SETTINGS (0x80000000)
#define MPI2_RAID_VOL_CREATION_BACKGROUND_INIT (0x00000004)
#define MPI2_RAID_VOL_CREATION_LOW_LEVEL_INIT (0x00000002)
#define MPI2_RAID_VOL_CREATION_MIGRATE_DATA (0x00000001)
/* The following is an obsolete define.
* It must be shifted left 24 bits in order to set the proper bit.
*/
#define MPI2_RAID_VOL_CREATION_USE_DEFAULT_SETTINGS (0x80)
/* RAID Online Capacity Expansion Structure */
typedef struct _MPI2_RAID_ONLINE_CAPACITY_EXPANSION
{
U32 Flags; /* 0x00 */
U16 DevHandle0; /* 0x04 */
U16 Reserved1; /* 0x06 */
U16 DevHandle1; /* 0x08 */
U16 Reserved2; /* 0x0A */
} MPI2_RAID_ONLINE_CAPACITY_EXPANSION,
MPI2_POINTER PTR_MPI2_RAID_ONLINE_CAPACITY_EXPANSION,
Mpi2RaidOnlineCapacityExpansion_t,
MPI2_POINTER pMpi2RaidOnlineCapacityExpansion_t;
/* RAID Volume Indicator Structure */
typedef struct _MPI2_RAID_VOL_INDICATOR
{
U64 TotalBlocks; /* 0x00 */
U64 BlocksRemaining; /* 0x08 */
U32 Flags; /* 0x10 */
} MPI2_RAID_VOL_INDICATOR, MPI2_POINTER PTR_MPI2_RAID_VOL_INDICATOR,
Mpi2RaidVolIndicator_t, MPI2_POINTER pMpi2RaidVolIndicator_t;
/* defines for RAID Volume Indicator Flags field */
#define MPI2_RAID_VOL_FLAGS_OP_MASK (0x0000000F)
#define MPI2_RAID_VOL_FLAGS_OP_BACKGROUND_INIT (0x00000000)
#define MPI2_RAID_VOL_FLAGS_OP_ONLINE_CAP_EXPANSION (0x00000001)
#define MPI2_RAID_VOL_FLAGS_OP_CONSISTENCY_CHECK (0x00000002)
#define MPI2_RAID_VOL_FLAGS_OP_RESYNC (0x00000003)
/* RAID Action Reply ActionData union */
typedef union _MPI2_RAID_ACTION_REPLY_DATA
{
U32 Word[5];
MPI2_RAID_VOL_INDICATOR RaidVolumeIndicator;
U16 VolDevHandle;
U8 VolumeState;
U8 PhysDiskNum;
} MPI2_RAID_ACTION_REPLY_DATA, MPI2_POINTER PTR_MPI2_RAID_ACTION_REPLY_DATA,
Mpi2RaidActionReplyData_t, MPI2_POINTER pMpi2RaidActionReplyData_t;
/* use MPI2_RAIDVOL0_SETTING_ defines from mpi2_cnfg.h for MPI2_RAID_ACTION_CHANGE_VOL_WRITE_CACHE action */
/* RAID Action Reply Message */
typedef struct _MPI2_RAID_ACTION_REPLY
{
U8 Action; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 VolDevHandle; /* 0x04 */
U8 PhysDiskNum; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved2; /* 0x0A */
U16 Reserved3; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
MPI2_RAID_ACTION_REPLY_DATA ActionData; /* 0x14 */
} MPI2_RAID_ACTION_REPLY, MPI2_POINTER PTR_MPI2_RAID_ACTION_REPLY,
Mpi2RaidActionReply_t, MPI2_POINTER pMpi2RaidActionReply_t;
#endif

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/* $FreeBSD$ */
/*
* Copyright (c) 2000-2007 LSI Corporation.
*
*
* Name: mpi2_sas.h
* Title: MPI Serial Attached SCSI structures and definitions
* Creation Date: February 9, 2007
*
* mpi2.h Version: 02.00.03
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 06-26-07 02.00.01 Added Clear All Persistent Operation to SAS IO Unit
* Control Request.
* 10-02-08 02.00.02 Added Set IOC Parameter Operation to SAS IO Unit Control
* Request.
* 10-28-09 02.00.03 Changed the type of SGL in MPI2_SATA_PASSTHROUGH_REQUEST
* to MPI2_SGE_IO_UNION since it supports chained SGLs.
* --------------------------------------------------------------------------
*/
#ifndef MPI2_SAS_H
#define MPI2_SAS_H
/*
* Values for SASStatus.
*/
#define MPI2_SASSTATUS_SUCCESS (0x00)
#define MPI2_SASSTATUS_UNKNOWN_ERROR (0x01)
#define MPI2_SASSTATUS_INVALID_FRAME (0x02)
#define MPI2_SASSTATUS_UTC_BAD_DEST (0x03)
#define MPI2_SASSTATUS_UTC_BREAK_RECEIVED (0x04)
#define MPI2_SASSTATUS_UTC_CONNECT_RATE_NOT_SUPPORTED (0x05)
#define MPI2_SASSTATUS_UTC_PORT_LAYER_REQUEST (0x06)
#define MPI2_SASSTATUS_UTC_PROTOCOL_NOT_SUPPORTED (0x07)
#define MPI2_SASSTATUS_UTC_STP_RESOURCES_BUSY (0x08)
#define MPI2_SASSTATUS_UTC_WRONG_DESTINATION (0x09)
#define MPI2_SASSTATUS_SHORT_INFORMATION_UNIT (0x0A)
#define MPI2_SASSTATUS_LONG_INFORMATION_UNIT (0x0B)
#define MPI2_SASSTATUS_XFER_RDY_INCORRECT_WRITE_DATA (0x0C)
#define MPI2_SASSTATUS_XFER_RDY_REQUEST_OFFSET_ERROR (0x0D)
#define MPI2_SASSTATUS_XFER_RDY_NOT_EXPECTED (0x0E)
#define MPI2_SASSTATUS_DATA_INCORRECT_DATA_LENGTH (0x0F)
#define MPI2_SASSTATUS_DATA_TOO_MUCH_READ_DATA (0x10)
#define MPI2_SASSTATUS_DATA_OFFSET_ERROR (0x11)
#define MPI2_SASSTATUS_SDSF_NAK_RECEIVED (0x12)
#define MPI2_SASSTATUS_SDSF_CONNECTION_FAILED (0x13)
#define MPI2_SASSTATUS_INITIATOR_RESPONSE_TIMEOUT (0x14)
/*
* Values for the SAS DeviceInfo field used in SAS Device Status Change Event
* data and SAS Configuration pages.
*/
#define MPI2_SAS_DEVICE_INFO_SEP (0x00004000)
#define MPI2_SAS_DEVICE_INFO_ATAPI_DEVICE (0x00002000)
#define MPI2_SAS_DEVICE_INFO_LSI_DEVICE (0x00001000)
#define MPI2_SAS_DEVICE_INFO_DIRECT_ATTACH (0x00000800)
#define MPI2_SAS_DEVICE_INFO_SSP_TARGET (0x00000400)
#define MPI2_SAS_DEVICE_INFO_STP_TARGET (0x00000200)
#define MPI2_SAS_DEVICE_INFO_SMP_TARGET (0x00000100)
#define MPI2_SAS_DEVICE_INFO_SATA_DEVICE (0x00000080)
#define MPI2_SAS_DEVICE_INFO_SSP_INITIATOR (0x00000040)
#define MPI2_SAS_DEVICE_INFO_STP_INITIATOR (0x00000020)
#define MPI2_SAS_DEVICE_INFO_SMP_INITIATOR (0x00000010)
#define MPI2_SAS_DEVICE_INFO_SATA_HOST (0x00000008)
#define MPI2_SAS_DEVICE_INFO_MASK_DEVICE_TYPE (0x00000007)
#define MPI2_SAS_DEVICE_INFO_NO_DEVICE (0x00000000)
#define MPI2_SAS_DEVICE_INFO_END_DEVICE (0x00000001)
#define MPI2_SAS_DEVICE_INFO_EDGE_EXPANDER (0x00000002)
#define MPI2_SAS_DEVICE_INFO_FANOUT_EXPANDER (0x00000003)
/*****************************************************************************
*
* SAS Messages
*
*****************************************************************************/
/****************************************************************************
* SMP Passthrough messages
****************************************************************************/
/* SMP Passthrough Request Message */
typedef struct _MPI2_SMP_PASSTHROUGH_REQUEST
{
U8 PassthroughFlags; /* 0x00 */
U8 PhysicalPort; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 RequestDataLength; /* 0x04 */
U8 SGLFlags; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved1; /* 0x0A */
U32 Reserved2; /* 0x0C */
U64 SASAddress; /* 0x10 */
U32 Reserved3; /* 0x18 */
U32 Reserved4; /* 0x1C */
MPI2_SIMPLE_SGE_UNION SGL; /* 0x20 */
} MPI2_SMP_PASSTHROUGH_REQUEST, MPI2_POINTER PTR_MPI2_SMP_PASSTHROUGH_REQUEST,
Mpi2SmpPassthroughRequest_t, MPI2_POINTER pMpi2SmpPassthroughRequest_t;
/* values for PassthroughFlags field */
#define MPI2_SMP_PT_REQ_PT_FLAGS_IMMEDIATE (0x80)
/* values for SGLFlags field are in the SGL section of mpi2.h */
/* SMP Passthrough Reply Message */
typedef struct _MPI2_SMP_PASSTHROUGH_REPLY
{
U8 PassthroughFlags; /* 0x00 */
U8 PhysicalPort; /* 0x01 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 ResponseDataLength; /* 0x04 */
U8 SGLFlags; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved1; /* 0x0A */
U8 Reserved2; /* 0x0C */
U8 SASStatus; /* 0x0D */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U32 Reserved3; /* 0x14 */
U8 ResponseData[4]; /* 0x18 */
} MPI2_SMP_PASSTHROUGH_REPLY, MPI2_POINTER PTR_MPI2_SMP_PASSTHROUGH_REPLY,
Mpi2SmpPassthroughReply_t, MPI2_POINTER pMpi2SmpPassthroughReply_t;
/* values for PassthroughFlags field */
#define MPI2_SMP_PT_REPLY_PT_FLAGS_IMMEDIATE (0x80)
/* values for SASStatus field are at the top of this file */
/****************************************************************************
* SATA Passthrough messages
****************************************************************************/
/* SATA Passthrough Request Message */
typedef struct _MPI2_SATA_PASSTHROUGH_REQUEST
{
U16 DevHandle; /* 0x00 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 PassthroughFlags; /* 0x04 */
U8 SGLFlags; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved1; /* 0x0A */
U32 Reserved2; /* 0x0C */
U32 Reserved3; /* 0x10 */
U32 Reserved4; /* 0x14 */
U32 DataLength; /* 0x18 */
U8 CommandFIS[20]; /* 0x1C */
MPI2_SGE_IO_UNION SGL; /* 0x20 */
} MPI2_SATA_PASSTHROUGH_REQUEST, MPI2_POINTER PTR_MPI2_SATA_PASSTHROUGH_REQUEST,
Mpi2SataPassthroughRequest_t, MPI2_POINTER pMpi2SataPassthroughRequest_t;
/* values for PassthroughFlags field */
#define MPI2_SATA_PT_REQ_PT_FLAGS_EXECUTE_DIAG (0x0100)
#define MPI2_SATA_PT_REQ_PT_FLAGS_DMA (0x0020)
#define MPI2_SATA_PT_REQ_PT_FLAGS_PIO (0x0010)
#define MPI2_SATA_PT_REQ_PT_FLAGS_UNSPECIFIED_VU (0x0004)
#define MPI2_SATA_PT_REQ_PT_FLAGS_WRITE (0x0002)
#define MPI2_SATA_PT_REQ_PT_FLAGS_READ (0x0001)
/* values for SGLFlags field are in the SGL section of mpi2.h */
/* SATA Passthrough Reply Message */
typedef struct _MPI2_SATA_PASSTHROUGH_REPLY
{
U16 DevHandle; /* 0x00 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 PassthroughFlags; /* 0x04 */
U8 SGLFlags; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved1; /* 0x0A */
U8 Reserved2; /* 0x0C */
U8 SASStatus; /* 0x0D */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U8 StatusFIS[20]; /* 0x14 */
U32 StatusControlRegisters; /* 0x28 */
U32 TransferCount; /* 0x2C */
} MPI2_SATA_PASSTHROUGH_REPLY, MPI2_POINTER PTR_MPI2_SATA_PASSTHROUGH_REPLY,
Mpi2SataPassthroughReply_t, MPI2_POINTER pMpi2SataPassthroughReply_t;
/* values for SASStatus field are at the top of this file */
/****************************************************************************
* SAS IO Unit Control messages
****************************************************************************/
/* SAS IO Unit Control Request Message */
typedef struct _MPI2_SAS_IOUNIT_CONTROL_REQUEST
{
U8 Operation; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 DevHandle; /* 0x04 */
U8 IOCParameter; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U16 Reserved4; /* 0x0C */
U8 PhyNum; /* 0x0E */
U8 PrimFlags; /* 0x0F */
U32 Primitive; /* 0x10 */
U8 LookupMethod; /* 0x14 */
U8 Reserved5; /* 0x15 */
U16 SlotNumber; /* 0x16 */
U64 LookupAddress; /* 0x18 */
U32 IOCParameterValue; /* 0x20 */
U32 Reserved7; /* 0x24 */
U32 Reserved8; /* 0x28 */
} MPI2_SAS_IOUNIT_CONTROL_REQUEST,
MPI2_POINTER PTR_MPI2_SAS_IOUNIT_CONTROL_REQUEST,
Mpi2SasIoUnitControlRequest_t, MPI2_POINTER pMpi2SasIoUnitControlRequest_t;
/* values for the Operation field */
#define MPI2_SAS_OP_CLEAR_ALL_PERSISTENT (0x02)
#define MPI2_SAS_OP_PHY_LINK_RESET (0x06)
#define MPI2_SAS_OP_PHY_HARD_RESET (0x07)
#define MPI2_SAS_OP_PHY_CLEAR_ERROR_LOG (0x08)
#define MPI2_SAS_OP_SEND_PRIMITIVE (0x0A)
#define MPI2_SAS_OP_FORCE_FULL_DISCOVERY (0x0B)
#define MPI2_SAS_OP_TRANSMIT_PORT_SELECT_SIGNAL (0x0C)
#define MPI2_SAS_OP_REMOVE_DEVICE (0x0D)
#define MPI2_SAS_OP_LOOKUP_MAPPING (0x0E)
#define MPI2_SAS_OP_SET_IOC_PARAMETER (0x0F)
#define MPI2_SAS_OP_PRODUCT_SPECIFIC_MIN (0x80)
/* values for the PrimFlags field */
#define MPI2_SAS_PRIMFLAGS_SINGLE (0x08)
#define MPI2_SAS_PRIMFLAGS_TRIPLE (0x02)
#define MPI2_SAS_PRIMFLAGS_REDUNDANT (0x01)
/* values for the LookupMethod field */
#define MPI2_SAS_LOOKUP_METHOD_SAS_ADDRESS (0x01)
#define MPI2_SAS_LOOKUP_METHOD_SAS_ENCLOSURE_SLOT (0x02)
#define MPI2_SAS_LOOKUP_METHOD_SAS_DEVICE_NAME (0x03)
/* SAS IO Unit Control Reply Message */
typedef struct _MPI2_SAS_IOUNIT_CONTROL_REPLY
{
U8 Operation; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 DevHandle; /* 0x04 */
U8 IOCParameter; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U16 Reserved4; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
} MPI2_SAS_IOUNIT_CONTROL_REPLY,
MPI2_POINTER PTR_MPI2_SAS_IOUNIT_CONTROL_REPLY,
Mpi2SasIoUnitControlReply_t, MPI2_POINTER pMpi2SasIoUnitControlReply_t;
#endif

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/* $FreeBSD$ */
/*
* Copyright (c) 2000-2008 LSI Corporation.
*
*
* Name: mpi2_targ.h
* Title: MPI Target mode messages and structures
* Creation Date: September 8, 2006
*
* mpi2_targ.h Version: 02.00.03
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 08-31-07 02.00.01 Added Command Buffer Data Location Address Space bits to
* BufferPostFlags field of CommandBufferPostBase Request.
* 02-29-08 02.00.02 Modified various names to make them 32-character unique.
* 10-02-08 02.00.03 Removed NextCmdBufferOffset from
* MPI2_TARGET_CMD_BUF_POST_BASE_REQUEST.
* Target Status Send Request only takes a single SGE for
* response data.
* --------------------------------------------------------------------------
*/
#ifndef MPI2_TARG_H
#define MPI2_TARG_H
/******************************************************************************
*
* SCSI Target Messages
*
*******************************************************************************/
/****************************************************************************
* Target Command Buffer Post Base Request
****************************************************************************/
typedef struct _MPI2_TARGET_CMD_BUF_POST_BASE_REQUEST
{
U8 BufferPostFlags; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 TotalCmdBuffers; /* 0x04 */
U8 Reserved; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved2; /* 0x0A */
U32 Reserved3; /* 0x0C */
U16 CmdBufferLength; /* 0x10 */
U16 Reserved4; /* 0x12 */
U32 BaseAddressLow; /* 0x14 */
U32 BaseAddressHigh; /* 0x18 */
} MPI2_TARGET_CMD_BUF_POST_BASE_REQUEST,
MPI2_POINTER PTR_MPI2_TARGET_CMD_BUF_POST_BASE_REQUEST,
Mpi2TargetCmdBufferPostBaseRequest_t,
MPI2_POINTER pMpi2TargetCmdBufferPostBaseRequest_t;
/* values for the BufferPostflags field */
#define MPI2_CMD_BUF_POST_BASE_ADDRESS_SPACE_MASK (0x0C)
#define MPI2_CMD_BUF_POST_BASE_SYSTEM_ADDRESS_SPACE (0x00)
#define MPI2_CMD_BUF_POST_BASE_IOCDDR_ADDRESS_SPACE (0x04)
#define MPI2_CMD_BUF_POST_BASE_IOCPLB_ADDRESS_SPACE (0x08)
#define MPI2_CMD_BUF_POST_BASE_IOCPLBNTA_ADDRESS_SPACE (0x0C)
#define MPI2_CMD_BUF_POST_BASE_FLAGS_AUTO_POST_ALL (0x01)
/****************************************************************************
* Target Command Buffer Post List Request
****************************************************************************/
typedef struct _MPI2_TARGET_CMD_BUF_POST_LIST_REQUEST
{
U16 Reserved; /* 0x00 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 CmdBufferCount; /* 0x04 */
U8 Reserved1; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved2; /* 0x0A */
U32 Reserved3; /* 0x0C */
U16 IoIndex[2]; /* 0x10 */
} MPI2_TARGET_CMD_BUF_POST_LIST_REQUEST,
MPI2_POINTER PTR_MPI2_TARGET_CMD_BUF_POST_LIST_REQUEST,
Mpi2TargetCmdBufferPostListRequest_t,
MPI2_POINTER pMpi2TargetCmdBufferPostListRequest_t;
/****************************************************************************
* Target Command Buffer Post Base List Reply
****************************************************************************/
typedef struct _MPI2_TARGET_BUF_POST_BASE_LIST_REPLY
{
U8 Flags; /* 0x00 */
U8 Reserved; /* 0x01 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved1; /* 0x04 */
U8 Reserved2; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U16 Reserved4; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U16 IoIndex; /* 0x14 */
U16 Reserved5; /* 0x16 */
U32 Reserved6; /* 0x18 */
} MPI2_TARGET_BUF_POST_BASE_LIST_REPLY,
MPI2_POINTER PTR_MPI2_TARGET_BUF_POST_BASE_LIST_REPLY,
Mpi2TargetCmdBufferPostBaseListReply_t,
MPI2_POINTER pMpi2TargetCmdBufferPostBaseListReply_t;
/* Flags defines */
#define MPI2_CMD_BUF_POST_REPLY_IOINDEX_VALID (0x01)
/****************************************************************************
* Command Buffer Formats (with 16 byte CDB)
****************************************************************************/
typedef struct _MPI2_TARGET_SSP_CMD_BUFFER
{
U8 FrameType; /* 0x00 */
U8 Reserved1; /* 0x01 */
U16 InitiatorConnectionTag; /* 0x02 */
U32 HashedSourceSASAddress; /* 0x04 */
U16 Reserved2; /* 0x08 */
U16 Flags; /* 0x0A */
U32 Reserved3; /* 0x0C */
U16 Tag; /* 0x10 */
U16 TargetPortTransferTag; /* 0x12 */
U32 DataOffset; /* 0x14 */
/* COMMAND information unit starts here */
U8 LogicalUnitNumber[8]; /* 0x18 */
U8 Reserved4; /* 0x20 */
U8 TaskAttribute; /* lower 3 bits */ /* 0x21 */
U8 Reserved5; /* 0x22 */
U8 AdditionalCDBLength; /* upper 5 bits */ /* 0x23 */
U8 CDB[16]; /* 0x24 */
/* Additional CDB bytes extend past the CDB field */
} MPI2_TARGET_SSP_CMD_BUFFER, MPI2_POINTER PTR_MPI2_TARGET_SSP_CMD_BUFFER,
Mpi2TargetSspCmdBuffer, MPI2_POINTER pMp2iTargetSspCmdBuffer;
typedef struct _MPI2_TARGET_SSP_TASK_BUFFER
{
U8 FrameType; /* 0x00 */
U8 Reserved1; /* 0x01 */
U16 InitiatorConnectionTag; /* 0x02 */
U32 HashedSourceSASAddress; /* 0x04 */
U16 Reserved2; /* 0x08 */
U16 Flags; /* 0x0A */
U32 Reserved3; /* 0x0C */
U16 Tag; /* 0x10 */
U16 TargetPortTransferTag; /* 0x12 */
U32 DataOffset; /* 0x14 */
/* TASK information unit starts here */
U8 LogicalUnitNumber[8]; /* 0x18 */
U16 Reserved4; /* 0x20 */
U8 TaskManagementFunction; /* 0x22 */
U8 Reserved5; /* 0x23 */
U16 ManagedTaskTag; /* 0x24 */
U16 Reserved6; /* 0x26 */
U32 Reserved7; /* 0x28 */
U32 Reserved8; /* 0x2C */
U32 Reserved9; /* 0x30 */
} MPI2_TARGET_SSP_TASK_BUFFER, MPI2_POINTER PTR_MPI2_TARGET_SSP_TASK_BUFFER,
Mpi2TargetSspTaskBuffer, MPI2_POINTER pMpi2TargetSspTaskBuffer;
/* mask and shift for HashedSourceSASAddress field */
#define MPI2_TARGET_HASHED_SAS_ADDRESS_MASK (0xFFFFFF00)
#define MPI2_TARGET_HASHED_SAS_ADDRESS_SHIFT (8)
/****************************************************************************
* Target Assist Request
****************************************************************************/
typedef struct _MPI2_TARGET_ASSIST_REQUEST
{
U8 Reserved1; /* 0x00 */
U8 TargetAssistFlags; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 QueueTag; /* 0x04 */
U8 Reserved2; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U16 IoIndex; /* 0x0C */
U16 InitiatorConnectionTag; /* 0x0E */
U16 SGLFlags; /* 0x10 */
U8 SequenceNumber; /* 0x12 */
U8 Reserved4; /* 0x13 */
U8 SGLOffset0; /* 0x14 */
U8 SGLOffset1; /* 0x15 */
U8 SGLOffset2; /* 0x16 */
U8 SGLOffset3; /* 0x17 */
U32 SkipCount; /* 0x18 */
U32 DataLength; /* 0x1C */
U32 BidirectionalDataLength; /* 0x20 */
U16 IoFlags; /* 0x24 */
U16 EEDPFlags; /* 0x26 */
U32 EEDPBlockSize; /* 0x28 */
U32 SecondaryReferenceTag; /* 0x2C */
U16 SecondaryApplicationTag; /* 0x30 */
U16 ApplicationTagTranslationMask; /* 0x32 */
U32 PrimaryReferenceTag; /* 0x34 */
U16 PrimaryApplicationTag; /* 0x38 */
U16 PrimaryApplicationTagMask; /* 0x3A */
U32 RelativeOffset; /* 0x3C */
U32 Reserved5; /* 0x40 */
U32 Reserved6; /* 0x44 */
U32 Reserved7; /* 0x48 */
U32 Reserved8; /* 0x4C */
MPI2_SGE_IO_UNION SGL[1]; /* 0x50 */
} MPI2_TARGET_ASSIST_REQUEST, MPI2_POINTER PTR_MPI2_TARGET_ASSIST_REQUEST,
Mpi2TargetAssistRequest_t, MPI2_POINTER pMpi2TargetAssistRequest_t;
/* Target Assist TargetAssistFlags bits */
#define MPI2_TARGET_ASSIST_FLAGS_REPOST_CMD_BUFFER (0x80)
#define MPI2_TARGET_ASSIST_FLAGS_TLR (0x10)
#define MPI2_TARGET_ASSIST_FLAGS_RETRANSMIT (0x04)
#define MPI2_TARGET_ASSIST_FLAGS_AUTO_STATUS (0x02)
#define MPI2_TARGET_ASSIST_FLAGS_DATA_DIRECTION (0x01)
/* Target Assist SGLFlags bits */
/* base values for Data Location Address Space */
#define MPI2_TARGET_ASSIST_SGLFLAGS_ADDR_MASK (0x0C)
#define MPI2_TARGET_ASSIST_SGLFLAGS_SYSTEM_ADDR (0x00)
#define MPI2_TARGET_ASSIST_SGLFLAGS_IOCDDR_ADDR (0x04)
#define MPI2_TARGET_ASSIST_SGLFLAGS_IOCPLB_ADDR (0x08)
#define MPI2_TARGET_ASSIST_SGLFLAGS_PLBNTA_ADDR (0x0C)
/* base values for Type */
#define MPI2_TARGET_ASSIST_SGLFLAGS_TYPE_MASK (0x03)
#define MPI2_TARGET_ASSIST_SGLFLAGS_MPI_TYPE (0x00)
#define MPI2_TARGET_ASSIST_SGLFLAGS_32IEEE_TYPE (0x01)
#define MPI2_TARGET_ASSIST_SGLFLAGS_64IEEE_TYPE (0x02)
/* shift values for each sub-field */
#define MPI2_TARGET_ASSIST_SGLFLAGS_SGL3_SHIFT (12)
#define MPI2_TARGET_ASSIST_SGLFLAGS_SGL2_SHIFT (8)
#define MPI2_TARGET_ASSIST_SGLFLAGS_SGL1_SHIFT (4)
#define MPI2_TARGET_ASSIST_SGLFLAGS_SGL0_SHIFT (0)
/* Target Assist IoFlags bits */
#define MPI2_TARGET_ASSIST_IOFLAGS_BIDIRECTIONAL (0x0800)
#define MPI2_TARGET_ASSIST_IOFLAGS_MULTICAST (0x0400)
#define MPI2_TARGET_ASSIST_IOFLAGS_RECEIVE_FIRST (0x0200)
/* Target Assist EEDPFlags bits */
#define MPI2_TA_EEDPFLAGS_INC_PRI_REFTAG (0x8000)
#define MPI2_TA_EEDPFLAGS_INC_SEC_REFTAG (0x4000)
#define MPI2_TA_EEDPFLAGS_INC_PRI_APPTAG (0x2000)
#define MPI2_TA_EEDPFLAGS_INC_SEC_APPTAG (0x1000)
#define MPI2_TA_EEDPFLAGS_CHECK_REFTAG (0x0400)
#define MPI2_TA_EEDPFLAGS_CHECK_APPTAG (0x0200)
#define MPI2_TA_EEDPFLAGS_CHECK_GUARD (0x0100)
#define MPI2_TA_EEDPFLAGS_PASSTHRU_REFTAG (0x0008)
#define MPI2_TA_EEDPFLAGS_MASK_OP (0x0007)
#define MPI2_TA_EEDPFLAGS_NOOP_OP (0x0000)
#define MPI2_TA_EEDPFLAGS_CHECK_OP (0x0001)
#define MPI2_TA_EEDPFLAGS_STRIP_OP (0x0002)
#define MPI2_TA_EEDPFLAGS_CHECK_REMOVE_OP (0x0003)
#define MPI2_TA_EEDPFLAGS_INSERT_OP (0x0004)
#define MPI2_TA_EEDPFLAGS_REPLACE_OP (0x0006)
#define MPI2_TA_EEDPFLAGS_CHECK_REGEN_OP (0x0007)
/****************************************************************************
* Target Status Send Request
****************************************************************************/
typedef struct _MPI2_TARGET_STATUS_SEND_REQUEST
{
U8 Reserved1; /* 0x00 */
U8 StatusFlags; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 QueueTag; /* 0x04 */
U8 Reserved2; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U16 IoIndex; /* 0x0C */
U16 InitiatorConnectionTag; /* 0x0E */
U16 SGLFlags; /* 0x10 */
U16 Reserved4; /* 0x12 */
U8 SGLOffset0; /* 0x14 */
U8 Reserved5; /* 0x15 */
U16 Reserved6; /* 0x16 */
U32 Reserved7; /* 0x18 */
U32 Reserved8; /* 0x1C */
MPI2_SIMPLE_SGE_UNION StatusDataSGE; /* 0x20 */
} MPI2_TARGET_STATUS_SEND_REQUEST,
MPI2_POINTER PTR_MPI2_TARGET_STATUS_SEND_REQUEST,
Mpi2TargetStatusSendRequest_t, MPI2_POINTER pMpi2TargetStatusSendRequest_t;
/* Target Status Send StatusFlags bits */
#define MPI2_TSS_FLAGS_REPOST_CMD_BUFFER (0x80)
#define MPI2_TSS_FLAGS_RETRANSMIT (0x04)
#define MPI2_TSS_FLAGS_AUTO_GOOD_STATUS (0x01)
/* Target Status Send SGLFlags bits */
/* Data Location Address Space */
#define MPI2_TSS_SGLFLAGS_ADDR_MASK (0x0C)
#define MPI2_TSS_SGLFLAGS_SYSTEM_ADDR (0x00)
#define MPI2_TSS_SGLFLAGS_IOCDDR_ADDR (0x04)
#define MPI2_TSS_SGLFLAGS_IOCPLB_ADDR (0x08)
#define MPI2_TSS_SGLFLAGS_IOCPLBNTA_ADDR (0x0C)
/* Type */
#define MPI2_TSS_SGLFLAGS_TYPE_MASK (0x03)
#define MPI2_TSS_SGLFLAGS_MPI_TYPE (0x00)
#define MPI2_TSS_SGLFLAGS_IEEE32_TYPE (0x01)
#define MPI2_TSS_SGLFLAGS_IEEE64_TYPE (0x02)
/*
* NOTE: The SSP status IU is big-endian. When used on a little-endian system,
* this structure properly orders the bytes.
*/
typedef struct _MPI2_TARGET_SSP_RSP_IU
{
U32 Reserved0[6]; /* reserved for SSP header */ /* 0x00 */
/* start of RESPONSE information unit */
U32 Reserved1; /* 0x18 */
U32 Reserved2; /* 0x1C */
U16 Reserved3; /* 0x20 */
U8 DataPres; /* lower 2 bits */ /* 0x22 */
U8 Status; /* 0x23 */
U32 Reserved4; /* 0x24 */
U32 SenseDataLength; /* 0x28 */
U32 ResponseDataLength; /* 0x2C */
U8 ResponseSenseData[4]; /* 0x30 */
} MPI2_TARGET_SSP_RSP_IU, MPI2_POINTER PTR_MPI2_TARGET_SSP_RSP_IU,
Mpi2TargetSspRspIu_t, MPI2_POINTER pMpi2TargetSspRspIu_t;
/****************************************************************************
* Target Standard Reply - used with Target Assist or Target Status Send
****************************************************************************/
typedef struct _MPI2_TARGET_STANDARD_REPLY
{
U16 Reserved; /* 0x00 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved1; /* 0x04 */
U8 Reserved2; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U16 Reserved4; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U16 IoIndex; /* 0x14 */
U16 Reserved5; /* 0x16 */
U32 TransferCount; /* 0x18 */
U32 BidirectionalTransferCount; /* 0x1C */
} MPI2_TARGET_STANDARD_REPLY, MPI2_POINTER PTR_MPI2_TARGET_STANDARD_REPLY,
Mpi2TargetErrorReply_t, MPI2_POINTER pMpi2TargetErrorReply_t;
/****************************************************************************
* Target Mode Abort Request
****************************************************************************/
typedef struct _MPI2_TARGET_MODE_ABORT_REQUEST
{
U8 AbortType; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U16 IoIndexToAbort; /* 0x0C */
U16 Reserved6; /* 0x0E */
U32 MidToAbort; /* 0x10 */
} MPI2_TARGET_MODE_ABORT, MPI2_POINTER PTR_MPI2_TARGET_MODE_ABORT,
Mpi2TargetModeAbort_t, MPI2_POINTER pMpi2TargetModeAbort_t;
/* Target Mode Abort AbortType values */
#define MPI2_TARGET_MODE_ABORT_ALL_CMD_BUFFERS (0x00)
#define MPI2_TARGET_MODE_ABORT_ALL_IO (0x01)
#define MPI2_TARGET_MODE_ABORT_EXACT_IO (0x02)
#define MPI2_TARGET_MODE_ABORT_EXACT_IO_REQUEST (0x03)
#define MPI2_TARGET_MODE_ABORT_IO_REQUEST_AND_IO (0x04)
/****************************************************************************
* Target Mode Abort Reply
****************************************************************************/
typedef struct _MPI2_TARGET_MODE_ABORT_REPLY
{
U16 Reserved; /* 0x00 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved1; /* 0x04 */
U8 Reserved2; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U16 Reserved4; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U32 AbortCount; /* 0x14 */
} MPI2_TARGET_MODE_ABORT_REPLY, MPI2_POINTER PTR_MPI2_TARGET_MODE_ABORT_REPLY,
Mpi2TargetModeAbortReply_t, MPI2_POINTER pMpi2TargetModeAbortReply_t;
#endif

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/* $FreeBSD$ */
/*
* Copyright (c) 2000-2009 LSI Corporation.
*
*
* Name: mpi2_tool.h
* Title: MPI diagnostic tool structures and definitions
* Creation Date: March 26, 2007
*
* mpi2_tool.h Version: 02.00.04
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 12-18-07 02.00.01 Added Diagnostic Buffer Post and Diagnostic Release
* structures and defines.
* 02-29-08 02.00.02 Modified various names to make them 32-character unique.
* 05-06-09 02.00.03 Added ISTWI Read Write Tool and Diagnostic CLI Tool.
* 07-30-09 02.00.04 Added ExtendedType field to DiagnosticBufferPost request
* and reply messages.
* Added MPI2_DIAG_BUF_TYPE_EXTENDED.
* Incremented MPI2_DIAG_BUF_TYPE_COUNT.
* --------------------------------------------------------------------------
*/
#ifndef MPI2_TOOL_H
#define MPI2_TOOL_H
/*****************************************************************************
*
* Toolbox Messages
*
*****************************************************************************/
/* defines for the Tools */
#define MPI2_TOOLBOX_CLEAN_TOOL (0x00)
#define MPI2_TOOLBOX_MEMORY_MOVE_TOOL (0x01)
#define MPI2_TOOLBOX_ISTWI_READ_WRITE_TOOL (0x03)
#define MPI2_TOOLBOX_BEACON_TOOL (0x05)
#define MPI2_TOOLBOX_DIAGNOSTIC_CLI_TOOL (0x06)
/****************************************************************************
* Toolbox reply
****************************************************************************/
typedef struct _MPI2_TOOLBOX_REPLY
{
U8 Tool; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U16 Reserved5; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
} MPI2_TOOLBOX_REPLY, MPI2_POINTER PTR_MPI2_TOOLBOX_REPLY,
Mpi2ToolboxReply_t, MPI2_POINTER pMpi2ToolboxReply_t;
/****************************************************************************
* Toolbox Clean Tool request
****************************************************************************/
typedef struct _MPI2_TOOLBOX_CLEAN_REQUEST
{
U8 Tool; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U32 Flags; /* 0x0C */
} MPI2_TOOLBOX_CLEAN_REQUEST, MPI2_POINTER PTR_MPI2_TOOLBOX_CLEAN_REQUEST,
Mpi2ToolboxCleanRequest_t, MPI2_POINTER pMpi2ToolboxCleanRequest_t;
/* values for the Flags field */
#define MPI2_TOOLBOX_CLEAN_BOOT_SERVICES (0x80000000)
#define MPI2_TOOLBOX_CLEAN_PERSIST_MANUFACT_PAGES (0x40000000)
#define MPI2_TOOLBOX_CLEAN_OTHER_PERSIST_PAGES (0x20000000)
#define MPI2_TOOLBOX_CLEAN_FW_CURRENT (0x10000000)
#define MPI2_TOOLBOX_CLEAN_FW_BACKUP (0x08000000)
#define MPI2_TOOLBOX_CLEAN_MEGARAID (0x02000000)
#define MPI2_TOOLBOX_CLEAN_INITIALIZATION (0x01000000)
#define MPI2_TOOLBOX_CLEAN_FLASH (0x00000004)
#define MPI2_TOOLBOX_CLEAN_SEEPROM (0x00000002)
#define MPI2_TOOLBOX_CLEAN_NVSRAM (0x00000001)
/****************************************************************************
* Toolbox Memory Move request
****************************************************************************/
typedef struct _MPI2_TOOLBOX_MEM_MOVE_REQUEST
{
U8 Tool; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
MPI2_SGE_SIMPLE_UNION SGL; /* 0x0C */
} MPI2_TOOLBOX_MEM_MOVE_REQUEST, MPI2_POINTER PTR_MPI2_TOOLBOX_MEM_MOVE_REQUEST,
Mpi2ToolboxMemMoveRequest_t, MPI2_POINTER pMpi2ToolboxMemMoveRequest_t;
/****************************************************************************
* Toolbox ISTWI Read Write Tool
****************************************************************************/
/* Toolbox ISTWI Read Write Tool request message */
typedef struct _MPI2_TOOLBOX_ISTWI_READ_WRITE_REQUEST
{
U8 Tool; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U32 Reserved5; /* 0x0C */
U32 Reserved6; /* 0x10 */
U8 DevIndex; /* 0x14 */
U8 Action; /* 0x15 */
U8 SGLFlags; /* 0x16 */
U8 Reserved7; /* 0x17 */
U16 TxDataLength; /* 0x18 */
U16 RxDataLength; /* 0x1A */
U32 Reserved8; /* 0x1C */
U32 Reserved9; /* 0x20 */
U32 Reserved10; /* 0x24 */
U32 Reserved11; /* 0x28 */
U32 Reserved12; /* 0x2C */
MPI2_SGE_SIMPLE_UNION SGL; /* 0x30 */
} MPI2_TOOLBOX_ISTWI_READ_WRITE_REQUEST,
MPI2_POINTER PTR_MPI2_TOOLBOX_ISTWI_READ_WRITE_REQUEST,
Mpi2ToolboxIstwiReadWriteRequest_t,
MPI2_POINTER pMpi2ToolboxIstwiReadWriteRequest_t;
/* values for the Action field */
#define MPI2_TOOL_ISTWI_ACTION_READ_DATA (0x01)
#define MPI2_TOOL_ISTWI_ACTION_WRITE_DATA (0x02)
#define MPI2_TOOL_ISTWI_ACTION_SEQUENCE (0x03)
#define MPI2_TOOL_ISTWI_ACTION_RESERVE_BUS (0x10)
#define MPI2_TOOL_ISTWI_ACTION_RELEASE_BUS (0x11)
#define MPI2_TOOL_ISTWI_ACTION_RESET (0x12)
/* values for SGLFlags field are in the SGL section of mpi2.h */
/* Toolbox ISTWI Read Write Tool reply message */
typedef struct _MPI2_TOOLBOX_ISTWI_REPLY
{
U8 Tool; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U16 Reserved5; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U8 DevIndex; /* 0x14 */
U8 Action; /* 0x15 */
U8 IstwiStatus; /* 0x16 */
U8 Reserved6; /* 0x17 */
U16 TxDataCount; /* 0x18 */
U16 RxDataCount; /* 0x1A */
} MPI2_TOOLBOX_ISTWI_REPLY, MPI2_POINTER PTR_MPI2_TOOLBOX_ISTWI_REPLY,
Mpi2ToolboxIstwiReply_t, MPI2_POINTER pMpi2ToolboxIstwiReply_t;
/****************************************************************************
* Toolbox Beacon Tool request
****************************************************************************/
typedef struct _MPI2_TOOLBOX_BEACON_REQUEST
{
U8 Tool; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U8 Reserved5; /* 0x0C */
U8 PhysicalPort; /* 0x0D */
U8 Reserved6; /* 0x0E */
U8 Flags; /* 0x0F */
} MPI2_TOOLBOX_BEACON_REQUEST, MPI2_POINTER PTR_MPI2_TOOLBOX_BEACON_REQUEST,
Mpi2ToolboxBeaconRequest_t, MPI2_POINTER pMpi2ToolboxBeaconRequest_t;
/* values for the Flags field */
#define MPI2_TOOLBOX_FLAGS_BEACONMODE_OFF (0x00)
#define MPI2_TOOLBOX_FLAGS_BEACONMODE_ON (0x01)
/****************************************************************************
* Toolbox Diagnostic CLI Tool
****************************************************************************/
#define MPI2_TOOLBOX_DIAG_CLI_CMD_LENGTH (0x5C)
/* Toolbox Diagnostic CLI Tool request message */
typedef struct _MPI2_TOOLBOX_DIAGNOSTIC_CLI_REQUEST
{
U8 Tool; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U8 SGLFlags; /* 0x0C */
U8 Reserved5; /* 0x0D */
U16 Reserved6; /* 0x0E */
U32 DataLength; /* 0x10 */
U8 DiagnosticCliCommand[MPI2_TOOLBOX_DIAG_CLI_CMD_LENGTH]; /* 0x14 */
MPI2_SGE_SIMPLE_UNION SGL; /* 0x70 */
} MPI2_TOOLBOX_DIAGNOSTIC_CLI_REQUEST,
MPI2_POINTER PTR_MPI2_TOOLBOX_DIAGNOSTIC_CLI_REQUEST,
Mpi2ToolboxDiagnosticCliRequest_t,
MPI2_POINTER pMpi2ToolboxDiagnosticCliRequest_t;
/* values for SGLFlags field are in the SGL section of mpi2.h */
/* Toolbox Diagnostic CLI Tool reply message */
typedef struct _MPI2_TOOLBOX_DIAGNOSTIC_CLI_REPLY
{
U8 Tool; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U16 Reserved5; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U32 ReturnedDataLength; /* 0x14 */
} MPI2_TOOLBOX_DIAGNOSTIC_CLI_REPLY,
MPI2_POINTER PTR_MPI2_TOOLBOX_DIAG_CLI_REPLY,
Mpi2ToolboxDiagnosticCliReply_t,
MPI2_POINTER pMpi2ToolboxDiagnosticCliReply_t;
/*****************************************************************************
*
* Diagnostic Buffer Messages
*
*****************************************************************************/
/****************************************************************************
* Diagnostic Buffer Post request
****************************************************************************/
typedef struct _MPI2_DIAG_BUFFER_POST_REQUEST
{
U8 ExtendedType; /* 0x00 */
U8 BufferType; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U64 BufferAddress; /* 0x0C */
U32 BufferLength; /* 0x14 */
U32 Reserved5; /* 0x18 */
U32 Reserved6; /* 0x1C */
U32 Flags; /* 0x20 */
U32 ProductSpecific[23]; /* 0x24 */
} MPI2_DIAG_BUFFER_POST_REQUEST, MPI2_POINTER PTR_MPI2_DIAG_BUFFER_POST_REQUEST,
Mpi2DiagBufferPostRequest_t, MPI2_POINTER pMpi2DiagBufferPostRequest_t;
/* values for the ExtendedType field */
#define MPI2_DIAG_EXTENDED_TYPE_UTILIZATION (0x02)
/* values for the BufferType field */
#define MPI2_DIAG_BUF_TYPE_TRACE (0x00)
#define MPI2_DIAG_BUF_TYPE_SNAPSHOT (0x01)
#define MPI2_DIAG_BUF_TYPE_EXTENDED (0x02)
/* count of the number of buffer types */
#define MPI2_DIAG_BUF_TYPE_COUNT (0x03)
/****************************************************************************
* Diagnostic Buffer Post reply
****************************************************************************/
typedef struct _MPI2_DIAG_BUFFER_POST_REPLY
{
U8 ExtendedType; /* 0x00 */
U8 BufferType; /* 0x01 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U16 Reserved5; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U32 TransferLength; /* 0x14 */
} MPI2_DIAG_BUFFER_POST_REPLY, MPI2_POINTER PTR_MPI2_DIAG_BUFFER_POST_REPLY,
Mpi2DiagBufferPostReply_t, MPI2_POINTER pMpi2DiagBufferPostReply_t;
/****************************************************************************
* Diagnostic Release request
****************************************************************************/
typedef struct _MPI2_DIAG_RELEASE_REQUEST
{
U8 Reserved1; /* 0x00 */
U8 BufferType; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
} MPI2_DIAG_RELEASE_REQUEST, MPI2_POINTER PTR_MPI2_DIAG_RELEASE_REQUEST,
Mpi2DiagReleaseRequest_t, MPI2_POINTER pMpi2DiagReleaseRequest_t;
/****************************************************************************
* Diagnostic Buffer Post reply
****************************************************************************/
typedef struct _MPI2_DIAG_RELEASE_REPLY
{
U8 Reserved1; /* 0x00 */
U8 BufferType; /* 0x01 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U16 Reserved5; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
} MPI2_DIAG_RELEASE_REPLY, MPI2_POINTER PTR_MPI2_DIAG_RELEASE_REPLY,
Mpi2DiagReleaseReply_t, MPI2_POINTER pMpi2DiagReleaseReply_t;
#endif

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/* $FreeBSD$ */
/*
* Copyright (c) 2000-2007 LSI Corporation.
*
*
* Name: mpi2_type.h
* Title: MPI basic type definitions
* Creation Date: August 16, 2006
*
* mpi2_type.h Version: 02.00.00
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* --------------------------------------------------------------------------
*/
#ifndef MPI2_TYPE_H
#define MPI2_TYPE_H
/*******************************************************************************
* Define MPI2_POINTER if it hasn't already been defined. By default
* MPI2_POINTER is defined to be a near pointer. MPI2_POINTER can be defined as
* a far pointer by defining MPI2_POINTER as "far *" before this header file is
* included.
*/
#ifndef MPI2_POINTER
#define MPI2_POINTER *
#endif
/* the basic types may have already been included by mpi_type.h */
#ifndef MPI_TYPE_H
/*****************************************************************************
*
* Basic Types
*
*****************************************************************************/
typedef signed char S8;
typedef unsigned char U8;
typedef signed short S16;
typedef unsigned short U16;
#ifdef __FreeBSD__
typedef int32_t S32;
typedef uint32_t U32;
#else
#if defined(unix) || defined(__arm) || defined(ALPHA) || defined(__PPC__) || defined(__ppc)
typedef signed int S32;
typedef unsigned int U32;
#else
typedef signed long S32;
typedef unsigned long U32;
#endif
#endif
typedef struct _S64
{
U32 Low;
S32 High;
} S64;
typedef struct _U64
{
U32 Low;
U32 High;
} U64;
/*****************************************************************************
*
* Pointer Types
*
*****************************************************************************/
typedef S8 *PS8;
typedef U8 *PU8;
typedef S16 *PS16;
typedef U16 *PU16;
typedef S32 *PS32;
typedef U32 *PU32;
typedef S64 *PS64;
typedef U64 *PU64;
#endif
#endif

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sys/dev/mps/mps_ioctl.h Normal file
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/*-
* Copyright (c) 2008 Yahoo!, Inc.
* All rights reserved.
* Written by: John Baldwin <jhb@FreeBSD.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the author nor the names of any co-contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* LSI MPT-Fusion Host Adapter FreeBSD userland interface
*
* $FreeBSD$
*/
#ifndef _MPS_IOCTL_H_
#define _MPS_IOCTL_H_
#include <dev/mps/mpi/mpi2_type.h>
#include <dev/mps/mpi/mpi2.h>
#include <dev/mps/mpi/mpi2_cnfg.h>
#include <dev/mps/mpi/mpi2_sas.h>
/*
* For the read header requests, the header should include the page
* type or extended page type, page number, and page version. The
* buffer and length are unused. The completed header is returned in
* the 'header' member.
*
* For the read page and write page requests, 'buf' should point to a
* buffer of 'len' bytes which holds the entire page (including the
* header).
*
* All requests specify the page address in 'page_address'.
*/
struct mps_cfg_page_req {
MPI2_CONFIG_PAGE_HEADER header;
uint32_t page_address;
void *buf;
int len;
uint16_t ioc_status;
};
struct mps_ext_cfg_page_req {
MPI2_CONFIG_EXTENDED_PAGE_HEADER header;
uint32_t page_address;
void *buf;
int len;
uint16_t ioc_status;
};
struct mps_raid_action {
uint8_t action;
uint8_t volume_bus;
uint8_t volume_id;
uint8_t phys_disk_num;
uint32_t action_data_word;
void *buf;
int len;
uint32_t volume_status;
uint32_t action_data[4];
uint16_t action_status;
uint16_t ioc_status;
uint8_t write;
};
struct mps_usr_command {
void *req;
uint32_t req_len;
void *rpl;
uint32_t rpl_len;
void *buf;
int len;
uint32_t flags;
};
#define MPSIO_MPS_COMMAND_FLAG_VERBOSE 0x01
#define MPSIO_MPS_COMMAND_FLAG_DEBUG 0x02
#define MPSIO_READ_CFG_HEADER _IOWR('M', 200, struct mps_cfg_page_req)
#define MPSIO_READ_CFG_PAGE _IOWR('M', 201, struct mps_cfg_page_req)
#define MPSIO_READ_EXT_CFG_HEADER _IOWR('M', 202, struct mps_ext_cfg_page_req)
#define MPSIO_READ_EXT_CFG_PAGE _IOWR('M', 203, struct mps_ext_cfg_page_req)
#define MPSIO_WRITE_CFG_PAGE _IOWR('M', 204, struct mps_cfg_page_req)
#define MPSIO_RAID_ACTION _IOWR('M', 205, struct mps_raid_action)
#define MPSIO_MPS_COMMAND _IOWR('M', 210, struct mps_usr_command)
#if defined(__amd64__)
struct mps_cfg_page_req32 {
MPI2_CONFIG_PAGE_HEADER header;
uint32_t page_address;
uint32_t buf;
int len;
uint16_t ioc_status;
};
struct mps_ext_cfg_page_req32 {
MPI2_CONFIG_EXTENDED_PAGE_HEADER header;
uint32_t page_address;
uint32_t buf;
int len;
uint16_t ioc_status;
};
struct mps_raid_action32 {
uint8_t action;
uint8_t volume_bus;
uint8_t volume_id;
uint8_t phys_disk_num;
uint32_t action_data_word;
uint32_t buf;
int len;
uint32_t volume_status;
uint32_t action_data[4];
uint16_t action_status;
uint16_t ioc_status;
uint8_t write;
};
#define MPSIO_READ_CFG_HEADER32 _IOWR('M', 100, struct mps_cfg_page_req32)
#define MPSIO_READ_CFG_PAGE32 _IOWR('M', 101, struct mps_cfg_page_req32)
#define MPSIO_READ_EXT_CFG_HEADER32 _IOWR('M', 102, struct mps_ext_cfg_page_req32)
#define MPSIO_READ_EXT_CFG_PAGE32 _IOWR('M', 103, struct mps_ext_cfg_page_req32)
#define MPSIO_WRITE_CFG_PAGE32 _IOWR('M', 104, struct mps_cfg_page_req32)
#define MPSIO_RAID_ACTION32 _IOWR('M', 105, struct mps_raid_action32)
#endif
#endif /* !_MPS_IOCTL_H_ */

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/*-
* Copyright (c) 2009 Yahoo! Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
/* PCI/PCI-X/PCIe bus interface for the LSI MPT2 controllers */
#include <sys/types.h>
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <sys/module.h>
#include <sys/bus.h>
#include <sys/conf.h>
#include <sys/malloc.h>
#include <sys/sysctl.h>
#include <machine/bus.h>
#include <machine/resource.h>
#include <sys/rman.h>
#include <dev/pci/pcireg.h>
#include <dev/pci/pcivar.h>
#include <dev/mps/mpi/mpi2_type.h>
#include <dev/mps/mpi/mpi2.h>
#include <dev/mps/mpi/mpi2_ioc.h>
#include <dev/mps/mpi/mpi2_cnfg.h>
#include <dev/mps/mpsvar.h>
static int mps_pci_probe(device_t);
static int mps_pci_attach(device_t);
static int mps_pci_detach(device_t);
static int mps_pci_suspend(device_t);
static int mps_pci_resume(device_t);
static void mps_pci_free(struct mps_softc *);
static int mps_alloc_msix(struct mps_softc *sc, int msgs);
static int mps_alloc_msi(struct mps_softc *sc, int msgs);
int mps_disable_msix = 0;
TUNABLE_INT("hw.mps.disable_msix", &mps_disable_msix);
SYSCTL_INT(_hw_mps, OID_AUTO, disable_msix, CTLFLAG_RD, &mps_disable_msix, 0,
"Disable MSIX interrupts\n");
int mps_disable_msi = 0;
TUNABLE_INT("hw.mps.disable_msi", &mps_disable_msi);
SYSCTL_INT(_hw_mps, OID_AUTO, disable_msi, CTLFLAG_RD, &mps_disable_msi, 0,
"Disable MSI interrupts\n");
static device_method_t mps_methods[] = {
DEVMETHOD(device_probe, mps_pci_probe),
DEVMETHOD(device_attach, mps_pci_attach),
DEVMETHOD(device_detach, mps_pci_detach),
DEVMETHOD(device_suspend, mps_pci_suspend),
DEVMETHOD(device_resume, mps_pci_resume),
DEVMETHOD(bus_print_child, bus_generic_print_child),
DEVMETHOD(bus_driver_added, bus_generic_driver_added),
{ 0, 0 }
};
static driver_t mps_pci_driver = {
"mps",
mps_methods,
sizeof(struct mps_softc)
};
static devclass_t mps_devclass;
DRIVER_MODULE(mps, pci, mps_pci_driver, mps_devclass, 0, 0);
struct mps_ident {
uint16_t vendor;
uint16_t device;
uint16_t subvendor;
uint16_t subdevice;
u_int flags;
const char *desc;
} mps_identifiers[] = {
{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2004,
0xffff, 0xffff, 0, "LSI SAS2004" },
{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2008,
0xffff, 0xffff, 0, "LSI SAS2008" },
{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_1,
0xffff, 0xffff, 0, "LSI SAS2108" },
{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_2,
0xffff, 0xffff, 0, "LSI SAS2108" },
{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_3,
0xffff, 0xffff, 0, "LSI SAS2108" },
{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2116_1,
0xffff, 0xffff, 0, "LSI SAS2116" },
{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2116_2,
0xffff, 0xffff, 0, "LSI SAS2116" },
{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_1,
0xffff, 0xffff, 0, "LSI SAS2208" },
{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_2,
0xffff, 0xffff, 0, "LSI SAS2208" },
{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_3,
0xffff, 0xffff, 0, "LSI SAS2208" },
{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_4,
0xffff, 0xffff, 0, "LSI SAS2208" },
{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_5,
0xffff, 0xffff, 0, "LSI SAS2208" },
{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_6,
0xffff, 0xffff, 0, "LSI SAS2208" },
{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_7,
0xffff, 0xffff, 0, "LSI SAS2208" },
{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_8,
0xffff, 0xffff, 0, "LSI SAS2208" },
{ 0, 0, 0, 0, 0, NULL }
};
static struct mps_ident *
mps_find_ident(device_t dev)
{
struct mps_ident *m;
for (m = mps_identifiers; m->vendor != 0; m++) {
if (m->vendor != pci_get_vendor(dev))
continue;
if (m->device != pci_get_device(dev))
continue;
if ((m->subvendor != 0xffff) &&
(m->subvendor != pci_get_subvendor(dev)))
continue;
if ((m->subdevice != 0xffff) &&
(m->subdevice != pci_get_subdevice(dev)))
continue;
return (m);
}
return (NULL);
}
static int
mps_pci_probe(device_t dev)
{
struct mps_ident *id;
if ((id = mps_find_ident(dev)) != NULL) {
device_set_desc(dev, id->desc);
return (BUS_PROBE_DEFAULT);
}
return (ENXIO);
}
static int
mps_pci_attach(device_t dev)
{
struct mps_softc *sc;
struct mps_ident *m;
uint16_t command;
int error;
sc = device_get_softc(dev);
bzero(sc, sizeof(*sc));
sc->mps_dev = dev;
m = mps_find_ident(dev);
sc->mps_flags = m->flags;
/* Twiddle basic PCI config bits for a sanity check */
command = pci_read_config(dev, PCIR_COMMAND, 2);
command |= PCIM_CMD_BUSMASTEREN;
pci_write_config(dev, PCIR_COMMAND, command, 2);
command = pci_read_config(dev, PCIR_COMMAND, 2);
if ((command & PCIM_CMD_BUSMASTEREN) == 0) {
device_printf(dev, "Cannot enable PCI busmaster\n");
return (ENXIO);
}
if ((command & PCIM_CMD_MEMEN) == 0) {
device_printf(dev, "PCI memory window not available\n");
return (ENXIO);
}
/* Allocate the System Interface Register Set */
sc->mps_regs_rid = PCIR_BAR(1);
if ((sc->mps_regs_resource = bus_alloc_resource_any(dev,
SYS_RES_MEMORY, &sc->mps_regs_rid, RF_ACTIVE)) == NULL) {
device_printf(dev, "Cannot allocate PCI registers\n");
return (ENXIO);
}
sc->mps_btag = rman_get_bustag(sc->mps_regs_resource);
sc->mps_bhandle = rman_get_bushandle(sc->mps_regs_resource);
/* Allocate the parent DMA tag */
if (bus_dma_tag_create( NULL, /* parent */
1, 0, /* algnmnt, boundary */
BUS_SPACE_MAXADDR, /* lowaddr */
BUS_SPACE_MAXADDR, /* highaddr */
NULL, NULL, /* filter, filterarg */
BUS_SPACE_MAXSIZE_32BIT,/* maxsize */
BUS_SPACE_UNRESTRICTED, /* nsegments */
BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */
0, /* flags */
NULL, NULL, /* lockfunc, lockarg */
&sc->mps_parent_dmat)) {
device_printf(dev, "Cannot allocate parent DMA tag\n");
mps_pci_free(sc);
return (ENOMEM);
}
if ((error = mps_attach(sc)) != 0)
mps_pci_free(sc);
return (error);
}
int
mps_pci_setup_interrupts(struct mps_softc *sc)
{
device_t dev;
int i, error, msgs;
dev = sc->mps_dev;
error = ENXIO;
if ((mps_disable_msix == 0) &&
((msgs = pci_msix_count(dev)) >= MPS_MSI_COUNT))
error = mps_alloc_msix(sc, MPS_MSI_COUNT);
if ((error != 0) && (mps_disable_msi == 0) &&
((msgs = pci_msi_count(dev)) >= MPS_MSI_COUNT))
error = mps_alloc_msi(sc, MPS_MSI_COUNT);
if (error != 0) {
sc->mps_flags |= MPS_FLAGS_INTX;
sc->mps_irq_rid[0] = 0;
sc->mps_irq[0] = bus_alloc_resource_any(dev, SYS_RES_IRQ,
&sc->mps_irq_rid[0], RF_SHAREABLE | RF_ACTIVE);
if (sc->mps_irq[0] == NULL) {
device_printf(dev, "Cannot allocate INTx interrupt\n");
return (ENXIO);
}
error = bus_setup_intr(dev, sc->mps_irq[0],
INTR_TYPE_BIO | INTR_MPSAFE, NULL, mps_intr, sc,
&sc->mps_intrhand[0]);
if (error)
device_printf(dev, "Cannot setup INTx interrupt\n");
} else {
sc->mps_flags |= MPS_FLAGS_MSI;
for (i = 0; i < MPS_MSI_COUNT; i++) {
sc->mps_irq_rid[i] = i + 1;
sc->mps_irq[i] = bus_alloc_resource_any(dev,
SYS_RES_IRQ, &sc->mps_irq_rid[i], RF_ACTIVE);
if (sc->mps_irq[i] == NULL) {
device_printf(dev,
"Cannot allocate MSI interrupt\n");
return (ENXIO);
}
error = bus_setup_intr(dev, sc->mps_irq[i],
INTR_TYPE_BIO | INTR_MPSAFE, NULL, mps_intr_msi,
sc, &sc->mps_intrhand[i]);
if (error) {
device_printf(dev,
"Cannot setup MSI interrupt %d\n", i);
break;
}
}
}
return (error);
}
static int
mps_pci_detach(device_t dev)
{
struct mps_softc *sc;
int error;
sc = device_get_softc(dev);
if ((error = mps_free(sc)) != 0)
return (error);
mps_pci_free(sc);
return (0);
}
static void
mps_pci_free(struct mps_softc *sc)
{
int i;
if (sc->mps_parent_dmat != NULL) {
bus_dma_tag_destroy(sc->mps_parent_dmat);
}
if (sc->mps_flags & MPS_FLAGS_MSI) {
for (i = 0; i < MPS_MSI_COUNT; i++) {
if (sc->mps_irq[i] != NULL) {
bus_teardown_intr(sc->mps_dev, sc->mps_irq[i],
sc->mps_intrhand[i]);
bus_release_resource(sc->mps_dev, SYS_RES_IRQ,
sc->mps_irq_rid[i], sc->mps_irq[i]);
}
}
pci_release_msi(sc->mps_dev);
}
if (sc->mps_flags & MPS_FLAGS_INTX) {
bus_teardown_intr(sc->mps_dev, sc->mps_irq[0],
sc->mps_intrhand[0]);
bus_release_resource(sc->mps_dev, SYS_RES_IRQ,
sc->mps_irq_rid[0], sc->mps_irq[0]);
}
if (sc->mps_regs_resource != NULL) {
bus_release_resource(sc->mps_dev, SYS_RES_MEMORY,
sc->mps_regs_rid, sc->mps_regs_resource);
}
return;
}
static int
mps_pci_suspend(device_t dev)
{
return (EINVAL);
}
static int
mps_pci_resume(device_t dev)
{
return (EINVAL);
}
static int
mps_alloc_msix(struct mps_softc *sc, int msgs)
{
int error;
error = pci_alloc_msix(sc->mps_dev, &msgs);
return (error);
}
static int
mps_alloc_msi(struct mps_softc *sc, int msgs)
{
int error;
error = pci_alloc_msi(sc->mps_dev, &msgs);
return (error);
}

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/*-
* Copyright (c) 2009 Yahoo! Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
/* Debugging tables for MPT2 */
#include <sys/types.h>
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <sys/selinfo.h>
#include <sys/module.h>
#include <sys/bus.h>
#include <sys/conf.h>
#include <sys/bio.h>
#include <sys/malloc.h>
#include <sys/uio.h>
#include <sys/sysctl.h>
#include <machine/bus.h>
#include <machine/resource.h>
#include <sys/rman.h>
#include <cam/scsi/scsi_all.h>
#include <dev/mps/mpi/mpi2_type.h>
#include <dev/mps/mpi/mpi2.h>
#include <dev/mps/mpi/mpi2_ioc.h>
#include <dev/mps/mpi/mpi2_cnfg.h>
#include <dev/mps/mpi/mpi2_init.h>
#include <dev/mps/mpsvar.h>
#include <dev/mps/mps_table.h>
char *
mps_describe_table(struct mps_table_lookup *table, u_int code)
{
int i;
for (i = 0; table[i].string != NULL; i++) {
if (table[i].code == code)
return(table[i].string);
}
return(table[i+1].string);
}
struct mps_table_lookup mps_event_names[] = {
{"LogData", 0x01},
{"StateChange", 0x02},
{"HardResetReceived", 0x05},
{"EventChange", 0x0a},
{"TaskSetFull", 0x0e},
{"SasDeviceStatusChange", 0x0f},
{"IrOperationStatus", 0x14},
{"SasDiscovery", 0x16},
{"SasBroadcastPrimitive", 0x17},
{"SasInitDeviceStatusChange", 0x18},
{"SasInitTableOverflow", 0x19},
{"SasTopologyChangeList", 0x1c},
{"SasEnclDeviceStatusChange", 0x1d},
{"IrVolume", 0x1e},
{"IrPhysicalDisk", 0x1f},
{"IrConfigurationChangeList", 0x20},
{"LogEntryAdded", 0x21},
{"SasPhyCounter", 0x22},
{"GpioInterrupt", 0x23},
{"HbdPhyEvent", 0x24},
{NULL, 0},
{"Unknown Event", 0}
};
struct mps_table_lookup mps_phystatus_names[] = {
{"NewTargetAdded", 0x01},
{"TargetGone", 0x02},
{"PHYLinkStatusChange", 0x03},
{"PHYLinkStatusUnchanged", 0x04},
{"TargetMissing", 0x05},
{NULL, 0},
{"Unknown Status", 0}
};
struct mps_table_lookup mps_linkrate_names[] = {
{"PHY disabled", 0x01},
{"Speed Negotiation Failed", 0x02},
{"SATA OOB Complete", 0x03},
{"SATA Port Selector", 0x04},
{"SMP Reset in Progress", 0x05},
{"1.5Gbps", 0x08},
{"3.0Gbps", 0x09},
{"6.0Gbps", 0x0a},
{NULL, 0},
{"LinkRate Unknown", 0x00}
};
struct mps_table_lookup mps_sasdev0_devtype[] = {
{"End Device", 0x01},
{"Edge Expander", 0x02},
{"Fanout Expander", 0x03},
{NULL, 0},
{"No Device", 0x00}
};
struct mps_table_lookup mps_phyinfo_reason_names[] = {
{"Power On", 0x01},
{"Hard Reset", 0x02},
{"SMP Phy Control Link Reset", 0x03},
{"Loss DWORD Sync", 0x04},
{"Multiplex Sequence", 0x05},
{"I-T Nexus Loss Timer", 0x06},
{"Break Timeout Timer", 0x07},
{"PHY Test Function", 0x08},
{NULL, 0},
{"Unknown Reason", 0x00}
};
struct mps_table_lookup mps_whoinit_names[] = {
{"System BIOS", 0x01},
{"ROM BIOS", 0x02},
{"PCI Peer", 0x03},
{"Host Driver", 0x04},
{"Manufacturing", 0x05},
{NULL, 0},
{"Not Initialized", 0x00}
};
struct mps_table_lookup mps_sasdisc_reason[] = {
{"Discovery Started", 0x01},
{"Discovery Complete", 0x02},
{NULL, 0},
{"Unknown", 0x00}
};
struct mps_table_lookup mps_sastopo_exp[] = {
{"Added", 0x01},
{"Not Responding", 0x02},
{"Responding", 0x03},
{"Delay Not Responding", 0x04},
{NULL, 0},
{"Unknown", 0x00}
};
struct mps_table_lookup mps_sasdev_reason[] = {
{"SMART Data", 0x05},
{"Unsupported", 0x07},
{"Internal Device Reset", 0x08},
{"Task Abort Internal", 0x09},
{"Abort Task Set Internal", 0x0a},
{"Clear Task Set Internal", 0x0b},
{"Query Task Internal", 0x0c},
{"Async Notification", 0x0d},
{"Cmp Internal Device Reset", 0x0e},
{"Cmp Task Abort Internal", 0x0f},
{"Sata Init Failure", 0x10},
{NULL, 0},
{"Unknown", 0x00}
};
void
mps_describe_devinfo(uint32_t devinfo, char *string, int len)
{
snprintf(string, len, "%b,%s", devinfo,
"\20" "\4SataHost" "\5SmpInit" "\6StpInit" "\7SspInit"
"\10SataDev" "\11SmpTarg" "\12StpTarg" "\13SspTarg" "\14Direct"
"\15LsiDev" "\16AtapiDev" "\17SepDev",
mps_describe_table(mps_sasdev0_devtype, devinfo & 0x03));
}
void
mps_print_iocfacts(struct mps_softc *sc, MPI2_IOC_FACTS_REPLY *facts)
{
MPS_PRINTFIELD_START(sc, "IOCFacts");
MPS_PRINTFIELD(sc, facts, MsgVersion, 0x%x);
MPS_PRINTFIELD(sc, facts, HeaderVersion, 0x%x);
MPS_PRINTFIELD(sc, facts, IOCNumber, %d);
MPS_PRINTFIELD(sc, facts, IOCExceptions, 0x%x);
MPS_PRINTFIELD(sc, facts, MaxChainDepth, %d);
mps_dprint_field(sc, MPS_INFO, "WhoInit: %s\n",
mps_describe_table(mps_whoinit_names, facts->WhoInit));
MPS_PRINTFIELD(sc, facts, NumberOfPorts, %d);
MPS_PRINTFIELD(sc, facts, RequestCredit, %d);
MPS_PRINTFIELD(sc, facts, ProductID, 0x%x);
mps_dprint_field(sc, MPS_INFO, "IOCCapabilities: %b\n",
facts->IOCCapabilities, "\20" "\3ScsiTaskFull" "\4DiagTrace"
"\5SnapBuf" "\6ExtBuf" "\7EEDP" "\10BiDirTarg" "\11Multicast"
"\14TransRetry" "\15IR" "\16EventReplay" "\17RaidAccel"
"\20MSIXIndex" "\21HostDisc");
mps_dprint_field(sc, MPS_INFO, "FWVersion= %d-%d-%d-%d\n",
facts->FWVersion.Struct.Major,
facts->FWVersion.Struct.Minor,
facts->FWVersion.Struct.Unit,
facts->FWVersion.Struct.Dev);
MPS_PRINTFIELD(sc, facts, IOCRequestFrameSize, %d);
MPS_PRINTFIELD(sc, facts, MaxInitiators, %d);
MPS_PRINTFIELD(sc, facts, MaxTargets, %d);
MPS_PRINTFIELD(sc, facts, MaxSasExpanders, %d);
MPS_PRINTFIELD(sc, facts, MaxEnclosures, %d);
mps_dprint_field(sc, MPS_INFO, "ProtocolFlags: %b\n",
facts->ProtocolFlags, "\20" "\1ScsiTarg" "\2ScsiInit");
MPS_PRINTFIELD(sc, facts, HighPriorityCredit, %d);
MPS_PRINTFIELD(sc, facts, MaxReplyDescriptorPostQueueDepth, %d);
MPS_PRINTFIELD(sc, facts, ReplyFrameSize, %d);
MPS_PRINTFIELD(sc, facts, MaxVolumes, %d);
MPS_PRINTFIELD(sc, facts, MaxDevHandle, %d);
MPS_PRINTFIELD(sc, facts, MaxPersistentEntries, %d);
}
void
mps_print_portfacts(struct mps_softc *sc, MPI2_PORT_FACTS_REPLY *facts)
{
MPS_PRINTFIELD_START(sc, "PortFacts");
MPS_PRINTFIELD(sc, facts, PortNumber, %d);
MPS_PRINTFIELD(sc, facts, PortType, 0x%x);
MPS_PRINTFIELD(sc, facts, MaxPostedCmdBuffers, %d);
}
void
mps_print_event(struct mps_softc *sc, MPI2_EVENT_NOTIFICATION_REPLY *event)
{
MPS_EVENTFIELD_START(sc, "EventReply");
MPS_EVENTFIELD(sc, event, EventDataLength, %d);
MPS_EVENTFIELD(sc, event, AckRequired, %d);
mps_dprint_field(sc, MPS_EVENT, "Event: %s (0x%x)\n",
mps_describe_table(mps_event_names, event->Event), event->Event);
MPS_EVENTFIELD(sc, event, EventContext, 0x%x);
}
void
mps_print_sasdev0(struct mps_softc *sc, MPI2_CONFIG_PAGE_SAS_DEV_0 *buf)
{
MPS_PRINTFIELD_START(sc, "SAS Device Page 0");
MPS_PRINTFIELD(sc, buf, Slot, %d);
MPS_PRINTFIELD(sc, buf, EnclosureHandle, 0x%x);
mps_dprint_field(sc, MPS_INFO, "SASAddress: 0x%jx\n",
mps_to_u64(&buf->SASAddress));
MPS_PRINTFIELD(sc, buf, ParentDevHandle, 0x%x);
MPS_PRINTFIELD(sc, buf, PhyNum, %d);
MPS_PRINTFIELD(sc, buf, AccessStatus, 0x%x);
MPS_PRINTFIELD(sc, buf, DevHandle, 0x%x);
MPS_PRINTFIELD(sc, buf, AttachedPhyIdentifier, 0x%x);
MPS_PRINTFIELD(sc, buf, ZoneGroup, %d);
mps_dprint_field(sc, MPS_INFO, "DeviceInfo: %b,%s\n", buf->DeviceInfo,
"\20" "\4SataHost" "\5SmpInit" "\6StpInit" "\7SspInit"
"\10SataDev" "\11SmpTarg" "\12StpTarg" "\13SspTarg" "\14Direct"
"\15LsiDev" "\16AtapiDev" "\17SepDev",
mps_describe_table(mps_sasdev0_devtype, buf->DeviceInfo & 0x03));
MPS_PRINTFIELD(sc, buf, Flags, 0x%x);
MPS_PRINTFIELD(sc, buf, PhysicalPort, %d);
MPS_PRINTFIELD(sc, buf, MaxPortConnections, %d);
mps_dprint_field(sc, MPS_INFO, "DeviceName: 0x%jx\n",
mps_to_u64(&buf->DeviceName));
MPS_PRINTFIELD(sc, buf, PortGroups, %d);
MPS_PRINTFIELD(sc, buf, DmaGroup, %d);
MPS_PRINTFIELD(sc, buf, ControlGroup, %d);
}
void
mps_print_evt_sas(struct mps_softc *sc, MPI2_EVENT_NOTIFICATION_REPLY *event)
{
mps_print_event(sc, event);
switch(event->Event) {
case MPI2_EVENT_SAS_DISCOVERY:
{
MPI2_EVENT_DATA_SAS_DISCOVERY *data;
data = (MPI2_EVENT_DATA_SAS_DISCOVERY *)&event->EventData;
mps_dprint_field(sc, MPS_EVENT, "Flags: %b\n", data->Flags,
"\20" "\1InProgress" "\2DeviceChange");
mps_dprint_field(sc, MPS_EVENT, "ReasonCode: %s\n",
mps_describe_table(mps_sasdisc_reason, data->ReasonCode));
MPS_EVENTFIELD(sc, data, PhysicalPort, %d);
mps_dprint_field(sc, MPS_EVENT, "DiscoveryStatus: %b\n",
data->DiscoveryStatus, "\20"
"\1Loop" "\2UnaddressableDev" "\3DupSasAddr" "\5SmpTimeout"
"\6ExpRouteFull" "\7RouteIndexError" "\10SmpFailed"
"\11SmpCrcError" "\12SubSubLink" "\13TableTableLink"
"\14UnsupDevice" "\15TableSubLink" "\16MultiDomain"
"\17MultiSub" "\20MultiSubSub" "\34DownstreamInit"
"\35MaxPhys" "\36MaxTargs" "\37MaxExpanders"
"\40MaxEnclosures");
break;
}
case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
{
MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST *data;
MPI2_EVENT_SAS_TOPO_PHY_ENTRY *phy;
int i, phynum;
data = (MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST *)
&event->EventData;
MPS_EVENTFIELD(sc, data, EnclosureHandle, 0x%x);
MPS_EVENTFIELD(sc, data, ExpanderDevHandle, 0x%x);
MPS_EVENTFIELD(sc, data, NumPhys, %d);
MPS_EVENTFIELD(sc, data, NumEntries, %d);
MPS_EVENTFIELD(sc, data, StartPhyNum, %d);
mps_dprint_field(sc, MPS_EVENT, "ExpStatus: %s (0x%x)\n",
mps_describe_table(mps_sastopo_exp, data->ExpStatus),
data->ExpStatus);
MPS_EVENTFIELD(sc, data, PhysicalPort, %d);
for (i = 0; i < data->NumEntries; i++) {
phy = &data->PHY[i];
phynum = data->StartPhyNum + i;
mps_dprint_field(sc, MPS_EVENT,
"PHY[%d].AttachedDevHandle: 0x%04x\n", phynum,
phy->AttachedDevHandle);
mps_dprint_field(sc, MPS_EVENT,
"PHY[%d].LinkRate: %s (0x%x)\n", phynum,
mps_describe_table(mps_linkrate_names,
(phy->LinkRate >> 4) & 0xf), phy->LinkRate);
mps_dprint_field(sc,MPS_EVENT,"PHY[%d].PhyStatus: %s\n",
phynum, mps_describe_table(mps_phystatus_names,
phy->PhyStatus));
}
break;
}
case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
{
MPI2_EVENT_DATA_SAS_ENCL_DEV_STATUS_CHANGE *data;
data = (MPI2_EVENT_DATA_SAS_ENCL_DEV_STATUS_CHANGE *)
&event->EventData;
MPS_EVENTFIELD(sc, data, EnclosureHandle, 0x%x);
mps_dprint_field(sc, MPS_EVENT, "ReasonCode: %s\n",
mps_describe_table(mps_sastopo_exp, data->ReasonCode));
MPS_EVENTFIELD(sc, data, PhysicalPort, %d);
MPS_EVENTFIELD(sc, data, NumSlots, %d);
MPS_EVENTFIELD(sc, data, StartSlot, %d);
MPS_EVENTFIELD(sc, data, PhyBits, 0x%x);
break;
}
case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
{
MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE *data;
data = (MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE *)
&event->EventData;
MPS_EVENTFIELD(sc, data, TaskTag, 0x%x);
mps_dprint_field(sc, MPS_EVENT, "ReasonCode: %s\n",
mps_describe_table(mps_sasdev_reason, data->ReasonCode));
MPS_EVENTFIELD(sc, data, ASC, 0x%x);
MPS_EVENTFIELD(sc, data, ASCQ, 0x%x);
MPS_EVENTFIELD(sc, data, DevHandle, 0x%x);
mps_dprint_field(sc, MPS_EVENT, "SASAddress: 0x%jx\n",
mps_to_u64(&data->SASAddress));
}
default:
break;
}
}
void
mps_print_expander1(struct mps_softc *sc, MPI2_CONFIG_PAGE_EXPANDER_1 *buf)
{
MPS_PRINTFIELD_START(sc, "SAS Expander Page 1 #%d", buf->Phy);
MPS_PRINTFIELD(sc, buf, PhysicalPort, %d);
MPS_PRINTFIELD(sc, buf, NumPhys, %d);
MPS_PRINTFIELD(sc, buf, Phy, %d);
MPS_PRINTFIELD(sc, buf, NumTableEntriesProgrammed, %d);
mps_dprint_field(sc, MPS_INFO, "ProgrammedLinkRate: %s (0x%x)\n",
mps_describe_table(mps_linkrate_names,
(buf->ProgrammedLinkRate >> 4) & 0xf), buf->ProgrammedLinkRate);
mps_dprint_field(sc, MPS_INFO, "HwLinkRate: %s (0x%x)\n",
mps_describe_table(mps_linkrate_names,
(buf->HwLinkRate >> 4) & 0xf), buf->HwLinkRate);
MPS_PRINTFIELD(sc, buf, AttachedDevHandle, 0x%04x);
mps_dprint_field(sc, MPS_INFO, "PhyInfo Reason: %s (0x%x)\n",
mps_describe_table(mps_phyinfo_reason_names,
(buf->PhyInfo >> 16) & 0xf), buf->PhyInfo);
mps_dprint_field(sc, MPS_INFO, "AttachedDeviceInfo: %b,%s\n",
buf->AttachedDeviceInfo, "\20" "\4SATAhost" "\5SMPinit" "\6STPinit"
"\7SSPinit" "\10SATAdev" "\11SMPtarg" "\12STPtarg" "\13SSPtarg"
"\14Direct" "\15LSIdev" "\16ATAPIdev" "\17SEPdev",
mps_describe_table(mps_sasdev0_devtype,
buf->AttachedDeviceInfo & 0x03));
MPS_PRINTFIELD(sc, buf, ExpanderDevHandle, 0x%04x);
MPS_PRINTFIELD(sc, buf, ChangeCount, %d);
mps_dprint_field(sc, MPS_INFO, "NegotiatedLinkRate: %s (0x%x)\n",
mps_describe_table(mps_linkrate_names,
buf->NegotiatedLinkRate & 0xf), buf->NegotiatedLinkRate);
MPS_PRINTFIELD(sc, buf, PhyIdentifier, %d);
MPS_PRINTFIELD(sc, buf, AttachedPhyIdentifier, %d);
MPS_PRINTFIELD(sc, buf, DiscoveryInfo, 0x%x);
MPS_PRINTFIELD(sc, buf, AttachedPhyInfo, 0x%x);
mps_dprint_field(sc, MPS_INFO, "AttachedPhyInfo Reason: %s (0x%x)\n",
mps_describe_table(mps_phyinfo_reason_names,
buf->AttachedPhyInfo & 0xf), buf->AttachedPhyInfo);
MPS_PRINTFIELD(sc, buf, ZoneGroup, %d);
MPS_PRINTFIELD(sc, buf, SelfConfigStatus, 0x%x);
}
void
mps_print_sasphy0(struct mps_softc *sc, MPI2_CONFIG_PAGE_SAS_PHY_0 *buf)
{
MPS_PRINTFIELD_START(sc, "SAS PHY Page 0");
MPS_PRINTFIELD(sc, buf, OwnerDevHandle, 0x%04x);
MPS_PRINTFIELD(sc, buf, AttachedDevHandle, 0x%04x);
MPS_PRINTFIELD(sc, buf, AttachedPhyIdentifier, %d);
mps_dprint_field(sc, MPS_INFO, "AttachedPhyInfo Reason: %s (0x%x)\n",
mps_describe_table(mps_phyinfo_reason_names,
buf->AttachedPhyInfo & 0xf), buf->AttachedPhyInfo);
mps_dprint_field(sc, MPS_INFO, "ProgrammedLinkRate: %s (0x%x)\n",
mps_describe_table(mps_linkrate_names,
(buf->ProgrammedLinkRate >> 4) & 0xf), buf->ProgrammedLinkRate);
mps_dprint_field(sc, MPS_INFO, "HwLinkRate: %s (0x%x)\n",
mps_describe_table(mps_linkrate_names,
(buf->HwLinkRate >> 4) & 0xf), buf->HwLinkRate);
MPS_PRINTFIELD(sc, buf, ChangeCount, %d);
MPS_PRINTFIELD(sc, buf, Flags, 0x%x);
mps_dprint_field(sc, MPS_INFO, "PhyInfo Reason: %s (0x%x)\n",
mps_describe_table(mps_phyinfo_reason_names,
(buf->PhyInfo >> 16) & 0xf), buf->PhyInfo);
mps_dprint_field(sc, MPS_INFO, "NegotiatedLinkRate: %s (0x%x)\n",
mps_describe_table(mps_linkrate_names,
buf->NegotiatedLinkRate & 0xf), buf->NegotiatedLinkRate);
}
void
mps_print_sgl(struct mps_softc *sc, struct mps_command *cm, int offset)
{
MPI2_SGE_SIMPLE64 *sge;
MPI2_SGE_CHAIN32 *sgc;
MPI2_REQUEST_HEADER *req;
struct mps_chain *chain = NULL;
char *frame;
u_int i = 0, flags;
req = (MPI2_REQUEST_HEADER *)cm->cm_req;
frame = (char *)cm->cm_req;
sge = (MPI2_SGE_SIMPLE64 *)&frame[offset * 4];
printf("SGL for command %p\n", cm);
while (frame != NULL) {
flags = sge->FlagsLength >> MPI2_SGE_FLAGS_SHIFT;
printf("seg%d flags=0x%x len=0x%x addr=0x%jx\n", i, flags,
sge->FlagsLength & 0xffffff, mps_to_u64(&sge->Address));
if (flags & (MPI2_SGE_FLAGS_END_OF_LIST |
MPI2_SGE_FLAGS_END_OF_BUFFER))
break;
sge++;
i++;
if (flags & MPI2_SGE_FLAGS_LAST_ELEMENT) {
sgc = (MPI2_SGE_CHAIN32 *)sge;
printf("chain flags=0x%x len=0x%x Offset=0x%x "
"Address=0x%x\n", sgc->Flags, sgc->Length,
sgc->NextChainOffset, sgc->Address);
if (chain == NULL)
chain = TAILQ_FIRST(&cm->cm_chain_list);
else
chain = TAILQ_NEXT(chain, chain_link);
frame = (char *)chain->chain;
sge = (MPI2_SGE_SIMPLE64 *)frame;
hexdump(frame, 128, NULL, 0);
}
}
}
void
mps_print_scsiio_cmd(struct mps_softc *sc, struct mps_command *cm)
{
MPI2_SCSI_IO_REQUEST *req;
req = (MPI2_SCSI_IO_REQUEST *)cm->cm_req;
mps_print_sgl(sc, cm, req->SGLOffset0);
}

53
sys/dev/mps/mps_table.h Normal file
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@ -0,0 +1,53 @@
/*-
* Copyright (c) 2009 Yahoo! Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
#ifndef _MPS_TABLE_H
#define _MPS_TABLE_H
struct mps_table_lookup {
char *string;
u_int code;
};
char * mps_describe_table(struct mps_table_lookup *table, u_int code);
void mps_describe_devinfo(uint32_t devinfo, char *string, int len);
extern struct mps_table_lookup mps_event_names[];
extern struct mps_table_lookup mps_phystatus_names[];
extern struct mps_table_lookup mps_linkrate_names[];
void mps_print_iocfacts(struct mps_softc *, MPI2_IOC_FACTS_REPLY *);
void mps_print_portfacts(struct mps_softc *, MPI2_PORT_FACTS_REPLY *);
void mps_print_event(struct mps_softc *, MPI2_EVENT_NOTIFICATION_REPLY *);
void mps_print_sasdev0(struct mps_softc *, MPI2_CONFIG_PAGE_SAS_DEV_0 *);
void mps_print_evt_sas(struct mps_softc *, MPI2_EVENT_NOTIFICATION_REPLY *);
void mps_print_expander1(struct mps_softc *, MPI2_CONFIG_PAGE_EXPANDER_1 *);
void mps_print_sasphy0(struct mps_softc *, MPI2_CONFIG_PAGE_SAS_PHY_0 *);
void mps_print_sgl(struct mps_softc *, struct mps_command *, int);
void mps_print_scsiio_cmd(struct mps_softc *, struct mps_command *);
#endif

583
sys/dev/mps/mps_user.c Normal file
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/*-
* Copyright (c) 2008 Yahoo!, Inc.
* All rights reserved.
* Written by: John Baldwin <jhb@FreeBSD.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the author nor the names of any co-contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* LSI MPS-Fusion Host Adapter FreeBSD userland interface
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include <sys/types.h>
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <sys/selinfo.h>
#include <sys/module.h>
#include <sys/bus.h>
#include <sys/conf.h>
#include <sys/bio.h>
#include <sys/malloc.h>
#include <sys/uio.h>
#include <sys/sysctl.h>
#include <sys/ioccom.h>
#include <sys/endian.h>
#include <machine/bus.h>
#include <machine/resource.h>
#include <sys/rman.h>
#include <cam/scsi/scsi_all.h>
#include <dev/mps/mpi/mpi2_type.h>
#include <dev/mps/mpi/mpi2.h>
#include <dev/mps/mpi/mpi2_ioc.h>
#include <dev/mps/mpi/mpi2_cnfg.h>
#include <dev/mps/mpsvar.h>
#include <dev/mps/mps_table.h>
#include <dev/mps/mps_ioctl.h>
static d_open_t mps_open;
static d_close_t mps_close;
static d_ioctl_t mps_ioctl;
static struct cdevsw mps_cdevsw = {
.d_version = D_VERSION,
.d_flags = 0,
.d_open = mps_open,
.d_close = mps_close,
.d_ioctl = mps_ioctl,
.d_name = "mps",
};
static MALLOC_DEFINE(M_MPSUSER, "mps_user", "Buffers for mps(4) ioctls");
int
mps_attach_user(struct mps_softc *sc)
{
int unit;
unit = device_get_unit(sc->mps_dev);
sc->mps_cdev = make_dev(&mps_cdevsw, unit, UID_ROOT, GID_OPERATOR, 0640,
"mps%d", unit);
if (sc->mps_cdev == NULL) {
return (ENOMEM);
}
sc->mps_cdev->si_drv1 = sc;
return (0);
}
void
mps_detach_user(struct mps_softc *sc)
{
/* XXX: do a purge of pending requests? */
destroy_dev(sc->mps_cdev);
}
static int
mps_open(struct cdev *dev, int flags, int fmt, struct thread *td)
{
return (0);
}
static int
mps_close(struct cdev *dev, int flags, int fmt, struct thread *td)
{
return (0);
}
static int
mps_user_read_cfg_header(struct mps_softc *sc,
struct mps_cfg_page_req *page_req)
{
MPI2_CONFIG_PAGE_HEADER *hdr;
struct mps_config_params params;
int error;
hdr = &params.hdr.Struct;
params.action = MPI2_CONFIG_ACTION_PAGE_HEADER;
params.page_address = le32toh(page_req->page_address);
hdr->PageVersion = 0;
hdr->PageLength = 0;
hdr->PageNumber = page_req->header.PageNumber;
hdr->PageType = page_req->header.PageType;
params.buffer = NULL;
params.length = 0;
params.callback = NULL;
if ((error = mps_read_config_page(sc, &params)) != 0) {
/*
* Leave the request. Without resetting the chip, it's
* still owned by it and we'll just get into trouble
* freeing it now. Mark it as abandoned so that if it
* shows up later it can be freed.
*/
mps_printf(sc, "read_cfg_header timed out\n");
return (ETIMEDOUT);
}
page_req->ioc_status = htole16(params.status);
if ((page_req->ioc_status & MPI2_IOCSTATUS_MASK) ==
MPI2_IOCSTATUS_SUCCESS) {
bcopy(hdr, &page_req->header, sizeof(page_req->header));
}
return (0);
}
static int
mps_user_read_cfg_page(struct mps_softc *sc, struct mps_cfg_page_req *page_req,
void *buf)
{
MPI2_CONFIG_PAGE_HEADER *reqhdr, *hdr;
struct mps_config_params params;
int error;
reqhdr = buf;
hdr = &params.hdr.Struct;
hdr->PageVersion = reqhdr->PageVersion;
hdr->PageLength = reqhdr->PageLength;
hdr->PageNumber = reqhdr->PageNumber;
hdr->PageType = reqhdr->PageType & MPI2_CONFIG_PAGETYPE_MASK;
params.action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
params.page_address = le32toh(page_req->page_address);
params.buffer = buf;
params.length = le32toh(page_req->len);
params.callback = NULL;
if ((error = mps_read_config_page(sc, &params)) != 0) {
mps_printf(sc, "mps_user_read_cfg_page timed out\n");
return (ETIMEDOUT);
}
page_req->ioc_status = htole16(params.status);
return (0);
}
static int
mps_user_read_extcfg_header(struct mps_softc *sc,
struct mps_ext_cfg_page_req *ext_page_req)
{
MPI2_CONFIG_EXTENDED_PAGE_HEADER *hdr;
struct mps_config_params params;
int error;
hdr = &params.hdr.Ext;
params.action = MPI2_CONFIG_ACTION_PAGE_HEADER;
hdr->PageVersion = ext_page_req->header.PageVersion;
hdr->ExtPageLength = 0;
hdr->PageNumber = ext_page_req->header.PageNumber;
hdr->ExtPageType = ext_page_req->header.ExtPageType;
params.page_address = le32toh(ext_page_req->page_address);
if ((error = mps_read_config_page(sc, &params)) != 0) {
/*
* Leave the request. Without resetting the chip, it's
* still owned by it and we'll just get into trouble
* freeing it now. Mark it as abandoned so that if it
* shows up later it can be freed.
*/
mps_printf(sc, "mps_user_read_extcfg_header timed out\n");
return (ETIMEDOUT);
}
ext_page_req->ioc_status = htole16(params.status);
if ((ext_page_req->ioc_status & MPI2_IOCSTATUS_MASK) ==
MPI2_IOCSTATUS_SUCCESS) {
ext_page_req->header.PageVersion = hdr->PageVersion;
ext_page_req->header.PageNumber = hdr->PageNumber;
ext_page_req->header.PageType = hdr->PageType;
ext_page_req->header.ExtPageLength = hdr->ExtPageLength;
ext_page_req->header.ExtPageType = hdr->ExtPageType;
}
return (0);
}
static int
mps_user_read_extcfg_page(struct mps_softc *sc,
struct mps_ext_cfg_page_req *ext_page_req, void *buf)
{
MPI2_CONFIG_EXTENDED_PAGE_HEADER *reqhdr, *hdr;
struct mps_config_params params;
int error;
reqhdr = buf;
hdr = &params.hdr.Ext;
params.action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
params.page_address = le32toh(ext_page_req->page_address);
hdr->PageVersion = reqhdr->PageVersion;
hdr->PageNumber = reqhdr->PageNumber;
hdr->ExtPageType = reqhdr->ExtPageType;
hdr->ExtPageLength = reqhdr->ExtPageLength;
params.buffer = buf;
params.length = le32toh(ext_page_req->len);
params.callback = NULL;
if ((error = mps_read_config_page(sc, &params)) != 0) {
mps_printf(sc, "mps_user_read_extcfg_page timed out\n");
return (ETIMEDOUT);
}
ext_page_req->ioc_status = htole16(params.status);
return (0);
}
static int
mps_user_write_cfg_page(struct mps_softc *sc,
struct mps_cfg_page_req *page_req, void *buf)
{
MPI2_CONFIG_PAGE_HEADER *reqhdr, *hdr;
struct mps_config_params params;
u_int hdr_attr;
int error;
reqhdr = buf;
hdr = &params.hdr.Struct;
hdr_attr = reqhdr->PageType & MPI2_CONFIG_PAGEATTR_MASK;
if (hdr_attr != MPI2_CONFIG_PAGEATTR_CHANGEABLE &&
hdr_attr != MPI2_CONFIG_PAGEATTR_PERSISTENT) {
mps_printf(sc, "page type 0x%x not changeable\n",
reqhdr->PageType & MPI2_CONFIG_PAGETYPE_MASK);
return (EINVAL);
}
/*
* There isn't any point in restoring stripped out attributes
* if you then mask them going down to issue the request.
*/
hdr->PageVersion = reqhdr->PageVersion;
hdr->PageLength = reqhdr->PageLength;
hdr->PageNumber = reqhdr->PageNumber;
hdr->PageType = reqhdr->PageType;
params.action = MPI2_CONFIG_ACTION_PAGE_WRITE_CURRENT;
params.page_address = le32toh(page_req->page_address);
params.buffer = buf;
params.length = le32toh(page_req->len);
params.callback = NULL;
if ((error = mps_write_config_page(sc, &params)) != 0) {
mps_printf(sc, "mps_write_cfg_page timed out\n");
return (ETIMEDOUT);
}
page_req->ioc_status = htole16(params.status);
return (0);
}
struct mps_user_func {
U8 Func;
U8 SgOff;
} mps_user_func_list[] = {
{ MPI2_FUNCTION_IOC_FACTS, 0 },
{ MPI2_FUNCTION_PORT_FACTS, 0 },
{ MPI2_FUNCTION_FW_DOWNLOAD, offsetof(Mpi2FWDownloadRequest,SGL)},
{ MPI2_FUNCTION_FW_UPLOAD, offsetof(Mpi2FWUploadRequest_t,SGL)},
{ MPI2_FUNCTION_SATA_PASSTHROUGH,offsetof(Mpi2SataPassthroughRequest_t,SGL)},
{ MPI2_FUNCTION_SMP_PASSTHROUGH, offsetof(Mpi2SmpPassthroughRequest_t,SGL)},
{ MPI2_FUNCTION_CONFIG, offsetof(Mpi2ConfigRequest_t,PageBufferSGE)},
{ MPI2_FUNCTION_SAS_IO_UNIT_CONTROL, 0 },
};
static int
mps_user_verify_request(MPI2_REQUEST_HEADER *hdr, MPI2_SGE_IO_UNION **psgl)
{
int i, err = EINVAL;
for (i = 0; i < sizeof(mps_user_func_list) /
sizeof(mps_user_func_list[0]); i++ ) {
struct mps_user_func *func = &mps_user_func_list[i];
if (hdr->Function == func->Func) {
if (psgl != NULL) {
if (func->SgOff != 0)
*psgl = (PTR_MPI2_SGE_IO_UNION)
((char*)hdr + func->SgOff);
else
*psgl = NULL;
err = 0;
break;
}
}
}
return err;
}
static int
mps_user_command(struct mps_softc *sc, struct mps_usr_command *cmd)
{
MPI2_REQUEST_HEADER *hdr;
MPI2_DEFAULT_REPLY *rpl;
MPI2_SGE_IO_UNION *sgl;
void *buf;
struct mps_command *cm;
int err = 0;
int sz;
mps_lock(sc);
cm = mps_alloc_command(sc);
if (cm == NULL) {
mps_printf(sc, "mps_user_command: no mps requests\n");
err = ENOMEM;
goto Ret;
}
mps_unlock(sc);
hdr = (MPI2_REQUEST_HEADER *)cm->cm_req;
mps_dprint(sc, MPS_INFO, "mps_user_command: req %p %d rpl %p %d\n",
cmd->req, cmd->req_len, cmd->rpl, cmd->rpl_len );
copyin(cmd->req, hdr, cmd->req_len);
mps_dprint(sc, MPS_INFO, "mps_user_command: Function %02X "
"MsgFlags %02X\n", hdr->Function, hdr->MsgFlags );
err = mps_user_verify_request(hdr, &sgl);
if (err != 0) {
mps_printf(sc, "mps_user_command: unsupported function 0x%X\n",
hdr->Function );
goto RetFree;
}
if (cmd->len > 0) {
buf = malloc(cmd->len, M_MPSUSER, M_WAITOK|M_ZERO);
cm->cm_data = buf;
cm->cm_length = cmd->len;
} else {
buf = NULL;
cm->cm_data = NULL;
cm->cm_length = 0;
}
cm->cm_sge = sgl;
cm->cm_sglsize = sizeof(MPI2_SGE_IO_UNION);
cm->cm_flags = MPS_CM_FLAGS_SGE_SIMPLE | MPS_CM_FLAGS_WAKEUP;
cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
mps_lock(sc);
err = mps_map_command(sc, cm);
if (err != 0) {
mps_printf(sc, "mps_user_command: request timed out\n");
goto Ret;
}
msleep(cm, &sc->mps_mtx, 0, "mpsuser", 0); /* 30 seconds */
rpl = (MPI2_DEFAULT_REPLY *)cm->cm_reply;
sz = rpl->MsgLength * 4;
if (sz > cmd->rpl_len) {
mps_printf(sc,
"mps_user_command: reply buffer too small %d required %d\n",
cmd->rpl_len, sz );
err = EINVAL;
sz = cmd->rpl_len;
}
mps_unlock(sc);
copyout(rpl, cmd->rpl, sz);
if (buf != NULL) {
copyout(buf, cmd->buf, cmd->len);
free(buf, M_MPSUSER);
}
mps_lock(sc);
mps_dprint(sc, MPS_INFO, "mps_user_command: reply size %d\n", sz );
RetFree:
mps_free_command(sc, cm);
Ret:
mps_unlock(sc);
return err;
}
#ifdef __amd64__
#define PTRIN(p) ((void *)(uintptr_t)(p))
#define PTROUT(v) ((u_int32_t)(uintptr_t)(v))
#endif
static int
mps_ioctl(struct cdev *dev, u_long cmd, caddr_t arg, int flag,
struct thread *td)
{
struct mps_softc *sc;
struct mps_cfg_page_req *page_req;
struct mps_ext_cfg_page_req *ext_page_req;
void *mps_page;
#ifdef __amd64__
struct mps_cfg_page_req32 *page_req32;
struct mps_cfg_page_req page_req_swab;
struct mps_ext_cfg_page_req32 *ext_page_req32;
struct mps_ext_cfg_page_req ext_page_req_swab;
#endif
int error;
mps_page = NULL;
sc = dev->si_drv1;
page_req = (void *)arg;
ext_page_req = (void *)arg;
#ifdef __amd64__
/* Convert 32-bit structs to native ones. */
page_req32 = (void *)arg;
ext_page_req32 = (void *)arg;
switch (cmd) {
case MPSIO_READ_CFG_HEADER32:
case MPSIO_READ_CFG_PAGE32:
case MPSIO_WRITE_CFG_PAGE32:
page_req = &page_req_swab;
page_req->header = page_req32->header;
page_req->page_address = page_req32->page_address;
page_req->buf = PTRIN(page_req32->buf);
page_req->len = page_req32->len;
page_req->ioc_status = page_req32->ioc_status;
break;
case MPSIO_READ_EXT_CFG_HEADER32:
case MPSIO_READ_EXT_CFG_PAGE32:
ext_page_req = &ext_page_req_swab;
ext_page_req->header = ext_page_req32->header;
ext_page_req->page_address = ext_page_req32->page_address;
ext_page_req->buf = PTRIN(ext_page_req32->buf);
ext_page_req->len = ext_page_req32->len;
ext_page_req->ioc_status = ext_page_req32->ioc_status;
break;
default:
return (ENOIOCTL);
}
#endif
switch (cmd) {
#ifdef __amd64__
case MPSIO_READ_CFG_HEADER32:
#endif
case MPSIO_READ_CFG_HEADER:
mps_lock(sc);
error = mps_user_read_cfg_header(sc, page_req);
mps_unlock(sc);
break;
#ifdef __amd64__
case MPSIO_READ_CFG_PAGE32:
#endif
case MPSIO_READ_CFG_PAGE:
mps_page = malloc(page_req->len, M_MPSUSER, M_WAITOK | M_ZERO);
error = copyin(page_req->buf, mps_page,
sizeof(MPI2_CONFIG_PAGE_HEADER));
if (error)
break;
mps_lock(sc);
error = mps_user_read_cfg_page(sc, page_req, mps_page);
mps_unlock(sc);
if (error)
break;
error = copyout(mps_page, page_req->buf, page_req->len);
break;
#ifdef __amd64__
case MPSIO_READ_EXT_CFG_HEADER32:
#endif
case MPSIO_READ_EXT_CFG_HEADER:
mps_lock(sc);
error = mps_user_read_extcfg_header(sc, ext_page_req);
mps_unlock(sc);
break;
#ifdef __amd64__
case MPSIO_READ_EXT_CFG_PAGE32:
#endif
case MPSIO_READ_EXT_CFG_PAGE:
mps_page = malloc(ext_page_req->len, M_MPSUSER, M_WAITOK|M_ZERO);
error = copyin(ext_page_req->buf, mps_page,
sizeof(MPI2_CONFIG_EXTENDED_PAGE_HEADER));
if (error)
break;
mps_lock(sc);
error = mps_user_read_extcfg_page(sc, ext_page_req, mps_page);
mps_unlock(sc);
if (error)
break;
error = copyout(mps_page, ext_page_req->buf, ext_page_req->len);
break;
#ifdef __amd64__
case MPSIO_WRITE_CFG_PAGE32:
#endif
case MPSIO_WRITE_CFG_PAGE:
mps_page = malloc(page_req->len, M_MPSUSER, M_WAITOK|M_ZERO);
error = copyin(page_req->buf, mps_page, page_req->len);
if (error)
break;
mps_lock(sc);
error = mps_user_write_cfg_page(sc, page_req, mps_page);
mps_unlock(sc);
break;
case MPSIO_MPS_COMMAND:
error = mps_user_command(sc, (struct mps_usr_command *)arg);
break;
default:
error = ENOIOCTL;
break;
}
if (mps_page != NULL)
free(mps_page, M_MPSUSER);
if (error)
return (error);
#ifdef __amd64__
/* Convert native structs to 32-bit ones. */
switch (cmd) {
case MPSIO_READ_CFG_HEADER32:
case MPSIO_READ_CFG_PAGE32:
case MPSIO_WRITE_CFG_PAGE32:
page_req32->header = page_req->header;
page_req32->page_address = page_req->page_address;
page_req32->buf = PTROUT(page_req->buf);
page_req32->len = page_req->len;
page_req32->ioc_status = page_req->ioc_status;
break;
case MPSIO_READ_EXT_CFG_HEADER32:
case MPSIO_READ_EXT_CFG_PAGE32:
ext_page_req32->header = ext_page_req->header;
ext_page_req32->page_address = ext_page_req->page_address;
ext_page_req32->buf = PTROUT(ext_page_req->buf);
ext_page_req32->len = ext_page_req->len;
ext_page_req32->ioc_status = ext_page_req->ioc_status;
break;
default:
return (ENOIOCTL);
}
#endif
return (0);
}

370
sys/dev/mps/mpsvar.h Normal file
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@ -0,0 +1,370 @@
/*-
* Copyright (c) 2009 Yahoo! Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
#ifndef _MPSVAR_H
#define _MPSVAR_H
#define MPS_DB_MAX_WAIT 2500
#define MPS_REQ_FRAMES 1024
#define MPS_EVT_REPLY_FRAMES 32
#define MPS_REPLY_FRAMES MPS_REQ_FRAMES
#define MPS_CHAIN_FRAMES 1024
#define MPS_SENSE_LEN SSD_FULL_SIZE
#define MPS_MSI_COUNT 1
#define MPS_SGE64_SIZE 12
#define MPS_SGE32_SIZE 8
#define MPS_SGC_SIZE 8
#define MPS_PERIODIC_DELAY 1 /* 1 second heartbeat/watchdog check */
struct mps_softc;
struct mps_command;
struct mpssas_softc;
struct mpssas_target;
MALLOC_DECLARE(M_MPT2);
typedef void mps_evt_callback_t(struct mps_softc *, uintptr_t,
MPI2_EVENT_NOTIFICATION_REPLY *reply);
typedef void mps_command_callback_t(struct mps_softc *, struct mps_command *cm);
struct mps_chain {
TAILQ_ENTRY(mps_chain) chain_link;
MPI2_SGE_IO_UNION *chain;
uint32_t chain_busaddr;
};
struct mps_command {
TAILQ_ENTRY(mps_command) cm_link;
struct mps_softc *cm_sc;
void *cm_data;
u_int cm_length;
u_int cm_sglsize;
MPI2_SGE_IO_UNION *cm_sge;
uint8_t *cm_req;
uint8_t *cm_reply;
uint32_t cm_reply_data;
mps_command_callback_t *cm_complete;
void *cm_complete_data;
struct mpssas_target *cm_targ;
MPI2_REQUEST_DESCRIPTOR_UNION cm_desc;
u_int cm_flags;
#define MPS_CM_FLAGS_POLLED (1 << 0)
#define MPS_CM_FLAGS_COMPLETE (1 << 1)
#define MPS_CM_FLAGS_SGE_SIMPLE (1 << 2)
#define MPS_CM_FLAGS_DATAOUT (1 << 3)
#define MPS_CM_FLAGS_DATAIN (1 << 4)
#define MPS_CM_FLAGS_WAKEUP (1 << 5)
u_int cm_state;
#define MPS_CM_STATE_FREE 0
#define MPS_CM_STATE_BUSY 1
#define MPS_CM_STATE_TIMEDOUT 2
bus_dmamap_t cm_dmamap;
struct scsi_sense_data *cm_sense;
TAILQ_HEAD(, mps_chain) cm_chain_list;
uint32_t cm_req_busaddr;
uint32_t cm_sense_busaddr;
struct callout cm_callout;
};
struct mps_event_handle {
TAILQ_ENTRY(mps_event_handle) eh_list;
mps_evt_callback_t *callback;
void *data;
uint8_t mask[16];
};
struct mps_softc {
device_t mps_dev;
struct cdev *mps_cdev;
u_int mps_flags;
#define MPS_FLAGS_INTX (1 << 0)
#define MPS_FLAGS_MSI (1 << 1)
#define MPS_FLAGS_BUSY (1 << 2)
#define MPS_FLAGS_SHUTDOWN (1 << 3)
u_int mps_debug;
struct sysctl_ctx_list sysctl_ctx;
struct sysctl_oid *sysctl_tree;
struct mps_command *commands;
struct mps_chain *chains;
struct callout periodic;
struct mpssas_softc *sassc;
TAILQ_HEAD(, mps_command) req_list;
TAILQ_HEAD(, mps_chain) chain_list;
int replypostindex;
int replyfreeindex;
int replycurindex;
struct resource *mps_regs_resource;
bus_space_handle_t mps_bhandle;
bus_space_tag_t mps_btag;
int mps_regs_rid;
bus_dma_tag_t mps_parent_dmat;
bus_dma_tag_t buffer_dmat;
MPI2_IOC_FACTS_REPLY *facts;
MPI2_PORT_FACTS_REPLY *pfacts;
int num_reqs;
int num_replies;
int fqdepth; /* Free queue */
int pqdepth; /* Post queue */
uint8_t event_mask[16];
TAILQ_HEAD(, mps_event_handle) event_list;
struct mps_event_handle *mps_log_eh;
struct mtx mps_mtx;
struct intr_config_hook mps_ich;
struct resource *mps_irq[MPS_MSI_COUNT];
void *mps_intrhand[MPS_MSI_COUNT];
int mps_irq_rid[MPS_MSI_COUNT];
uint8_t *req_frames;
bus_addr_t req_busaddr;
bus_dma_tag_t req_dmat;
bus_dmamap_t req_map;
uint8_t *reply_frames;
bus_addr_t reply_busaddr;
bus_dma_tag_t reply_dmat;
bus_dmamap_t reply_map;
struct scsi_sense_data *sense_frames;
bus_addr_t sense_busaddr;
bus_dma_tag_t sense_dmat;
bus_dmamap_t sense_map;
uint8_t *chain_frames;
bus_addr_t chain_busaddr;
bus_dma_tag_t chain_dmat;
bus_dmamap_t chain_map;
MPI2_REPLY_DESCRIPTORS_UNION *post_queue;
bus_addr_t post_busaddr;
uint32_t *free_queue;
bus_addr_t free_busaddr;
bus_dma_tag_t queues_dmat;
bus_dmamap_t queues_map;
};
struct mps_config_params {
MPI2_CONFIG_EXT_PAGE_HEADER_UNION hdr;
u_int action;
u_int page_address; /* Attributes, not a phys address */
u_int status;
void *buffer;
u_int length;
int timeout;
void (*callback)(struct mps_softc *, struct mps_config_params *);
void *cbdata;
};
static __inline uint32_t
mps_regread(struct mps_softc *sc, uint32_t offset)
{
return (bus_space_read_4(sc->mps_btag, sc->mps_bhandle, offset));
}
static __inline void
mps_regwrite(struct mps_softc *sc, uint32_t offset, uint32_t val)
{
bus_space_write_4(sc->mps_btag, sc->mps_bhandle, offset, val);
}
static __inline void
mps_free_reply(struct mps_softc *sc, uint32_t busaddr)
{
if (++sc->replyfreeindex >= sc->fqdepth)
sc->replyfreeindex = 0;
sc->free_queue[sc->replyfreeindex] = busaddr;
mps_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex);
}
static __inline struct mps_chain *
mps_alloc_chain(struct mps_softc *sc)
{
struct mps_chain *chain;
if ((chain = TAILQ_FIRST(&sc->chain_list)) != NULL)
TAILQ_REMOVE(&sc->chain_list, chain, chain_link);
return (chain);
}
static __inline void
mps_free_chain(struct mps_softc *sc, struct mps_chain *chain)
{
#if 0
bzero(chain->chain, 128);
#endif
TAILQ_INSERT_TAIL(&sc->chain_list, chain, chain_link);
}
static __inline void
mps_free_command(struct mps_softc *sc, struct mps_command *cm)
{
struct mps_chain *chain, *chain_temp;
if (cm->cm_reply != NULL)
mps_free_reply(sc, cm->cm_reply_data);
cm->cm_flags = 0;
cm->cm_complete = NULL;
cm->cm_complete_data = NULL;
cm->cm_targ = 0;
cm->cm_state = MPS_CM_STATE_FREE;
TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link, chain_temp) {
TAILQ_REMOVE(&cm->cm_chain_list, chain, chain_link);
mps_free_chain(sc, chain);
}
TAILQ_INSERT_TAIL(&sc->req_list, cm, cm_link);
}
static __inline struct mps_command *
mps_alloc_command(struct mps_softc *sc)
{
struct mps_command *cm;
cm = TAILQ_FIRST(&sc->req_list);
if (cm == NULL)
return (NULL);
TAILQ_REMOVE(&sc->req_list, cm, cm_link);
KASSERT(cm->cm_state == MPS_CM_STATE_FREE, ("mps: Allocating busy command\n"));
cm->cm_state = MPS_CM_STATE_BUSY;
return (cm);
}
static __inline void
mps_lock(struct mps_softc *sc)
{
mtx_lock(&sc->mps_mtx);
}
static __inline void
mps_unlock(struct mps_softc *sc)
{
mtx_unlock(&sc->mps_mtx);
}
#define MPS_INFO (1 << 0)
#define MPS_TRACE (1 << 1)
#define MPS_FAULT (1 << 2)
#define MPS_EVENT (1 << 3)
#define MPS_LOG (1 << 4)
#define mps_printf(sc, args...) \
device_printf((sc)->mps_dev, ##args)
#define mps_dprint(sc, level, msg, args...) \
do { \
if (sc->mps_debug & level) \
device_printf(sc->mps_dev, msg, ##args); \
} while (0)
#define mps_dprint_field(sc, level, msg, args...) \
do { \
if (sc->mps_debug & level) \
printf("\t" msg, ##args); \
} while (0)
#define MPS_PRINTFIELD_START(sc, tag...) \
mps_dprint((sc), MPS_INFO, ##tag); \
mps_dprint_field((sc), MPS_INFO, ":\n")
#define MPS_PRINTFIELD_END(sc, tag) \
mps_dprint((sc), MPS_INFO, tag "\n")
#define MPS_PRINTFIELD(sc, facts, attr, fmt) \
mps_dprint_field((sc), MPS_INFO, #attr ": " #fmt "\n", (facts)->attr)
#define MPS_EVENTFIELD_START(sc, tag...) \
mps_dprint((sc), MPS_EVENT, ##tag); \
mps_dprint_field((sc), MPS_EVENT, ":\n")
#define MPS_EVENTFIELD(sc, facts, attr, fmt) \
mps_dprint_field((sc), MPS_EVENT, #attr ": " #fmt "\n", (facts)->attr)
static __inline void
mps_from_u64(uint64_t data, U64 *mps)
{
(mps)->High = (uint32_t)((data) >> 32);
(mps)->Low = (uint32_t)((data) & 0xffffffff);
}
static __inline uint64_t
mps_to_u64(U64 *data)
{
return (((uint64_t)data->High << 32) | data->Low);
}
static __inline void
mps_mask_intr(struct mps_softc *sc)
{
uint32_t mask;
mask = mps_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET);
mask |= MPI2_HIM_REPLY_INT_MASK;
mps_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask);
}
static __inline void
mps_unmask_intr(struct mps_softc *sc)
{
uint32_t mask;
mask = mps_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET);
mask &= ~MPI2_HIM_REPLY_INT_MASK;
mps_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask);
}
int mps_pci_setup_interrupts(struct mps_softc *);
int mps_attach(struct mps_softc *sc);
int mps_free(struct mps_softc *sc);
void mps_intr(void *);
void mps_intr_msi(void *);
void mps_intr_locked(void *);
int mps_register_events(struct mps_softc *, uint8_t *, mps_evt_callback_t *,
void *, struct mps_event_handle **);
int mps_update_events(struct mps_softc *, struct mps_event_handle *, uint8_t *);
int mps_deregister_events(struct mps_softc *, struct mps_event_handle *);
int mps_request_polled(struct mps_softc *sc, struct mps_command *cm);
int mps_attach_sas(struct mps_softc *sc);
int mps_detach_sas(struct mps_softc *sc);
int mps_map_command(struct mps_softc *sc, struct mps_command *cm);
int mps_read_config_page(struct mps_softc *, struct mps_config_params *);
int mps_write_config_page(struct mps_softc *, struct mps_config_params *);
void mps_memaddr_cb(void *, bus_dma_segment_t *, int , int );
int mps_attach_user(struct mps_softc *);
void mps_detach_user(struct mps_softc *);
SYSCTL_DECL(_hw_mps);
#endif

1
sys/modules/Makefile
View File

@ -185,6 +185,7 @@ SUBDIR= ${_3dfx} \
${_mly} \
mmc \
mmcsd \
mps \
mpt \
mqueue \
msdosfs \

13
sys/modules/mps/Makefile Normal file
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@ -0,0 +1,13 @@
# $FreeBSD$
.PATH: ${.CURDIR}/../../dev/mps
KMOD= mps
SRCS= mps_pci.c mps.c mps_sas.c mps_table.c mps_user.c
SRCS+= opt_mps.h opt_cam.h
SRCS+= device_if.h bus_if.h pci_if.h
#CFLAGS += -DMPS_DEBUG
DEBUG += -g
.include <bsd.kmod.mk>