Add a read-only sysctl hw.pci.mcfg to mirror the tunable by the same name.
MFC after: 1 week
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parent
10f5c8be92
commit
d3da228f37
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=192342
@ -35,6 +35,7 @@ __FBSDID("$FreeBSD$");
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#include <sys/lock.h>
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#include <sys/kernel.h>
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#include <sys/mutex.h>
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#include <sys/sysctl.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <vm/vm.h>
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@ -56,6 +57,8 @@ static void pciereg_cfgwrite(int bus, unsigned slot, unsigned func,
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static int pcireg_cfgread(int bus, int slot, int func, int reg, int bytes);
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static void pcireg_cfgwrite(int bus, int slot, int func, int reg, int data, int bytes);
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SYSCTL_DECL(_hw_pci);
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static int cfgmech;
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static vm_offset_t pcie_base;
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static int pcie_minbus, pcie_maxbus;
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@ -63,6 +66,8 @@ static uint32_t pcie_badslots;
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static struct mtx pcicfg_mtx;
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static int mcfg_enable = 1;
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TUNABLE_INT("hw.pci.mcfg", &mcfg_enable);
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SYSCTL_INT(_hw_pci, OID_AUTO, mcfg, CTLFLAG_RDTUN, &mcfg_enable, 0,
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"Enable support for PCI-e memory mapped config access");
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/*
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* Initialise access to PCI configuration space
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@ -40,6 +40,7 @@ __FBSDID("$FreeBSD$");
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#include <sys/mutex.h>
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#include <sys/malloc.h>
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#include <sys/queue.h>
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#include <sys/sysctl.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <machine/pci_cfgreg.h>
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@ -75,6 +76,8 @@ enum {
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CFGMECH_PCIE,
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};
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SYSCTL_DECL(_hw_pci);
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static TAILQ_HEAD(pcie_cfg_list, pcie_cfg_elem) pcie_list[MAXCPU];
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static uint64_t pcie_base;
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static int pcie_minbus, pcie_maxbus;
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@ -84,6 +87,8 @@ static int devmax;
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static struct mtx pcicfg_mtx;
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static int mcfg_enable = 1;
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TUNABLE_INT("hw.pci.mcfg", &mcfg_enable);
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SYSCTL_INT(_hw_pci, OID_AUTO, mcfg, CTLFLAG_RDTUN, &mcfg_enable, 0,
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"Enable support for PCI-e memory mapped config access");
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static uint32_t pci_docfgregread(int bus, int slot, int func, int reg,
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int bytes);
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