diff --git a/sys/conf/files b/sys/conf/files index 9a28adbb0d41..fb68e286822c 100644 --- a/sys/conf/files +++ b/sys/conf/files @@ -798,6 +798,7 @@ dev/mii/miibus_if.m optional miibus | mii dev/mii/mlphy.c optional miibus | mlphy dev/mii/nsgphy.c optional miibus | nsgphy dev/mii/nsphy.c optional miibus | nsphy +dev/mii/nsphyter.c optional miibus | nsphyter dev/mii/pnaphy.c optional miibus | pnaphy dev/mii/qsphy.c optional miibus | qsphy dev/mii/rgephy.c optional miibus | rgephy diff --git a/sys/dev/mii/miidevs b/sys/dev/mii/miidevs index f2e848d43ebf..cee13be522f9 100644 --- a/sys/dev/mii/miidevs +++ b/sys/dev/mii/miidevs @@ -172,6 +172,8 @@ model xxLEVEL1 LXT970 0x0000 LXT970 10/100 media interface /* National Semiconductor PHYs */ model NATSEMI DP83840 0x0000 DP83840 10/100 media interface model NATSEMI DP83843 0x0001 DP83843 10/100 media interface +model NATSEMI DP83815 0x0002 DP83815 10/100 media interface +model NATSEMI DP83847 0x0003 DP83847 10/100 media interface model NATSEMI DP83891 0x0005 DP83891 10/100/1000 media interface model NATSEMI DP83861 0x0006 DP83861 10/100/1000 media interface diff --git a/sys/dev/mii/nsphyter.c b/sys/dev/mii/nsphyter.c new file mode 100644 index 000000000000..934321ea6ef3 --- /dev/null +++ b/sys/dev/mii/nsphyter.c @@ -0,0 +1,341 @@ +/* $NetBSD: nsphyter.c,v 1.28 2008/01/20 07:58:19 msaitoh Exp $ */ + +/*- + * Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, + * NASA Ames Research Center. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the NetBSD + * Foundation, Inc. and its contributors. + * 4. Neither the name of The NetBSD Foundation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/*- + * Copyright (c) 1997 Manuel Bouyer. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by Manuel Bouyer. + * 4. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +/* + * driver for National Semiconductor's DP83843 `PHYTER' ethernet 10/100 PHY + * Data Sheet available from www.national.com + * + * We also support the DP83815 `MacPHYTER' internal PHY since, for our + * purposes, they are compatible. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include +#include "miidevs.h" + +#include + +#include "miibus_if.h" + +static device_probe_t nsphyter_probe; +static device_attach_t nsphyter_attach; + +static device_method_t nsphyter_methods[] = { + /* device interface */ + DEVMETHOD(device_probe, nsphyter_probe), + DEVMETHOD(device_attach, nsphyter_attach), + DEVMETHOD(device_detach, mii_phy_detach), + DEVMETHOD(device_shutdown, bus_generic_shutdown), + { 0, 0 } +}; + +static devclass_t nsphyter_devclass; + +static driver_t nsphyter_driver = { + "nsphyter", + nsphyter_methods, + sizeof(struct mii_softc) +}; + +DRIVER_MODULE(nsphyter, miibus, nsphyter_driver, nsphyter_devclass, 0, 0); + +static int nsphyter_service(struct mii_softc *, struct mii_data *, int); +static void nsphyter_status(struct mii_softc *); +static void nsphyter_reset(struct mii_softc *); + +static const struct mii_phydesc nsphys[] = { + MII_PHY_DESC(NATSEMI, DP83815), + MII_PHY_DESC(NATSEMI, DP83843), + MII_PHY_DESC(NATSEMI, DP83847), + MII_PHY_END +}; + +static int +nsphyter_probe(device_t dev) +{ + + return (mii_phy_dev_probe(dev, nsphys, BUS_PROBE_DEFAULT)); +} + +static int +nsphyter_attach(device_t dev) +{ + struct mii_softc *sc; + struct mii_attach_args *ma; + struct mii_data *mii; + const char *nic; + + sc = device_get_softc(dev); + ma = device_get_ivars(dev); + sc->mii_dev = device_get_parent(dev); + mii = device_get_softc(sc->mii_dev); + LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list); + + sc->mii_inst = mii->mii_instance; + sc->mii_phy = ma->mii_phyno; + sc->mii_service = nsphyter_service; + sc->mii_pdata = mii; + + mii->mii_instance++; + +#define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL) + + nic = device_get_name(device_get_parent(sc->mii_dev)); + /* + * In order for MII loopback to work Am79C971 and greater PCnet + * chips additionally need to be placed into external loopback + * mode which pcn(4) doesn't do so far. + */ + if (strcmp(nic, "pcn") != 0) +#if 1 + ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP, + sc->mii_inst), MII_MEDIA_100_TX); +#else + if (strcmp(nic, "pcn") == 0) + sc->mii_flags |= MIIF_NOLOOP; +#endif + + nsphyter_reset(sc); + + sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask; + device_printf(dev, " "); + mii_phy_add_media(sc); + printf("\n"); + +#undef ADD + + MIIBUS_MEDIAINIT(sc->mii_dev); + return (0); +} + +static int +nsphyter_service(struct mii_softc *sc, struct mii_data *mii, int cmd) +{ + struct ifmedia_entry *ife = mii->mii_media.ifm_cur; + int reg; + + switch (cmd) { + case MII_POLLSTAT: + /* + * If we're not polling our PHY instance, just return. + */ + if (IFM_INST(ife->ifm_media) != sc->mii_inst) + return (0); + break; + + case MII_MEDIACHG: + /* + * If the media indicates a different PHY instance, + * isolate ourselves. + */ + if (IFM_INST(ife->ifm_media) != sc->mii_inst) { + reg = PHY_READ(sc, MII_BMCR); + PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO); + return (0); + } + + /* + * If the interface is not up, don't do anything. + */ + if ((mii->mii_ifp->if_flags & IFF_UP) == 0) + break; + + mii_phy_setmedia(sc); + break; + + case MII_TICK: + /* + * If we're not currently selected, just return. + */ + if (IFM_INST(ife->ifm_media) != sc->mii_inst) + return (0); + if (mii_phy_tick(sc) == EJUSTRETURN) + return (0); + break; + } + + /* Update the media status. */ + nsphyter_status(sc); + + /* Callback if something changed. */ + mii_phy_update(sc, cmd); + return (0); +} + +static void +nsphyter_status(struct mii_softc *sc) +{ + struct mii_data *mii = sc->mii_pdata; + struct ifmedia_entry *ife = mii->mii_media.ifm_cur; + int bmsr, bmcr, physts; + + mii->mii_media_status = IFM_AVALID; + mii->mii_media_active = IFM_ETHER; + + bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); + physts = PHY_READ(sc, MII_NSPHYTER_PHYSTS); + + if ((physts & PHYSTS_LINK) != 0) + mii->mii_media_status |= IFM_ACTIVE; + + bmcr = PHY_READ(sc, MII_BMCR); + if ((bmcr & BMCR_ISO) != 0) { + mii->mii_media_active |= IFM_NONE; + mii->mii_media_status = 0; + return; + } + + if ((bmcr & BMCR_LOOP) != 0) + mii->mii_media_active |= IFM_LOOP; + + if ((bmcr & BMCR_AUTOEN) != 0) { + /* + * The media status bits are only valid if autonegotiation + * has completed (or it's disabled). + */ + if ((bmsr & BMSR_ACOMP) == 0) { + /* Erg, still trying, I guess... */ + mii->mii_media_active |= IFM_NONE; + return; + } + + if ((physts & PHYSTS_SPEED10) != 0) + mii->mii_media_active |= IFM_10_T; + else + mii->mii_media_active |= IFM_100_TX; + if ((physts & PHYSTS_DUPLEX) != 0) +#ifdef notyet + mii->mii_media_active |= + IFM_FDX | mii_phy_flowstatus(sc); +#else + mii->mii_media_active |= IFM_FDX; +#endif + else + mii->mii_media_active |= IFM_HDX; + } else + mii->mii_media_active = ife->ifm_media; +} + +static void +nsphyter_reset(struct mii_softc *sc) +{ + struct ifmedia_entry *ife = sc->mii_pdata->mii_media.ifm_cur; + int reg, i; + + if ((sc->mii_flags & MIIF_NOISOLATE) != 0) + reg = BMCR_RESET; + else + reg = BMCR_RESET | BMCR_ISO; + PHY_WRITE(sc, MII_BMCR, reg); + + /* + * It is best to allow a little time for the reset to settle + * in before we start polling the BMCR again. Notably, the + * DP8384{3,7} manuals state that there should be a 500us delay + * between asserting software reset and attempting MII serial + * operations. Be conservative. Also, a DP83815 can get into + * a bad state on cable removal and reinsertion if we do not + * delay here. + */ + DELAY(1000); + + /* + * Wait another 2s for it to complete. + * This is only a little overkill as under normal circumstances + * the PHY can take up to 1s to complete reset. + * This is also a bit odd because after a reset, the BMCR will + * clear the reset bit and simply reports 0 even though the reset + * is not yet complete. + */ + for (i = 0; i < 1000; i++) { + reg = PHY_READ(sc, MII_BMCR); + if (reg != 0 && (reg & BMCR_RESET) == 0) + break; + DELAY(2000); + } + + if ((sc->mii_flags & MIIF_NOISOLATE) == 0) { + if ((ife == NULL && sc->mii_inst != 0) || + (ife != NULL && IFM_INST(ife->ifm_media) != sc->mii_inst)) + PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO); + } +} diff --git a/sys/dev/mii/nsphyterreg.h b/sys/dev/mii/nsphyterreg.h new file mode 100644 index 000000000000..5429afe97f04 --- /dev/null +++ b/sys/dev/mii/nsphyterreg.h @@ -0,0 +1,186 @@ +/* $NetBSD: nsphyterreg.h,v 1.4 2005/12/11 12:22:42 christos Exp $ */ + +/*- + * Copyright (c) 1999, 2001 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, + * NASA Ames Research Center. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the NetBSD + * Foundation, Inc. and its contributors. + * 4. Neither the name of The NetBSD Foundation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef _DEV_MII_NSPHYTERREG_H_ +#define _DEV_MII_NSPHYTERREG_H_ + +/* + * DP83843 registers; We also have the MacPHYTER (DP83815) internal + * PHY register definitions here, since the two are, for our purposes, + * compatible. + */ + +#define MII_NSPHYTER_PHYSTS 0x10 /* PHY status */ +#define PHYSTS_REL 0x8000 /* receive error latch */ +#define PHYSTS_CIML 0x4000 /* CIM latch */ +#define PHYSTS_FCSL 0x2000 /* false carrier sense latch */ +#define PHYSTS_DEVRDY 0x0800 /* device ready */ +#define PHYSTS_PGRX 0x0400 /* page received */ +#define PHYSTS_ANEGEN 0x0200 /* autoneg. enabled */ +#define PHYSTS_MIIINTR 0x0100 /* MII interrupt */ +#define PHYSTS_REMFAULT 0x0080 /* remote fault */ +#define PHYSTS_JABBER 0x0040 /* jabber detect */ +#define PHYSTS_NWAYCOMP 0x0020 /* NWAY complete */ +#define PHYSTS_RESETSTAT 0x0010 /* reset status */ +#define PHYSTS_LOOPBACK 0x0008 /* loopback status */ +#define PHYSTS_DUPLEX 0x0004 /* full duplex */ +#define PHYSTS_SPEED10 0x0002 /* speed == 10Mb/s */ +#define PHYSTS_LINK 0x0001 /* link up */ + /* Below are the MacPHYTER bits that are different. */ +#define PHYSTS_MP_REL 0x2000 /* receive error latch */ +#define PHYSTS_MP_POLARITY 0x1000 /* polarity inverted */ +#define PHYSTS_MP_FCSL 0x0800 /* false carrier sense latch */ +#define PHYSTS_MP_SIGNAL 0x0400 /* signal detect */ +#define PHYSTS_MP_DESCRLK 0x0200 /* de-scrambler lock */ +#define PHYSTS_MP_PGRX 0x0100 /* page received */ +#define PHYSTS_MP_MIIINTR 0x0080 /* MII interrupt */ +#define PHYSTS_MP_REMFAULT 0x0040 /* remote fault */ +#define PHYSTS_MP_JABBER 0x0020 /* jabber detect */ +#define PHYSTS_MP_NWAYCOMP 0x0010 /* NWAY complete */ + + +#define MII_NSPHYTER_MIPSCR 0x11 /* MII interrupt PHY specific + control */ + +#define MIPSCR_INTEN 0x0002 /* interrupt enable */ +#define MIPSCR_TINT 0x0001 /* test interrupt */ + + +#define MII_NSPHYTER_MIPGSR 0x12 /* MII interrupt PHY generic + status */ +#define MIPGSR_MINT 0x8000 /* MII interrupt pending */ + /* The bits below are MacPHYTER only. */ +#define MIPGSR_MSK_LINK 0x4000 /* mask link status event */ +#define MIPGSR_MSK_JAB 0x2000 /* mask jabber event */ +#define MIPGSR_MSK_RF 0x1000 /* mask remote fault event */ +#define MIPGSR_MSK_ANC 0x0800 /* mask auto-neg complete event */ +#define MIPGSR_MSK_FHF 0x0400 /* mask false carrier half full event */ +#define MIPGSR_MSK_RHF 0x0200 /* mask RX error half full event */ + +#define MII_NSPHYTER_DCR 0x13 /* Disconnect counter */ + +#define MII_NSPHYTER_FCSCR 0x14 /* False carrier sense counter */ + +#define MII_NSPHYTER_RECR 0x15 /* Receive error counter */ + + +#define MII_NSPHYTER_PCSR 0x16 /* PCS configuration and status */ +#define PCSR_SINGLE_SD 0x8000 /* single-ended SD mode */ +#define PCSR_FEFI_EN 0x4000 /* far end fault indication mode */ +#define PCSR_DESCR_TO_RST 0x2000 /* reset descrambler timeout counter */ +#define PCSR_DESCR_TO_SEL 0x1000 /* descrambler timer mode */ +#define PCSR_DESCR_TO_DIS 0x0800 /* descrambler timer disable */ +#define PCSR_LD_SCR_SD 0x0400 /* load scrambler seed */ +#define PCSR_TX_QUIET 0x0200 /* 100Mb/s transmit true quiet mode */ +#define PCSR_TX_PATTERN 0x0180 /* 100Mb/s transmit test pattern */ +#define PCSR_F_LINK_100 0x0040 /* force good link in 100Mb/s */ +#define PCSR_CIM_DIS 0x0020 /* carrier integrity monitor disable */ +#define PCSR_CIM_STATUS 0x0010 /* carrier integrity monitor status */ +#define PCSR_CODE_ERR 0x0008 /* code errors */ +#define PCSR_PME_ERR 0x0004 /* premature end errors */ +#define PCSR_LINK_ERR 0x0002 /* link errors */ +#define PCSR_PKT_ERR 0x0001 /* packet errors */ + /* Below are the MacPHYTER bits that are different. */ +#define PCSR_MP_BYP_4B5B 0x1000 /* bypass encoder */ +#define PCSR_MP_FREE_CLK 0x0800 /* free funning RX clock */ +#define PCSR_MP_TQ_EN 0x0400 /* enable True Quiet mode */ +#define PCSR_MP_SD_FORCE_B 0x0200 /* force signal detection */ +#define PCSR_MP_SD_OPTION 0x0100 /* enhanced signal detection alg. */ +#define PCSR_MP_NRZI_BYPASS 0x0004 /* NRZI bypass enabled */ + + + /* The bits below are not on MacPHYTER. */ +#define MII_NSPHYTER_LBR 0x17 /* loopback and bypass */ +#define LBR_BP_STRETCH 0x4000 /* bypass LED stretching */ +#define LBR_BP_4B5B 0x2000 /* bypass encoding/decoding */ +#define LBR_BP_SCR 0x1000 /* bypass scrambler/descrambler */ +#define LBR_BP_RX 0x0800 /* bypass receive function */ +#define LBR_BP_TX 0x0400 /* bypass transmit function */ +#define LBR_100_DP_CTL 0x0380 /* 100Mb/s data patch control */ +#define LBR_TW_LBEN 0x0020 /* TWISTER loopback enable */ +#define LBR_10_ENDEC_LB 0x0010 /* 10Mb/s ENDEC loopback */ + + + /* The bits below are not on MacPHYTER. */ +#define MII_NSPHYTER_10BTSCR 0x18 /* 10baseT status and control */ +#define BTSCR_AUI_TPI 0x2000 /* TREX operating mode */ +#define BTSCR_RX_SERIAL 0x1000 /* 10baseT RX serial mode */ +#define BTSCR_TX_SERIAL 0x0800 /* 10baseT TX serial mode */ +#define BTSCR_POL_DS 0x0400 /* polarity detection and correction + disable */ +#define BTSCR_AUTOSW_EN 0x0200 /* AUI/TPI autoswitch */ +#define BTSCR_LP_DS 0x0100 /* link pulse disable */ +#define BTSCR_HB_DS 0x0080 /* heartbeat disabled */ +#define BTSCR_LS_SEL 0x0040 /* low squelch select */ +#define BTSCR_AUI_SEL 0x0020 /* AUI select */ +#define BTSCR_JAB_DS 0x0010 /* jabber disable */ +#define BTSCR_THIN_SEL 0x0008 /* thin ethernet select */ +#define BTSCR_TX_FILT_DS 0x0004 /* TPI receive filter disable */ + + +#define MII_NSPHYTER_PHYCTRL 0x19 /* PHY control */ +#define PHYCTRL_TW_EQSEL 0x3000 /* TWISTER e.q. select */ +#define PHYCTRL_BLW_DS 0x0800 /* TWISTER base line wander disable */ +#define PHYCTRL_REPEATER 0x0200 /* repeater mode */ +#define PHYCTRL_LED_TXRX_MODE 0x0180 /* LED TX/RX mode */ +#define PHYCTRL_LED_DUP_MODE 0x0040 /* LED DUP mode */ +#define PHYCTRL_FX_EN 0x0020 /* Fiber mode enable */ +#define PHYCTRL_PHYADDR 0x001f /* PHY address */ + /* Below are the MacPHYTER bits that are different. */ +#define PHYCRTL_MP_PSR_15 0x0800 /* BIST sequence select */ +#define PHYCTRL_MP_BIST_STAT 0x0400 /* BIST passed */ +#define PHYCTRL_MP_BIST_START 0x0200 /* start BIST */ +#define PHYCTRL_MP_BP_STRETCH 0x0100 /* bypass LED stretching */ +#define PHYCTRL_MP_PAUSE_STS 0x0080 /* pause status */ + + + /* The bits below are MacPHYTER only. */ +#define MII_MACPHYTER_TBTCTL 0x1a /* 10baseT Control */ +#define TBTCTL_LOOPBACK_10_DIS 0x0100 /* loopback 10Mb/s disable */ +#define TBTCTL_LP_DIS 0x0080 /* link pulse disable */ +#define TBTCTL_FORCE_LINK_10 0x0040 /* force 10Mb/s link good */ +#define TBTCTL_FORCE_POL_COR 0x0020 /* force polarity correction */ +#define TBTCTL_INV_POLARITY 0x0010 /* inverted polarity */ +#define TBTCTL_AUTOPOL_DIS 0x0008 /* auto-polarity disable */ +#define TBTCTL_HEARTBEAT_DIS 0x0002 /* heartbeat disable */ +#define TBTCTL_JABBER_DIS 0x0001 /* jabber disable */ + +#endif /* _DEV_MII_NSPHYTERREG_H_ */ diff --git a/sys/modules/mii/Makefile b/sys/modules/mii/Makefile index 541cd6284e21..b631dbbd425e 100644 --- a/sys/modules/mii/Makefile +++ b/sys/modules/mii/Makefile @@ -6,7 +6,7 @@ KMOD= miibus SRCS= acphy.c amphy.c bmtphy.c brgphy.c bus_if.h ciphy.c device_if.h SRCS+= e1000phy.c exphy.c gentbi.c icsphy.c inphy.c ip1000phy.c SRCS+= lxtphy.c miibus_if.c miibus_if.h mii.c miidevs.h mii_physubr.c -SRCS+= mlphy.c nsgphy.c nsphy.c pci_if.h pnaphy.c qsphy.c +SRCS+= mlphy.c nsgphy.c nsphy.c nsphyter.c pci_if.h pnaphy.c qsphy.c SRCS+= rgephy.c rlphy.c ruephy.c tdkphy.c tlphy.c ukphy.c ukphy_subr.c SRCS+= xmphy.c