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Add support for header type == 1 devices (PCI 2.1 compatible PCI to PCI

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bridges with support for 64 bit memory addresses and 32 bit I/O addresses).

The code is not complete. It ignores the upper half of the long addresses.
This is not a problem on PC compatible systems, but has to be fixed for
real computers.
This commit is contained in:
se 1996-11-12 23:18:12 +00:00
parent 895021a035
commit d56c1f34f4
6 changed files with 22 additions and 8 deletions
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9
sys/dev/pci/pci.c
View File

@ -1,6 +1,6 @@
/**************************************************************************
**
** $Id: pci.c,v 1.57 1996/10/22 20:20:11 se Exp $
** $Id: pci.c,v 1.58 1996/11/12 23:10:17 se Exp $
**
** General subroutines for the PCI bus.
** pci_configure ()
@ -1743,9 +1743,14 @@ pci_remember(int bus, int dev, int func)
p->pc_sel.pc_bus = bus;
p->pc_sel.pc_dev = dev;
p->pc_sel.pc_func = func;
p->pc_hdr = (pci_conf_read (tag, PCI_HEADER_MISC) >> 16) & 0xff;
tag = pcibus->pb_tag (bus, dev, func);
p->pc_devid = pci_conf_read(tag, PCI_ID_REG);
p->pc_subid = pci_conf_read(tag, PCI_SUBID_REG);
if ((p->pc_hdr & 0x7f) == 1) {
p->pc_subid = pci_conf_read(tag, PCI_SUBID_REG1);
} else {
p->pc_subid = pci_conf_read(tag, PCI_SUBID_REG0);
}
p->pc_class = pci_conf_read(tag, PCI_CLASS_REG);
}

5
sys/dev/pci/pcireg.h
View File

@ -1,6 +1,6 @@
/**************************************************************************
**
** $Id: pcireg.h,v 1.8 1996/10/22 20:20:14 se Exp $
** $Id: pcireg.h,v 1.9 1996/11/12 23:10:24 se Exp $
**
** Names for PCI configuration space registers.
**
@ -160,7 +160,8 @@
#define PCI_PCI_BRIDGE_MEM_REG 0x20
#define PCI_PCI_BRIDGE_PMEM_REG 0x24
#define PCI_SUBID_REG 0x2c
#define PCI_SUBID_REG0 0x2c
#define PCI_SUBID_REG1 0x34
#define PCI_SUBORDINATE_BUS_MASK 0x00ff0000
#define PCI_SECONDARY_BUS_MASK 0x0000ff00

9
sys/pci/pci.c
View File

@ -1,6 +1,6 @@
/**************************************************************************
**
** $Id: pci.c,v 1.57 1996/10/22 20:20:11 se Exp $
** $Id: pci.c,v 1.58 1996/11/12 23:10:17 se Exp $
**
** General subroutines for the PCI bus.
** pci_configure ()
@ -1743,9 +1743,14 @@ pci_remember(int bus, int dev, int func)
p->pc_sel.pc_bus = bus;
p->pc_sel.pc_dev = dev;
p->pc_sel.pc_func = func;
p->pc_hdr = (pci_conf_read (tag, PCI_HEADER_MISC) >> 16) & 0xff;
tag = pcibus->pb_tag (bus, dev, func);
p->pc_devid = pci_conf_read(tag, PCI_ID_REG);
p->pc_subid = pci_conf_read(tag, PCI_SUBID_REG);
if ((p->pc_hdr & 0x7f) == 1) {
p->pc_subid = pci_conf_read(tag, PCI_SUBID_REG1);
} else {
p->pc_subid = pci_conf_read(tag, PCI_SUBID_REG0);
}
p->pc_class = pci_conf_read(tag, PCI_CLASS_REG);
}

1
sys/pci/pci_ioctl.h
View File

@ -11,6 +11,7 @@ struct pcisel {
struct pci_conf {
struct pcisel pc_sel; /* bus+slot+function */
u_char pc_hdr; /* PCI header type */
pcidi_t pc_devid; /* device ID */
pcidi_t pc_subid; /* subvendor ID */
u_int32_t pc_class; /* device class */

5
sys/pci/pcireg.h
View File

@ -1,6 +1,6 @@
/**************************************************************************
**
** $Id: pcireg.h,v 1.8 1996/10/22 20:20:14 se Exp $
** $Id: pcireg.h,v 1.9 1996/11/12 23:10:24 se Exp $
**
** Names for PCI configuration space registers.
**
@ -160,7 +160,8 @@
#define PCI_PCI_BRIDGE_MEM_REG 0x20
#define PCI_PCI_BRIDGE_PMEM_REG 0x24
#define PCI_SUBID_REG 0x2c
#define PCI_SUBID_REG0 0x2c
#define PCI_SUBID_REG1 0x34
#define PCI_SUBORDINATE_BUS_MASK 0x00ff0000
#define PCI_SECONDARY_BUS_MASK 0x0000ff00

1
sys/sys/pciio.h
View File

@ -11,6 +11,7 @@ struct pcisel {
struct pci_conf {
struct pcisel pc_sel; /* bus+slot+function */
u_char pc_hdr; /* PCI header type */
pcidi_t pc_devid; /* device ID */
pcidi_t pc_subid; /* subvendor ID */
u_int32_t pc_class; /* device class */