diff --git a/sys/amd64/amd64/initcpu.c b/sys/amd64/amd64/initcpu.c
index a4e436420875..88dc7f067284 100644
--- a/sys/amd64/amd64/initcpu.c
+++ b/sys/amd64/amd64/initcpu.c
@@ -86,7 +86,7 @@ init_amd(void)
 	case 0x10:
 	case 0x12:
 		if ((cpu_feature2 & CPUID2_HV) == 0)
-			wrmsr(0xc0011029, rdmsr(0xc0011029) | 1);
+			wrmsr(MSR_DE_CFG, rdmsr(MSR_DE_CFG) | 1);
 		break;
 	}
 
@@ -135,9 +135,9 @@ init_amd(void)
 	if (CPUID_TO_FAMILY(cpu_id) == 0x17 && CPUID_TO_MODEL(cpu_id) == 0x1 &&
 	    (cpu_feature2 & CPUID2_HV) == 0) {
 		/* 1021 */
-		msr = rdmsr(0xc0011029);
+		msr = rdmsr(MSR_DE_CFG);
 		msr |= 0x2000;
-		wrmsr(0xc0011029, msr);
+		wrmsr(MSR_DE_CFG, msr);
 
 		/* 1033 */
 		msr = rdmsr(MSR_LS_CFG);
diff --git a/sys/x86/include/specialreg.h b/sys/x86/include/specialreg.h
index 5098e6785053..e7332c5fd5e7 100644
--- a/sys/x86/include/specialreg.h
+++ b/sys/x86/include/specialreg.h
@@ -1138,6 +1138,7 @@
 #define	MSR_EXTFEATURES	0xc0011005	/* Extended CPUID Features override */
 #define	MSR_LS_CFG	0xc0011020
 #define	MSR_IC_CFG	0xc0011021	/* Instruction Cache Configuration */
+#define	MSR_DE_CFG	0xc0011029	/* Decode Configuration */
 
 /* MSR_VM_CR related */
 #define	VM_CR_SVMDIS		0x10	/* SVM: disabled by BIOS */