iommu: Shrink the iommu map entry structure
Eliminate the unroll_entry field from struct iommu_map_entry, shrinking the struct by 16 bytes on 64-bit architectures. Reviewed by: kib MFC after: 2 weeks Differential Revision: https://reviews.freebsd.org/D35769
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@ -558,7 +558,7 @@ static int
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iommu_bus_dmamap_load_something1(struct bus_dma_tag_iommu *tag,
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iommu_bus_dmamap_load_something1(struct bus_dma_tag_iommu *tag,
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struct bus_dmamap_iommu *map, vm_page_t *ma, int offset, bus_size_t buflen,
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struct bus_dmamap_iommu *map, vm_page_t *ma, int offset, bus_size_t buflen,
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int flags, bus_dma_segment_t *segs, int *segp,
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int flags, bus_dma_segment_t *segs, int *segp,
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struct iommu_map_entries_tailq *unroll_list)
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struct iommu_map_entries_tailq *entries)
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{
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{
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struct iommu_ctx *ctx;
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struct iommu_ctx *ctx;
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struct iommu_domain *domain;
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struct iommu_domain *domain;
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@ -626,10 +626,7 @@ iommu_bus_dmamap_load_something1(struct bus_dma_tag_iommu *tag,
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KASSERT((entry->flags & IOMMU_MAP_ENTRY_MAP) != 0,
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KASSERT((entry->flags & IOMMU_MAP_ENTRY_MAP) != 0,
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("entry %p missing IOMMU_MAP_ENTRY_MAP", entry));
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("entry %p missing IOMMU_MAP_ENTRY_MAP", entry));
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IOMMU_DMAMAP_LOCK(map);
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TAILQ_INSERT_TAIL(entries, entry, dmamap_link);
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TAILQ_INSERT_TAIL(&map->map_entries, entry, dmamap_link);
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IOMMU_DMAMAP_UNLOCK(map);
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TAILQ_INSERT_TAIL(unroll_list, entry, unroll_link);
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segs[seg].ds_addr = entry->start + offset;
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segs[seg].ds_addr = entry->start + offset;
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segs[seg].ds_len = buflen1;
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segs[seg].ds_len = buflen1;
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@ -651,36 +648,26 @@ iommu_bus_dmamap_load_something(struct bus_dma_tag_iommu *tag,
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{
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{
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struct iommu_ctx *ctx;
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struct iommu_ctx *ctx;
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struct iommu_domain *domain;
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struct iommu_domain *domain;
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struct iommu_map_entry *entry;
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struct iommu_map_entries_tailq entries;
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struct iommu_map_entries_tailq entries, unroll_list;
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int error;
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int error;
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ctx = tag->ctx;
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ctx = tag->ctx;
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domain = ctx->domain;
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domain = ctx->domain;
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atomic_add_long(&ctx->loads, 1);
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atomic_add_long(&ctx->loads, 1);
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TAILQ_INIT(&unroll_list);
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TAILQ_INIT(&entries);
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error = iommu_bus_dmamap_load_something1(tag, map, ma, offset,
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error = iommu_bus_dmamap_load_something1(tag, map, ma, offset,
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buflen, flags, segs, segp, &unroll_list);
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buflen, flags, segs, segp, &entries);
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if (error != 0 && !TAILQ_EMPTY(&unroll_list)) {
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if (error == 0) {
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IOMMU_DMAMAP_LOCK(map);
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TAILQ_CONCAT(&map->map_entries, &entries, dmamap_link);
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IOMMU_DMAMAP_UNLOCK(map);
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} else if (!TAILQ_EMPTY(&entries)) {
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/*
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/*
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* The busdma interface does not allow us to report
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* The busdma interface does not allow us to report
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* partial buffer load, so unfortunately we have to
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* partial buffer load, so unfortunately we have to
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* revert all work done.
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* revert all work done.
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*/
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*/
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TAILQ_INIT(&entries);
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IOMMU_DMAMAP_LOCK(map);
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TAILQ_FOREACH(entry, &unroll_list, unroll_link) {
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/*
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* No entries other than what we have created
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* during the failed run might have been
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* inserted there in between, since we own ctx
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* pglock.
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*/
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TAILQ_REMOVE(&map->map_entries, entry, dmamap_link);
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TAILQ_INSERT_TAIL(&entries, entry, dmamap_link);
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}
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IOMMU_DMAMAP_UNLOCK(map);
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IOMMU_DOMAIN_LOCK(domain);
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IOMMU_DOMAIN_LOCK(domain);
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TAILQ_CONCAT(&domain->unload_entries, &entries, dmamap_link);
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TAILQ_CONCAT(&domain->unload_entries, &entries, dmamap_link);
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IOMMU_DOMAIN_UNLOCK(domain);
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IOMMU_DOMAIN_UNLOCK(domain);
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@ -58,8 +58,6 @@ struct iommu_map_entry {
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u_int flags;
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u_int flags;
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TAILQ_ENTRY(iommu_map_entry) dmamap_link; /* Link for dmamap entries */
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TAILQ_ENTRY(iommu_map_entry) dmamap_link; /* Link for dmamap entries */
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RB_ENTRY(iommu_map_entry) rb_entry; /* Links for domain entries */
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RB_ENTRY(iommu_map_entry) rb_entry; /* Links for domain entries */
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TAILQ_ENTRY(iommu_map_entry) unroll_link; /* Link for unroll after
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dmamap_load failure */
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struct iommu_domain *domain;
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struct iommu_domain *domain;
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struct iommu_qi_genseq gseq;
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struct iommu_qi_genseq gseq;
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};
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};
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@ -245,7 +245,7 @@ domain_init_rmrr(struct dmar_domain *domain, device_t dev, int bus,
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TAILQ_INIT(&rmrr_entries);
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TAILQ_INIT(&rmrr_entries);
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dmar_dev_parse_rmrr(domain, dev_domain, dev_busno, dev_path,
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dmar_dev_parse_rmrr(domain, dev_domain, dev_busno, dev_path,
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dev_path_len, &rmrr_entries);
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dev_path_len, &rmrr_entries);
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TAILQ_FOREACH_SAFE(entry, &rmrr_entries, unroll_link, entry1) {
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TAILQ_FOREACH_SAFE(entry, &rmrr_entries, dmamap_link, entry1) {
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/*
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/*
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* VT-d specification requires that the start of an
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* VT-d specification requires that the start of an
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* RMRR entry is 4k-aligned. Buggy BIOSes put
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* RMRR entry is 4k-aligned. Buggy BIOSes put
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@ -306,7 +306,7 @@ domain_init_rmrr(struct dmar_domain *domain, device_t dev, int bus,
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error1);
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error1);
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error = error1;
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error = error1;
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}
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}
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TAILQ_REMOVE(&rmrr_entries, entry, unroll_link);
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TAILQ_REMOVE(&rmrr_entries, entry, dmamap_link);
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iommu_gas_free_entry(DOM2IODOM(domain), entry);
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iommu_gas_free_entry(DOM2IODOM(domain), entry);
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}
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}
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for (i = 0; i < size; i++)
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for (i = 0; i < size; i++)
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@ -932,7 +932,7 @@ dmar_rmrr_iter(ACPI_DMAR_HEADER *dmarh, void *arg)
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/* The RMRR entry end address is inclusive. */
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/* The RMRR entry end address is inclusive. */
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entry->end = resmem->EndAddress;
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entry->end = resmem->EndAddress;
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TAILQ_INSERT_TAIL(ria->rmrr_entries, entry,
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TAILQ_INSERT_TAIL(ria->rmrr_entries, entry,
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unroll_link);
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dmamap_link);
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}
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}
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}
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}
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