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Separate out pci cardbus bridge definitions to a common file for use

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by both OLDCARD and NEWCARD.

# didn't make the tables the same because oldcard supports more devices than
# newcard and newcard's 16-bit stuff needs some work.
This commit is contained in:
Warner Losh 2001-05-25 19:12:58 +00:00
parent 741a3bc754
commit db0d08ca8f
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=77195
2 changed files with 66 additions and 37 deletions
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65
sys/dev/pccbb/pccbbdevid.h Normal file
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@ -0,0 +1,65 @@
/*
* Copyright (c) 2001 M. Warner Losh. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice immediately at the beginning of the file, without modification,
* this list of conditions, and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* $FreeBSD$
*/
/* Vendor/Device IDs */
#define PCI_DEVICE_ID_PCIC_CLPD6729 0x11001013ul
#define PCI_DEVICE_ID_PCIC_CLPD6832 0x11101013ul
#define PCI_DEVICE_ID_PCIC_CLPD6833 0x11131013ul
#define PCI_DEVICE_ID_PCIC_OZ6729 0x67291217ul
#define PCI_DEVICE_ID_PCIC_OZ6730 0x673A1217ul
#define PCI_DEVICE_ID_PCIC_OZ6832 0x68321217ul /* Also 6833 */
#define PCI_DEVICE_ID_PCIC_OZ6860 0x68361216ul /* Also 6836? */
#define PCI_DEVICE_ID_PCIC_OZ6872 0x68721217ul /* Also 6812 */
#define PCI_DEVICE_ID_PCIC_OZ6912 /* Unknown */
#define PCI_DEVICE_ID_PCIC_OZ6922 /* Unknown */
#define PCI_DEVICE_ID_PCIC_OZ6933 /* Unknown */
#define PCI_DEVICE_ID_RICOH_RL5C465 0x04651180ul
#define PCI_DEVICE_ID_RICOH_RL5C466 0x04661180ul
#define PCI_DEVICE_ID_RICOH_RL5C475 0x04751180ul
#define PCI_DEVICE_ID_RICOH_RL5C476 0x04761180ul
#define PCI_DEVICE_ID_RICOH_RL5C477 0x04771180ul
#define PCI_DEVICE_ID_RICOH_RL5C478 0x04781180ul
#define PCI_DEVICE_ID_PCIC_TI1031 0xac13104cul
#define PCI_DEVICE_ID_PCIC_TI1130 0xac12104cul
#define PCI_DEVICE_ID_PCIC_TI1131 0xac15104cul
#define PCI_DEVICE_ID_PCIC_TI1211 0xac1e104cul
#define PCI_DEVICE_ID_PCIC_TI1220 0xac17104cul
#define PCI_DEVICE_ID_PCIC_TI1221 0xac19104cul
#define PCI_DEVICE_ID_PCIC_TI1225 0xac1c104cul
#define PCI_DEVICE_ID_PCIC_TI1250 0xac16104cul
#define PCI_DEVICE_ID_PCIC_TI1251 0xac1d104cul
#define PCI_DEVICE_ID_PCIC_TI1251B 0xac1f104cul
#define PCI_DEVICE_ID_PCIC_TI1410 0xac50104cul
#define PCI_DEVICE_ID_PCIC_TI1420 0xac51104cul
#define PCI_DEVICE_ID_PCIC_TI1450 0xac1b104cul
#define PCI_DEVICE_ID_PCIC_TI1451 0xac52104cul
#define PCI_DEVICE_ID_PCIC_TI4451 0xac42104cul
#define PCI_DEVICE_ID_TOSHIBA_TOPIC95 0x06031179ul
#define PCI_DEVICE_ID_TOSHIBA_TOPIC95B 0x060a1179ul
#define PCI_DEVICE_ID_TOSHIBA_TOPIC97 0x060f1179ul
#define PCI_DEVICE_ID_TOSHIBA_TOPIC100 0x06171179ul

38
sys/dev/pccbb/pccbbreg.h
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@ -156,40 +156,4 @@
#define PCCBB_SOCKET_CTRL_STOPCLK 0x80
/* Vendor/Device IDs */
#define PCI_DEVICE_ID_PCIC_OZ6729 0x67291217ul
#define PCI_DEVICE_ID_PCIC_OZ6730 0x673A1217ul
#define PCI_DEVICE_ID_PCIC_OZ6832 0x68321217ul /* Also 6833 */
#define PCI_DEVICE_ID_PCIC_OZ6860 0x68361216ul /* Also 6836? */
#define PCI_DEVICE_ID_PCIC_OZ6872 0x68721217ul /* Also 6812 */
#define PCI_DEVICE_ID_PCIC_OZ6912
#define PCI_DEVICE_ID_PCIC_OZ6922
#define PCI_DEVICE_ID_PCIC_OZ6933
#define PCI_DEVICE_ID_PCIC_CLPD6729 0x11001013ul
#define PCI_DEVICE_ID_PCIC_CLPD6832 0x11101013ul
#define PCI_DEVICE_ID_PCIC_CLPD6833 0x11131013ul
#define PCI_DEVICE_ID_PCIC_TI1130 0xac12104cul
#define PCI_DEVICE_ID_PCIC_TI1131 0xac15104cul
#define PCI_DEVICE_ID_PCIC_TI1211 0xac1e104cul
#define PCI_DEVICE_ID_PCIC_TI1220 0xac17104cul
#define PCI_DEVICE_ID_PCIC_TI1221 0xac19104cul
#define PCI_DEVICE_ID_PCIC_TI1225 0xac1c104cul
#define PCI_DEVICE_ID_PCIC_TI1250 0xac16104cul
#define PCI_DEVICE_ID_PCIC_TI1251 0xac1d104cul
#define PCI_DEVICE_ID_PCIC_TI1251B 0xac1f104cul
#define PCI_DEVICE_ID_PCIC_TI1410 0xac50104cul
#define PCI_DEVICE_ID_PCIC_TI1420 0xac51104cul
#define PCI_DEVICE_ID_PCIC_TI1450 0xac1b104cul
#define PCI_DEVICE_ID_PCIC_TI1451 0xac52104cul
#define PCI_DEVICE_ID_PCIC_TI4451 0xac42104cul
#define PCI_DEVICE_ID_TOSHIBA_TOPIC95 0x06031179ul
#define PCI_DEVICE_ID_TOSHIBA_TOPIC95B 0x060a1179ul
#define PCI_DEVICE_ID_TOSHIBA_TOPIC97 0x060f1179ul
#define PCI_DEVICE_ID_TOSHIBA_TOPIC100 0x06171179ul
#define PCI_DEVICE_ID_RICOH_RL5C465 0x04651180ul
#define PCI_DEVICE_ID_RICOH_RL5C466 0x04661180ul
#define PCI_DEVICE_ID_RICOH_RL5C475 0x04751180ul
#define PCI_DEVICE_ID_RICOH_RL5C476 0x04761180ul
#define PCI_DEVICE_ID_RICOH_RL5C477 0x04771180ul
#define PCI_DEVICE_ID_RICOH_RL5C478 0x04781180ul
#include <dev/pccbb/pccbbdevid.h>